L9947 QUAD HALF-BRIDGE AND SINGLE HIGH-SIDE DRIVER LOW CONSUMPTION IN STANDBY MODE (<100µA AT ROM TEMP; < 150µA AT 130°C) TWO HALF BRIDGES FOR 3A LOAD (RDSON = 0.25Ω TYP; Tj = 25°C) TWO HALF BRIDGES FOR 0.5A LOAD (RDSON = 2.5Ω TYP; Tj = 25°C) HIGH SIDE DRIVER FOR 2.5A LOAD (RDSON = 0.45Ω TYP; Tj = 25°C) DIRECT CONTROLLED BY µC (MULTIPLEX SYSTEM) OUTPUT HIGH/LOW LEVEL DIAGNOSTIC OVERCURRENT SWITCH OFF AND DIAGNOSTIC OVERTEMPERATURE DIAGNOSTIC BEFORE SWITCH OFF OPEN LOAD DIAGNOSTIC DESCRIPTION The L9947 is a bus controlled power interface in- Multiwatt 15 ORDERING NUMBER: L9947S tended for automotive applications realized in multipower BCD60II technology. Up to three DC motors and one grounded resistive load can be driven with its four half-bridge and one high-side driver power outputs. The microcomputer compatible bidirectional parallel bus allows several interfaces connected on the same bus (multiplex system). The full diagnostic information is available on the bus. BLOCK DIAGRAM April 1999 1/13 L9947 ABSOLUTE MAXIMUM RATINGS Symbol Value Unit DC Supply Voltage 26 V Single Pulse tmax < 400ms 40 V IS Negative Supply Current -9 A VCC Stabilized Supply Voltage -0.3 to 6V V Digital Input Voltage -0.3 to VCC+0.3 V Digital Input/ Output Voltage -0.3 to VCC+0.3 V Output Current Power internal limited VS VCSN, VR/WN VMODE VD0 -D3 IOUT1 - OUT5 Parameter -40 to 150 °C Tj - SD Thermal Shutdown Junction Temperature min 150 °C Tj - HYS Thermal Junction Temperature Hysteresis 20 K Tj Operating Junction Temperature PIN CONNECTION THERMAL DATA Symbol 2/13 Value Unit Rth j-amb Thermal Resistance Junction Ambient Ptot = 25W; free air; DC Parameter 38 °C/W Zth j-amb Thermal Resistance Junction Ambient still air; single pulse tp=20s 10 °C/W L9947 ELECTRICAL CHARACTERISTICS (VS = 8 to 16V; V CC = 4.5 to 5.5V; Tj = -40 to 150°C;unless otherwise specified; the voltage are refered to GND and currents are assumed positive, when the current flows into the pin.) SUPPLY: Symbol Parameter Test Condition Min. Typ. Max. Unit ICC DC Supply Current VS = 16V; VCC = 5.5V; (status 8) 5 mA IS DC Supply Current VS = 16V; VCC = 5.5V; (status 8) 10 mA Sum Supply Current IOUT1 = IOUT2 = IOUT3 = IOUT4 = IOUT5 = 0; Standby (status 2)VS = 14V; VCC = 5.5V; Tj = -40 to 25°C 100 µA IOUT1 = IOUT2 = IOUT3 = IOUT4 = IOUT5 = 0; Standby (status 2)VS = 14V; VCC = 5.5V; Tj > 25°C 150 µA 3 mA 25 V Max. Unit 1.5 V ICC + IS VS < 14V; VCC = 5.5V; IOUT = 0; (status 17); VSOVT Overvoltage Shutdown Threshold 17 CONTROL INPUTS: CNS, R/WN, MODE Symbol Parameter Test Condition Min. Typ. VINL Input Low Level VCC = 5V VINH Input High Level VCC = 5V 3.5 VINHyst Input Hysteresis VCC = 5V; 0.5 IINL Input Current Low VCC = 5V; V IN = 0 -10 10 µA IINH Input Current High (with exception of CSN Input) VCC = 5V; V IN = 5V -10 10 µA RCSN Input Resistance to GND (pull down at CSN pin) V V 20 KΩ DATA INPUT: D0 - D3 Symbol Parameter Test Condition Min. Typ. Max. Unit 1.5 V VDINL Input Low Level VCC = 5V; MODE = 0 VDINH Input High Level VCC = 5V; MODE = 0 3.5 VDINHyst Input Hysteresis VCC = 5V; MODE = 0 0.5 IDINL Input Current Low VCC = 5V; V IN = 0 -10 10 µA IDINH Input Current High VCC = 5V; V IN = 5V -10 10 µA Max. Unit 0.6 V V V DATA OUTPUT: D0 - D3 Symbol Parameter Test Condition VDOL Output Low Level VCC = 5V; ID = 0.5mA; MODE = 1 VDINH Input High Level VCC = 5V; ID = 0.5mA; MODE = 1 Min. 4 Typ. V 3/13 L9947 ELECTRICAL CHARACTERISTICS (continued) OUTPUTS: Symbol RON OUT1 Parameter On Resistance to Supply or GND Test Condition Min. Typ. Max. Unit 6 Ω 3.95 Ω 6 Ω VS > 10V; Tj = 125°C; IOUT = ± 0.5A 3.95 Ω VS = 8V; Tj = 125°C; IOUT = ±2.5A 600 mΩ VS > 10V; Tj = 125°C; IOUT = ± 2.5A 395 mΩ VS = 8V; Tj = 125°C; IOUT = ±2.5A 600 mΩ VS > 10V; Tj = 125°C; IOUT = ± 2.5A 395 mΩ VS = 8V; Tj = 125°C; IOUT = -2A 1.0 Ω VS > 10V; Tj = 125°C; IOUT = -2A 0.7 Ω 0.67 2 A 0.67 2 A VS = 8V; Tj = 125°C; IOUT = ±0.5A VS >10V; Tj = 125°C; IOUT = ± 0.5A RON OUT2 RON OUT3 RON OUT4 RON OUT5 On Resistance to Supply or GND On Resistance to Supply or GND On Resistance to Supply or GND On Resistance to Supply VS = 8V; Tj = 125°C; IOUT = ±0.5A |IOUT1 | Output Current Limitation to Supply or GND |IOUT2 | Output Current Limitation to Supply or GND |IOUT3 | Output Current Limitation to Supply or GND 4 12 A |IOUT4 | Output Current Limitation to Supply or GND 4 12 A |IOUT5 | Output Current Limitation to GND 2.5 7.5 A IOUT1 Output Current VOUT1 =2.5V; (status 18) 5 15 mA IOUtT2 Output Current VOUT2 =2.5V; (status 18) 5 15 mA IOUT3 Output Current VOUT3 =2.5V; (status 18) 5 15 mA IOUT4 Output Current VOUT4 =2.5V; (status 17) 80 500 mA VOUT4 =VS -2.5V; (status 16 or 18) -80 -500 mA Output Current VOUT5 =VS -2.5V; (status 18) -5 -15 mA Output Voltage Detection Thresholds VS =13V; (status 11) LOW HIGH HYSTERESIS 4.9 7.5 5.5 8.1 V V V TJOT Overtemperature Detection Thresholds status 12 - 15 tISC Overcurrent Switch off Time fOSC Internal Oscillator Frequency IOUT5 VOUT1-5 4/13 For the function of the short circuit current limitation see the functional description (pag....) steady state t >20ms 0.4 VS 0.6 VS 0.2 VS °C 130 125 <TJSD °C µs 50 250 KHz L9947 APPLICATION CIRCUIT DIAGRAM Fogure 1: Recommended Application Circuit. FUNCTIONAL DESCRIPTION The L9947 is a power interface circuit designed for a multiplex system controlled by a parallel µC bus. The bus consists of four bidirectional data wires D0 - D3 and three control wires read/write (R/WN), mode (MODE) and chip select (CSN). The device needs two supply voltages. The first voltage supplies the half bridges, high side driver and its driving part. The second one is a 5V stabilized supply. The function of the device in the typical operating modes is described in the following tables. 5/13 L9947 Output Activating/write Table 1 Status D1 D2 1 CSN R/WN MODE D0 1 X X X X X D3 OUT1 OUT2 OUT3 OUT4 OUT5 X 2 _ 0 0 0 0 0 3 _ 0 0 0 0 1 4 _ 0 0 1 1 5 _ 0 0 1 6 _ 0 0 7 _ 0 0 AB AB AB 0 T T 0 SRC T 0 0 SNK 0 1 0 0 1 0 0 1 1 FUNCTION AB AB Hold output behavious as programmed before T T T All Outputs, Standby mode T SNK T M1, right T T SRC T M1, left T SRC T SNK T M2, right 0 T SNK T SRC T M2, left 0 T T SRC SNK T M3, right 8 _ 0 0 1 0 0 0 T T SNK SRC T M3, left 9 _ 0 0 1 1 1 0 SNK SNK SNK SNK T Braking 10 _ 0 0 0 0 0 1 T T T T SRC High side driver Notes: Where CSN = 0 the device is (for t ≤ 100µs) transparent, in this condition any change of Data D0 .... D3 will lead to the apprpriate output response. Deselecting the circuit (CSN ) the last programmed status will be stored. Diagnostic / read. Table 2: In readout modes the port D0 .... D3 is acting as an output showing the conditions detected before. Status CSN R/WN MODE D0 D1 D2 D3 Function 11 _ 1 0 OUT1 OUT2 OUT3 OUT4 12 _ 1 1 0 0 OT OUT5 • No failure, OT, OUT5; 13 _ 1 1 1 0 OT OUT5 • OVC1, OT, OUT5; 14 _ 1 1 0 1 OT OUT5 • OVC2, OT, OUT5; 15 _ 1 1 1 1 OT OUT5 OVV or OVV + OVC1 or OVV + OVC2 OUT1, OUT2, OUT3, OUT4; OT, OUT5; Diagnostic / write. Table 3: Diagnostic modes are used to check the load status for broken or shorted wires. Status CSN R/WN MODE D0 D1 D2 D3 OUT1 OUT2 OUT3 OUT4 OUT5 16 _ 0 1 0 1 0 X T T T 140mA SRC T 17 _ 0 1 1 0 0 X T T T 140mA SNK T 18 _ 0 1 0 1 1 X 10mA SNK 10mA SNK 10mA 140mA SNK SRC 10mA SRC Status CSN R/WN MODE D0 D1 D2 D3 OUT1 OUT2 OUT3 OUT4 OUT5 Function Is+Icc ≤ 1mA for IOUT4 = 0 Standby and clear / write. Table 4: Function 19 _ 0 0 1 1 1 1 T T T T T Clear 20 0 X X X X X X T T T T T Clear, Static CSN = 0 will force clear status and standby after 100µs without respect of data inputs Symbols: 1: Logic High 0: Logic Low T: Tristate X: Don’t care 6/13 AB: As before _ Low pulse t < 100µs SRC: Source SNK: Sink OT: Overtemperature OVC1: Overcurrent 1 OVC2: Overcurrent 2 OVV: Overvoltage OUTX: - High if output voltage was >0.6Vs during test - Low if output voltage was < 0.4Vs during test L9947 Figure 2: System Startup Sequence SYSTEM STARTUP (figure 2) It is not mandatory that VS is present before VCC. With the presence of the VCC the internal logic would be reseted and the system restarts under control of the inputs. If CSN = 0 for more than 100µs after the presence of VCC the standby mode is activated. Standby is also activated when the CSN and VCC would be high at the same time. When CSN = 0 and VCC goes up, the device is not controlled by the bus. The outputs remain in tristate but the current consumption is larger than 100µA. A high - low - signal at the CSN - wire is mandatory to control the outputs. There is no undervoltage detection level for the supply voltage VS implemented. The VCC should be supplied from the same voltage supply as the driver of the D0 -D3 pins (eg. µC). 7/13 L9947 DATA TRANSFER AND OUTPUTS ACTIVATING (Figure 3) The half bridges of OUT1, OUT2 and OUT3 can be used with OUT4 to drive three bidirectional motors in full bridge configuration as shown in fig.1 Only one motor can be driven in the same time. The µC writes the corresponding word status 1 till 10 at the bus and latch it with a low pulse in the L9947. So the motor is activated. To stop the motor it is useful to insert a braking phase (status 9). In the braking condition there are all low side DMOS of the half bridges switched-on in this case the flyback currents flows through the low side switches instead of the intrinsic diodes of the half bridges. After that, the half bridges could be switched in tristate (T). The high side driver, OUT5 can be switched only when all the half bridges are in tristate status 10. The µC works always as master and the L9947 Power Interface as slave. That means: the µC starts the communication between the Power Interface and itself with low transition at the CSN line. CSN = 0, R/WN= 0 the L9947 reads the data at the bus and execute the command as shown in tables 1,3,4 (write mode). The high slope of the CSN stores the last command and execute it further. All inputs are disabled if CSN= 1. So the bus can be used for another device. With CSN = 0 and R/WN = 1 the L9947 writes the status of the diagnostic at the parallel bus until CSN becomes high (table 2; status µ + 15) (read mode). The power outputs maintain the same status as before. Figure 3: Signal sequence for data transfer to switch M1 right, read the output status, brake the motor and activate the standby mode. 8/13 L9947 Bus Timing (figure 4) The bus signal must be defined t3 = 1µs before CSN goes low. It is allowed to change the level of R/WN during CSN = 0. The other signals could be changed. To store a command it is mandatory to fix the D0 - D3 and MODE signals t9 = 1µs before the positive edge of CSN. OVERCURRENT AT OUT1 - OUT5: The output currents of OUT1 - OUT5 are internally limited. This is realized in the following way: When the output current reaches a certain level (see pag...) the Gate - Source voltage will be clamped to a lower level. The output current is now limited and follows the output ID, UDS characteristic for this Gate - Source voltage. An internal timer starts when the output voltage drop (Drain - Source) increases above 0.4VS. After 100µs typ. the output is switched OFF and the corresponding overcurrent bit (OVC1 or OVC2) will be set. The outputs can be activated again with the next input data word. Figure 4: Bus and Outputs Timing Diagram TIMING CHARACTERISTICS Symbol Parameter Min. Typ. Max. Unit 90* µs t1 Width of CSN Low 20 t2 Width of CSN High 10 µs t3 Input Signals Before Negative Cdge of CSN 1 µs t4 Input Signals After Positive Edge of CSN 1 t5 Valid Diagnostic Data 10 µs t6 Valid Diagnostic Data 10 µs t7 Delay Time from Input to Power Output, VS = 13V 300 µs t8 CSN = Low Duration (Pulse Length) for CLEAR of latched Data t9 Input Data Before Positive Edge of CSN Which Should be Latched µs 100 µs 1 µs t1 and t5 are derived from the internal oscillator frequency t7 varies with the supply voltage VS, relating to the output voltage slope limitation (*) for t1 > 100µs the latched data will be reseted due to CLEAR (status 20) 9/13 L9947 Diagnostic (TABLE 2; STATUS 11 - 15): The diagnostic delivers the information of the output voltage status (high or low) at the outputs OUT1 - OUT5, overcurrent, overvoltage shutdown and over temperature. The output voltage detection is done by hysteresis comparators with thresholds at 0.4VS and 0.6 VS. The overcurrent (OVC) information is latched till a new or repeated write command was received. The OVC1 is set to high with the overcurrent condition at any of the half-bridge outputs. OVC2 error bit will be set with the overcurrent condition at OUT5. The overvoltage (OVV) is high till the supply voltage VS exceeds the overvoltage threshold of 20V typ. The overtemperature (OT) is high if the junction temperature is less than typ. 30 Kevin below the thermal shutdown junction temperature (TJSD). Detection of Load Interruption (TABLE 3): The outputs OUT1 - OUT4 are connected by the motors in the application. The output OUT4 can be switched as current source or sink with typ. 140mA current capability (status 16 + 17). The sum of current consumption is <1mA if the output current IOUT4 = 0 (status 17). The diagnostic of the output voltage delivers the information if one or more of the half bridges is shorted to VS or GND or the motor connections are interrupted. In status 18 the outputs OUT1 - OUT3 are switched as current sinks (typ. 10mA), OUt4 and OUt5 as current sources (OUT4 140mA, OUT5 10mA). With this current the influence of leakage currents and oxidized contacts is eliminated. Standby (TABLE!; STATUS 2): The L9947 is set in standby mode with the positive edge of CSN when all other inputs are low. All latched data will be cleared and the inputs and outputs are in tristate. The total current consumption is less than 100µA. CSN=0 quits the standby. All latched data are cleared. Clear (TABLE 4: STATUS 20): If the chip select is low for ore than TCLR = 100µs, the internal latched data will be cleared and the outputs become tristate. Repetitive high low edges activate the inputs again. Also a broken CSN-wire activates this clear function due to the internal pull down resistor at CSN input. After a clear, the L9947 goes in standby and can be 10/13 wake up with a negative edge of CSN. Thermal Shutdown: When the junction temperature increases above TJSD the power DMOS transistors are switched off until the junction temperature drops below the value TJSD - TJHYST. Clamp Current of The Power Outputs: For output voltages 10V and larger a clamp current of appr. 50µA will flow in the power outputs due to the internal gate-source voltage limitation, when the device is not in standby. Overvoltage Shutdown: When the supply voltage VS exceeds the overvoltage threshold VSQVT, typ. 20V,the outputs OUT1 - OUT5 go in tristate condition. If the supply voltage goes under the overvoltage shutdown treshold, the status is the same as before the overvoltage condition occurred. Undervoltage: In the voltage range 2V <VCC < 4V the internal logic is reseted and all outputs go in tristate. Also ground spikes on the VCC reset the logic. After an internal reset of the logic, the L9947 is controlled again by the inputs. Ground Interrupt: The L9947 is protected against interruption. The output OUt5 switches off at ground interruption. The outputs OUT1 - OUt4 are driven in full bridge configuration as shown in the application. There is no path through the load or direct to another ground. Thus, the device protected. VCC Interruption If the supply voltage VS is present and VCC is interrupted or not supplied, than two cases can be distinguished: 1 The data pins D0 - D3 are not driven by the µC or they are low. So the outputs OUT1 OUT5 and D0 - D3 are in tristate. 2 One of the pins D0 - D3 is driven high the µC. This pin supplies the VCC pin by the drain-bulk-diode of the p-channel mos (fig.5). Depending of the CSN, R/WN and MODE inputs some undesiderable functions can occur. L9947 Figure 5: Supply Current Path at VCC Interruption 11/13 L9947 DIM. MIN. mm TYP. A B C MAX. MIN. inch TYP. 0.197 0.104 0.063 5 2.65 1.6 D E 0.49 F G 0.66 1.02 G1 H1 MAX. 1 0.039 0.55 0.019 1.27 0.75 1.52 0.026 0.040 17.53 19.6 17.78 18.03 H2 L 21.9 22.2 L1 L2 21.7 17.65 L3 L4 L7 0.022 0.050 0.030 0.060 0.690 0.772 0.700 0.710 20.2 22.5 0.862 0.874 0.795 0.886 22.1 22.5 18.1 0.854 0.695 0.870 0.886 0.713 17.25 10.3 2.65 17.5 10.7 17.75 10.9 2.9 0.679 0.406 0.104 0.689 0.421 0.699 0.429 0.114 M M1 4.25 4.63 4.55 5.08 4.85 5.53 0.167 0.182 0.179 0.200 0.191 0.218 S S1 1.9 1.9 2.6 2.6 0.075 0.075 0.102 0.102 Dia1 3.65 3.85 0.144 0.152 12/13 OUTLINE AND MECHANICAL DATA Multiwatt15 V L9947 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com 13/13