STMICROELECTRONICS M27C516

M27C516
512 Kbit (32Kb x16) OTP EPROM
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
FAST ACCESS TIME: 35ns
LOW POWER CONSUMPTION:
– Active Current 30mA at 5MHz
– Stand-by Current 100µA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIME: 100µs/word (typical)
ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Device Code: 000Fh
PLCC44 (C)
TSOP40 (N)
10 x 14mm
Figure 1. Logic Diagram
DESCRIPTION
The M27C516 is a 512 Kbit EPROM offered in the
OTP range (one time programmable). It is ideally
suited for microprocessor systems requiring large
data or program storage and is organized as
32,768 words of 16 bits.
The M27C516 is offered in a PLCC44 and TSOP40
(10 x 14mm) packages.
VCC
VPP
15
16
A0-A14
P
Table 1. Signal Names
A0-A14
Address Inputs
Q0-Q15
Data Outputs
E
Chip Enable
G
Output Enable
P
Program Enable
VCC
Supply Voltage
VPP
Program Supply
VSS
Ground
September 1998
Q0-Q15
M27C516
E
G
VSS
AI00932
1/12
M27C516
Figure 2B. TSOP Pin Connections
Q13
Q14
Q15
E
VPP
NC
VCC
P
NC
NC
A14
Figure 2A. LCC Pin Connections
1 44
Q12
Q11
Q10
Q9
Q8
VSS
NC
Q7
Q6
Q5
Q4
12
M27C516
34
A13
A12
A11
A10
A9
VSS
NC
A8
A7
A6
A5
Q3
Q2
Q1
Q0
G
NC
A0
A1
A2
A3
A4
23
AI00934
A9
A10
A11
A12
A13
A14
NC
NC
P
VCC
VPP
E
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
1
10
11
40
M27C516
(Normal)
20
31
30
21
VSS
A8
A7
A6
A5
A4
A3
A2
A1
A0
G
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS
AI01600
Warning: NC = Not Connected.
Warning: NC = Not Connected.
Table 2. Absolute Maximum Ratings (1)
Symbol
Parameter
Value
Unit
Ambient Operating Temperature (3)
–40 to 125
°C
TBIAS
Temperature Under Bias
–50 to 125
°C
TSTG
Storage Temperature
–65 to 150
°C
Input or Output Voltages (except A9)
–2 to 7
V
Supply Voltage
–2 to 7
V
A9 Voltage
–2 to 13.5
V
Program Supply Voltage
–2 to 14
V
TA
VIO
(2)
V CC
VA9
(2)
VPP
Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not i mplied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.
2/12
M27C516
Table 3. Operating Modes
Mode
E
G
P
A9
VPP
Q0 - Q15
Read
VIL
VIL
VIH
X
VCC
Data Out
Output Disable
VIL
VIH
X
X
VCC
Hi-Z
Program
VIL
X
VIL Pulse
X
VPP
Data In
Verify
VIL
VIL
VIH
X
VPP
Data Out
Program Inhibit
VIH
X
X
X
VPP
Hi-Z
Standby
VIH
X
X
X
VCC
Hi-Z
Electronic Signature
VIL
VIL
VIH
VID
VCC
Codes
Notes: X = VIH or VIL, VID = 12V ± 0.5V
Table 4. Electronic Signature
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Hex Data
Manufacturer’s Code
VIL
0
0
1
0
0
0
0
0
20h
Device Code
VIH
0
0
0
0
1
1
1
1
0Fh
Note: Outputs Q8-Q15 are set to ’0’.
DEVICE OPERATION
The operating modes of the M27C516 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for G and 12V on A9 for Electronic
Signature.
Read Mode
The M27C516 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV) isequal to the delay from E to output(tELQV).
Data is available at the output after a delay of tGLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least t AVQV-tGLQV.
Standby Mode
The M27C516 has a standby mode which reduces
the supply current from 30mA to 100µA. The
M27C516 is placed in the standby mode by applying a CMOS high signal to the E input. When in the
standbymode, the outputs are in a high impedance
state, independent of the G input.
Two Line Output Control
Because OTP EPROMs are usually used in larger
memory arrays, the product featuresa 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficientuse of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus. This ensures that all deselected memory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
3/12
M27C516
Table 5. AC Measurement Conditions
High Speed
Standard
Input Rise and Fall Times
≤ 10ns
≤ 20ns (10% to 90%)
Input Pulse Voltages
0 to 3V
0.4V to 2.4V
1.5V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
3V
1N914
1.5V
0V
3.3kΩ
DEVICE
UNDER
TEST
Standard
2.4V
OUT
CL = 30pF or 60pF or 100pF
2.0V
0.8V
0.4V
AI01822
CL includes JIG capacitance
AI02024B
Table 6. Capacitance (TA = 25 °C, f = 1 MHz )
Symbol
C IN
COUT
Parameter
Input Capacitance
Output Capacitance
Test Condition
Min
Max
Unit
VIN = 0V
6
pF
VOUT = 0V
12
pF
Notes. 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after V PP.
2. This parameter is sampled only and not tested 100%.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three segments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitiveand inductiveloading of thedevice at the
output. The associated transient voltagepeaks can
be suppressed by complying with the two line
4/12
output control and by properlyselected decoupling
capacitors. It is recommended that a 1µF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
between V CC and VSS for every eight devices. The
bulk capacitor should be located near the power
supplyconnection point.The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
M27C516
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
ILI
Input Leakage Current
ILO
Output Leakage Current
ICC
Supply Current
ICC1
Supply Current (Standby) TTL
ICC2
Supply Current (Standby) CMOS
IPP
Program Current
VIL
Input Low Voltage
Input High Voltage
VIH
(2)
Max
Unit
0V ≤ VIN ≤ VCC
±1
µA
0V ≤ VOUT ≤ VCC
±5
µA
E = VIL, G = VIL, f = 5MHz
30
mA
E = VIH
1
mA
E > VCC – 0.3V
100
µA
VPP = VCC
10
µA
–0.3
0.8
V
2
VCC + 1
V
0.4
V
Output Low Voltage
VOL
VOH
Min
IOL = 2.1mA
Output High Voltage TTL
IOH = –400µA
2.4
V
Output High Voltage CMOS
IOH = –100µA
VCC –0.7V
V
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC Voltage on Output is VCC +0.5V.
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
M27C516
Symbol
Alt
Parameter
Test Condition
-35 (3)
Min
tAVQV
tACC
Address Valid to Output
Valid
tELQV
tCE
tGLQV
Max
-45 (3)
Min
Max
-55 (4)
Min
Unit
Max
E = VIL, G = VIL
35
45
55
ns
Chip Enable Low to
Output Valid
G = VIL
35
45
55
ns
tOE
Output Enable Low to
Output Valid
E = VIL
18
23
25
ns
tEHQZ (2)
tDF
Chip Enable High to
Output Hi-Z
G = VIL
0
18
0
18
0
20
ns
tGHQZ (2)
tDF
Output Enable High to
Output Hi-Z
E = VIL
0
18
0
18
0
20
ns
tAXQX
tOH
Address Transition to
Output Transition
E = VIL, G = VIL
0
Notes: 1.
2.
3.
4.
0
0
ns
VCC must be applied simultaneously with or before VPP and removed simultaneously with or after V PP.
Sampled only, not 100% tested.
Speed obtained with High Speed measurement conditions and a load capacitance of 30pF.
Speed obtained with a load capacitance of 60pF.
5/12
M27C516
Table 8B. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
M27C516
Symbol
Alt
Parameter
Test Condition
-70
Min
tAVQV
tACC
Address Valid to Output Valid
tELQV
tCE
tGLQV
(3)
-85/-10
Max
Min
Unit
Max
E = VIL, G = VIL
70
85
ns
Chip Enable Low to Output Valid
G = VIL
70
85
ns
tOE
Output Enable Low to Output Valid
E = VIL
35
35
ns
tEHQZ (2)
tDF
Chip Enable High to Output Hi-Z
G = VIL
0
20
0
30
ns
tGHQZ (2)
tDF
Output Enable High to Output Hi-Z
E = VIL
0
20
0
30
ns
tAXQX
tOH
Address Transition to
Output Transition
E = VIL, G = VIL
0
0
ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after V PP.
2. Sampled only, not 100% tested.
3. Speed obtained with a load capacitance of 60pF
Figure 5. Read Mode AC Waveforms
A0-A14
VALID
tAVQV
VALID
tAXQX
E
tGLQV
tEHQZ
G
tELQV
Q0-Q15
tGHQZ
Hi-Z
AI00935B
Programming
When delivered, all bits of the M27C516 are in the
’1’ state. Data is introduced by selectively programming ’0’s into the desired bit locations. Although
only ’0’s will be programmed,both ’1’s and ’0’s can
be present in the data word. The M27C516 is in the
6/12
programming mode when VPP input is at 12.75V,E
is at VIL and P is pulsed to VIL. The data to be
programmed is applied to 16 bits in parallel to the
data output pins. The evels required for the address and data inputs are TTL. VCC is specified to
be 6.25V ±0.25V.
M27C516
Table 9. Programming Mode DC Characteristics (1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Symbol
Parameter
Test Condition
Min
VIL ≤ VIN ≤ VIH
Max
Unit
±10
µA
50
mA
50
mA
ILI
Input Leakage Current
ICC
Supply Current
IPP
Program Current
VIL
Input Low Voltage
–0.3
0.8
V
VIH
Input High Voltage
2
VCC + 0.5
V
VOL
Output Low Voltage
0.4
V
VOH
Output High Voltage TTL
VID
A9 Voltage
E = VIL
IOL = 2.1mA
IOH = –400µA
2.4
V
11.5
12.5
V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 10. Programming Mode AC Characteristics (1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Symbol
Alt
Parameter
Test Condition
Min
Max
tAVPL
tAS
Address Valid to Program Low
2
µs
tQVPL
tDS
Input Valid to Program Low
2
µs
tVPHPL
tVPS
VPP High to Program Low
2
µs
tVCHPL
tVCS
VCC High to Program Low
2
µs
tELPL
tCES
Chip Enable Low to
Program Low
2
µs
tPLPH
tPW
Program Pulse Width
95
tPHQX
tDH
Program High to Input
Transition
2
µs
tQXGL
tOES
Input Transition to Output
Enable Low
2
µs
tGLQV
tOE
Output Enable Low to
Output Valid
tGHQZ (2)
tDFP
Output Enable High to
Output Hi-Z
0
tGHAX
tAH
Output Enable High to
Address Transition
0
105
Unit
µs
100
ns
130
ns
µs
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only and not 100% tested.
7/12
M27C516
Figure 6. Programming and Verify Modes AC Waveforms
VALID
A0-A14
tAVPL
Q0-Q15
DATA IN
DATA OUT
tPHQX
tQVPL
VPP
tVPHPL
tGLQV
tGHQZ
VCC
tVCHPL
tGHAX
E
tELPL
P
tPLPH
tQXGL
G
PROGRAM
VERIFY
AI00936
Figure 7. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n =0
P = 100µs Pulse
NO
++n
= 25
YES
FAIL
NO
VERIFY
++ Addr
YES
Last
Addr
NO
YES
CHECK ALL WORDS
1st: VCC = 6V
2nd: VCC = 4.2V
AI00707C
8/12
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to program the whole array with a guaranteedmargin, in
a typical time of 3 seconds. Programming with
PRESTO II involves the application of a sequence
of 100µs programpulses to each byte until a correct
verify occurs (see Figure 7). During programming
and verify operation, a MARGIN MODE circuit is
automatically activated in order to guarantee that
each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M27C516sin parallelwith
different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27C516 may be common. A TTL low level pulse
applied to a M27C516’s P input, with E low and VPP
at 12.75V,will program that M27C516. A high level
E input inhibits the other M27C516s from being
programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were correctly
programmed. The verify is accomplished with E
and G at VIL, P at VIH, VPP at 12.75V and VCC at
6.25V.
M27C516
On-Board Programming
The M27C516 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its correspondingprogramming algorithm. The
ES mode is functional in the 25°C ± 5°C ambient
temperature range that is required when program-
ming the M27C516. To activate the ES mode, the
programming equipmentmust force 11.5Vto 12.5V
on address line A9 of the M27C516.
Two identifier bytes may then be sequenced from
the device outputs by togglingaddress line A0 from
VIL to VIH. All other address lines must be held at
VIL during Electronic Signature mode. Byte 0
(A0=VIL) represents the manufacturer code and
byte 1 (A0=VIH) the device identifier code. For the
STMicroelectronics M27C516, these two identifier
bytes are given in Table 4 and can be read-out on
outputs Q0 to Q7.
ORDERING INFORMATION SCHEME
Example:
Speed
M27C516
-70 X
N
1 TR
Package
VCC Tolerance
Temperature Range
(1)
35 ns
blank
±10%
C
PLCC44
1
0 to 70 °C
-45 (1)
45 ns
X
±5%
N
6
–40 to 85 °C
-55
(2)
55 ns
TSOP40
10 x 14mm
-70
(2)
-35
Option
TR Tape & Reel
Packing
70 ns
-85
85 ns
-10
100 ns
Notes: 1. High Speed, see AC Characteristics section for further information.
2. Speed obtained with a load capacitance of 60pF.
For a list of availableoptions (Speed,Package, etc...) or for further information on any aspect of this device,
please contact the STMicroelectronics Sales Office nearest to you.
9/12
M27C516
PLCC44 - 44 lead Plastic Leaded Chip Carrier, square
mm
Symb
Typ
inches
Min
Max
A
4.20
A1
A2
Typ
Min
Max
4.70
0.165
0.185
2.29
3.04
0.090
0.120
–
0.51
–
0.020
B
0.33
0.53
0.013
0.021
B1
0.66
0.81
0.026
0.032
D
17.40
17.65
0.685
0.695
D1
16.51
16.66
0.650
0.656
D2
14.99
16.00
0.590
0.630
E
17.40
17.65
0.685
0.695
E1
16.51
16.66
0.650
0.656
E2
14.99
16.00
0.590
0.630
–
–
–
–
0.00
0.25
0.000
0.010
–
–
–
–
e
1.27
F
R
0.89
N
0.050
0.035
44
44
CP
0.10
0.004
D
D1
A1
A2
1 N
B1
E1 E
Ne
e
D2/E2
F
B
0.51 (.020)
1.14 (.045)
A
Nd
R
PLCC
Drawing is not to scale
10/12
CP
M27C516
TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 14mm
mm
Symb
Typ
inches
Min
Max
A
Typ
Min
1.20
Max
0.047
A1
0.05
0.15
0.002
0.006
A2
0.95
1.05
0.037
0.041
B
0.17
0.27
0.007
0.011
C
0.10
0.21
0.004
0.008
D
13.80
14.20
0.543
0.559
D1
12.30
12.50
0.484
0.492
E
9.90
10.10
0.390
0.398
–
–
–
–
L
0.50
0.70
0.020
0.028
α
0°
5°
0°
5°
N
40
e
0.50
0.020
40
CP
0.10
0.004
A2
1
N
e
E
B
N/2
D1
A
CP
D
DIE
C
TSOP-a
A1
α
L
Drawing is not to scale
11/12
M27C516
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Spec ifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
 1998 STMicroelectronics - All Rights Reserved
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12/12