ST1200 Memory Card IC 256 bit OTP EPROM with Lock-Out DATA BRIEFING ■ 5 V Power Supply (VCC) and 21 V Programming Voltage (VPP) ■ 85 mW in Read Mode ■ Power On Reset ■ Very High Reliability Level ■ Standard Delivery: Wafer Form and Micromodule Package 1 96 bits Protected in Write Mode By Lock-Out Fuse 1 ■ 1 256 x 1 bit Organisation 1 ■ DESCRIPTION The ST1200 is a 256 bit OTP (one time programmable) EPROM, organized as 256 x 1, manufactured using ST’s highly reliable and well proven NMOS technology. The security mechanism, called Lock-Out, allows the user to inhibit, in write mode, the access to a memory section of 96 bits. Thus, by blowing a polysilicon fuse, the address bits 0 to 95 can be protected against write. The 9th bit of the ST1200 is set to a logical “1” for device identification purposes. In order to avoid any modification, ST has mask-programmed this bit to the logic “1” state. Micromodule (D10) Wafer Figure 1. Logic Diagram VCC VPP Table 1. Signal Names A Function code B Function code FUS Fuse control OUT Data Output ST Strobe input - validates function codes - in programming mode used as a programming pulse VPP Programming voltage (must be preset before programming and held after) VCC Power GND Ground ST A OUT ST1200 B FUS GND DS120005 October 1999 Complete data available under NDA. 1/2 ST1200 The ST1200 is available in wafer form (either sawn or unsawn) and in micromodule form (on film). For deliveries in wafer form, the memory content is at logical “0”, except for the 9th bit (bit 8). If the delivery is in micromodule, the first bit (bit 0) has been programmed at “1” for final test control. FUNCTIONAL DESCRIPTION The ST1200 has 3 operating modes in the normal system environment. They are selected with the A and B inputs, as shown in Table 2. Power-On Reset Because of the “power-on reset” feature, the ST1200 is ready for operation (with the counter reset) after “tRST”. (tRST is the time for the output to become available, after the establishment of a valid level on V CC). The ST1200 starts by presenting the current cell (address 0) to the OUT pin. Figure 2. Memory Map 00 0 1* 08 1 PROTECTED ZONE 96 NON PROTECTED ZONE 255 1* : Only for deliveries in micromodules SCP083/AI Table 2. Operating Modes A B Mode 0 0 Reset address counter 0 1 Increment address counter 1 1 Program memory cell 1 0 Forbidden Table 3. Ordering Information Scheme Example: ST1200 - D10 Delivery Form D10 Micromodule on Super 35 mm reel B5 Wafer (280 µm thickness) Devices are shipped from the factory with the memory content set at all ‘0’s (00h). For a list of available options (speed, package, etc...) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. 2/2