STMICROELECTRONICS STA5100

STA5100
140W MONO
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POWER AMPLIFIER
MONOCHIP BRIDGE MONO AMPLIFIER FOR
BASH ® ARCHITECTURE
110W OUTPUT POWER @ R L = 4 Ω,
THD = 0.5%
140W OUTPUT POWER @ R L = 4 Ω,
THD = 10%
HIGH DYNAMIC PREAMPLIFIER INPUT
STAGES
EXTERNAL PROGRAMMABLE FEEDBACK
TYPE COMPRESSORS
AC COUPLED INPUT TO CLASS AB BRIDGE
OUTPUT AMPLIFIER
PRECISION RECTIFIERS TO DRIVE THE
DIGITAL CONVERTER
ON-OFF SEQUENCE/ TIMER WITH MUTE
AND STANDBY
PROPORTIONAL OVER POWER OUTPUT
CURRENT TO LIMIT THE DIGITAL
CONVERTER
ABSOLUTE POWER BRIDGE OUTPUT
FLEXIWATT27
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TRANSISTOR POWER PROTECTION
ABSOLUTE OUTPUT CURRENT LIMIT
INTEGRATED THERMAL PROTECTION
POWER SUPPLY OVER VOLTAGE
PROTECTION
FLEXIWATT POWER PACKAGE WITH 27 PIN
BASH® licence required
DESCRIPTION
The STA5100 is a fully integrated power module designed to implement a BASH® amplifier when used
in conjunction with STABP01 digital processor.
BLOCK DIAGRAM
+VS
GND
-VS
OUT_ PRE
TRK
PWR_INP
ABSOLUTE
VALUE
BLOCK
+
-
CD+P
+2
∆G
IN_PRE
OUTP
+2
OUTP
COMPRESSOR
OUTPUT BRIDGE
CD-P
V/l
ATT_REL
CD+
PEAK
DETECTOR
S1
Ict
OVER
VOLTAGE
PROTECTION
SOA
DETECTOR
PROT.
TURNON/OFF
SEQUENCE
STBY/MUTE
THRESH
TRK_OUT
THERMAL
PROTECTION
CD+N
-1
OUTN
-1
OUTN
OUTPUT BRIDGE
CD-N
D01AU1280
July 2003
1/14
STA5100
DESCRIPTION (continued)
Notice that normally only one Digital Converter is needed to supply a stereo or multi-channel amplifier system,
therefore most of the functions implemented in the circuit have summing outputs
The signal circuits are biased by fixed negative and positive voltages referred to Ground. Instead the final stages of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way
the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier.
The Compressor circuits, one for each channel, performs a particular transfer behavior to avoid the dynamic
restriction that an adaptive system like this requires. To have a high flexibility the attack / release time and the
threshold levels are externally programmable. The tracking signal for the external digital converter is generated
from the Absolute Value block that rectifies the audio signal present at the compressor output. The outputs of
these blocks are decoupled by a diode to permit an easy sum of this signal for the multichannel application. The
output power bridges have a dedicated input pin to perform an AC decoupling to cancel the compressor output
DC offset. The gain of the stage is equal to 4 (+12dB). A sophisticated circuit performs the output transistor power detector that , with the digital converter, reduces the power supply voltage . Moreover, a maximum current
output limiting and the over temperature sensor have been added to protect the circuit itself. The external voltage applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turnon and turn-off.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
+Vs
Positive supply voltage referred to pin 13 (GND)
30
V
-Vs
Negative supply voltage referred to pin 13 (GND)
-24
V
VCD+
Positive supply voltage tracking rail referred to pin 13 (GND)
22
V
VCD+
Positive supply voltage operated to Vs+(1)
0.3
V
VCD-
Negative supply voltage referred to -Vs (1)
-0.3
V
VCD-
Negative supply voltage tracking rail referred to pin 13 (GND)
-22
V
VAtt_Rel
Pin 3 Negative & Positive maximum voltage reffered to GND (pin
13)
-0.5 to +20
V
VPwr_Imp
VTrk Pin 7, 10 Negative & Positive maximum voltage referred to
GNC (pin 13)
-20 to +20
V
VIn_pre
Pin 8 Negative & Positive maximum voltage referred to GND (pin
13)
-0.5 to +0.5
V
Vthreshold
Pin 17 Negative & Positive maximum voltage referred to GND
(pin 13)
-7 to +0.5
V
Istb-max
Pin 11 maximum input current (Internal voltage clamp at 5V)
500
µA
Pin 11 negative maximum voltage referred to GND (pin 13)
-0.5
V
Value
Unit
150
°C
1
°C/W
Vstbymute
Notes: 1. VCD- must not be more negative than -Vs and VCD+ must not be more positive than +VS
THERMAL DATA
Symbol
Tj
Parameter
Max Junction temperature
Rth j_case Thermal Resistance Junction to case .............................. ..max
2/14
STA5100
OPERATING RANGE
Symbol
Parameter
Value
Unit
+Vs
Positive supply voltage
+20 to +30
V
-Vs
Negative supply voltage
-10 to -22
V
5V ≤ (Vs+ - VCD+) ≤ 10V
V
∆Vs+
Delta positive supply voltage
VCD+
Positive supply voltage tracking rail
+3 to +17
V
VCD-
Negative supply voltage tracking rail
-3 to -17
V
Current at pin In_Pre related to compressor behaviour
-1 to +1
mA peak
Voltage at pin Threshold
-5 to 0
V
Ambient Temperature Range
0 to 70
°C
200
µA
Iin_Max
Vtrheshold
Tamb
Isb_max
Pin 11 maximum input current (Internal voltage clmp at 5V)
PIN CONNECTION
N.C.
CD-N
OUTN
OUTN
N.C.
CD+N
N.C.
N.C.
N.C.
THRESHOLD
CD+
TRK_OUT
+VS
GND
PROTECTION
TRK
STBY/MUTE
IN_PRE
OUT_PRE
PWR_INP
CD+P
OUTP
OUTP
ATT-REL
-VS
CD-P
-Vs
27
1
D01AU1281
3/14
STA5100
PIN FUNCTION
N°
Name
1
-Vs
2
CD-P
3
Att_Rel
4
OutP
Channel P
5
OutP
Channel P
6
CD+P
Channel P positive power supply
7
Pwr_Inp
8
In_pre
9
Out_pre
10
Trk
11
Stby/mute
Standby/mute input voltage control
12
Protection
Protection signal for STABP01 digital processor
13
Gnd
Analog Ground
14
+Vs
Positive Bias Supply
15
CD+
Time varying tracking rail positive power supply
16
Trk_out
Reference output for STABP01 digital processor
17
Threshold
18
N.C.
19
N.C.
20
N.C.
21
N.C.
22
CD+N
Channel N positive power supply
23
OutN
Channel N
24
OutN
Channel N
25
N.C.
26
CD-N
27
-Vs
4/14
Description
Negative Bias Supply
Channel P Time varying tracking rail negative power supply
Attack release rate
Input to power stage
Pre-amp input (virtual ground)
Output channel
Absolute value block input
Compressor threshold input
Channel N Time varying tracking rail negative power supply
Negative Bias Supply
STA5100
ELECTRICAL CHARACTERISTCS (Test Condition: Vs+ = 26V, Vs- = -22V, VCD+ = 17V, VCD- = -17V,
RL = 4Ω, external components at the nominal value f = 1KHz, Tamb = 25°C unless otherwise specified
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
10
11
12
Vpeak
0.8
mA
0.65
12
V
V
V
-1
V
PREAMPLIFIER AND COMPRESSOR
Vout clamp Maximum Voltage at Out_pre pin
Iin
Audio input current
Vcontrol
Voltage at Attack_Release pin
Attenuation = 0dB
Attenuation = 6dB
Attenuation = 26dB
0.35
6
0
0.5
9
Th
Input voltage range for the
compression
Zth
Input impedance of Threshold pin
Voffset
Output Offset at Out_pre pin with:
VCRT= 0V; Attenuation = 0dB
VCRT= 0.5V; Attenuation = 6dB
VCRT= 9V; Attenuation = 26dB
Distortion at Out_pre:
VCRT= 0V; Attenuation = 0dB
VCRT= 0.5V; Attenuation = 6dB
VCRT= 9V; Attenuation = 26dB
0.01
VCRT= 0V; Attenuation = 0dB
VCRT= 0.5V; Attenuation = 6dB
VCRT= 9V; Attenuation = 26dB
10(2)
50
60
µV
µV
µV
1.5
mA
VComp_
THD
EN
Noise at Out_pre pin :
Ict
Attack time current at pin
Attack_release
-5
100
KΩ
-10
-250
-450
10
250
450
mV
mV
mV
5
5
%
%
%
2. This value is due to the thermal noise of the external resistors Rr and Ri.
TRACKING PARAMETERS
Tracking reference voltage gain
13
14
Vtrk_out
Tracking ref. output voltage
0
20
Itrk_out
Current capability
5
6
Ztrk_in
Input impedance (Trk)
Gtrk
15
V
V
7
1
mA
MΩ
OUTPUT BRIDGE
Gout
Half Output bridge gain
5.5
6
6.5
dB
Gch
Output bridge differential gain
11
12
13
dB
∆Gch
Output bridges gain mismatch
-1
1
dB
Pout
Continuous Output Power
THD = 0.5%
THD = 10%
THD
Total harmonic distortion of the
output bridge
Po = 5W
100
125
110
140
W
W
0.01
%
f = 20Hz to 20KHz; Po = 50W
VOff
Output bridge D.C. offset
EN
Noise at Output bridge pins
Zbr_in
Input impedance
f = 20Hz to 20KHz; Rg = 50Ω
0.1
%
50
mV
µV
12
100
140
180
KΩ
5/14
STA5100
ELECTRICAL CHARACTERISTCS (continued)
Symbol
Parameter
Test Condition
Min.
IO = 1A
Typ.
Max.
Unit
100
200
mΩ
Rdson
Output power Rdson
OLG
Open Loop Voltage Gain
100
dB
GB
Unity Gain Bandwidth
1.4
MHz
SR
Slew Rate
7
V/µs
PROTECTION
Vstby
Stby voltage range
0
0.8
V
Vmute
Mute voltage range
1.6
3
V
Vplay
Play voltage range
4
5
V
Th1
First Over temperature threshold
130
°C
Th2
Second Over temperature
threshold
150
°C
Unbal.
Ground
Upper Unbalancing ground
threshold
Referred to (CD+ - CD-)/2
5
V
Unbal.
Ground
Lower Unbalancing ground
threshold
Referred to (CD+ - CD-)/2
-5
V
Under voltage threshold
|Vs+| + |Vs-|
20
V
Pd_reg.
Power dissipation threshold for
system regulation
Iprot = 50µA; @ Vds = 10V
Pd_max
Switch off power dissipation
threshold
@ Vds = 10V
96
W
Iprot
Protection current slope
for Pd > Pdreg
400
µA/W
Ilct
Limiting Current threshold
UVth
50
11
62
12
13
W
A
I+Vs
Positive supply current
Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)
4
30
30
mA
mA
mA
I-Vs
Negative supply current
Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)
4
30
30
mA
mA
mA
ICD+
Positive traking rail supply current
Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)
100
110
110
µA
mA
mA
ICD-
Negative traking rail supply current Stby (Vstby/mute pin = 0V)
Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)
100
110
110
µA
mA
mA
6/14
STA5100
FUNCTIONAL DESCRIPTION
The circuit contains all the blocks to build a mono amplifier. It is based on the Output Bridge Power Amplifier,
and its protection circuit. Moreover, the compression function and a signal rectifier are added to complete the
circuit.
The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by
the Stby/mute pin:
Standby ( Vpin < 0.8V), Mute (1.6V < Vpin < 3V), and Play (Vpin > 4V).
In the Standby mode all the circuits involved in the signal path are in off condition, instead
in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential.
These voltages can be get by the external RC network connected to Stby/Mute pin.
The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous
condition has been detected. The RC network in these cases is used to delay the Normal operation restore.
The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit,
Under voltage, and output transistor Power sensing as shown in the following table:
Table 1. Protection Implementation
Fault Type
Condition
Protection strategy
Action time
Release time
Chip Over
temperature
Tj > 130 °C
Mute
Fast
Slow Related to
Turn_on sequence
Chip Over
temperature
Tj > 150 °C
Standby
Fast
Slow, Related to
Turn_on sequence
Unbalancing
Ground
|Vgnd| > ((CD+) (CD-))/2 + 5V
Standby
Fast
Slow, Related to
Turn_on sequence
Short circuit
Iout > 12A
Standby
Fast
Slow, related to
Turn_on sequence
Under Voltage
|Vs+| + |Vs-|< 20V
Standby
Fast
Slow, related to
Turn_on sequence
Extra power
dissipation
at output transistor
Pd tr. > 50W
Reducing DIGITAL
CONVERTER output
voltage.
Related to the
DIGITAL
CONVERTER
Related to the
DIGITAL
CONVERTER
Maximum power
dissipation
at output transistor
Pd tr. > 96W
Standby
Fast
Slow, related to
Turn_on sequence
See the POWER PROTECTION paragraph for the details
Compression
An other important function implemented, to avoid high power dissipation and clipping distortion, is the Compression of the signal input. In fact the preamplifier stage performs a voltage gain equal to 5, fixed by Ri and Rr
external resistor, but in case of high input signal or low power supply voltage, its gain could be reduced of 26dB.
This function is obtained with a feedback type compressor that , in practice, reduces the impedance of the external feedback network. The behavior of compression it's internally fixed but depends from the Audio input voltage signal level, and from the Threshold voltage applied to the Threshold pin. The attack and release time are
programmable by the external RC network connected to the Att_Rel pins.
The constraints of the circuit in the typical application are the following:
Vthreshold range
= -5 to 0
Vin peak max
= 8V
Vout peak max
= 10V
7/14
STA5100
Gain without compression (G)
=5
Max Attenuation ratio
= 26 dB
The following graph gives the representation of the Compressor activation status related to the Vthreshold and
the input voltage. The delimitation line between the two fields, compression or not, is expressed by the formula :
2 ⋅ Vthresh old
V in = ------------------------------------------G
Where G is the preamplifier gain without compression.
In the compression region the gain of the preamplifier will be reduced
(G = 2·Vthreshold/Vin) to maintain at steady state the output voltage equal 2*|Vthreshold| .
Instead in the other region the compressor will be off (G = 5).
The delimitation line between the two fields can be related to the output voltage of the preamplifier: in this case
the formula is :
V o ut = 2 ⋅ Vthre sho ld
Figure 1. Compressor activation field
VIN PEAK
8
6
COMPRESSION
G<5
4
2
G=5
D01AU1264
1
2
3
4
5
|Vthreshold|
The relative attenuation introduced by the variable gain cell is the following :
V th
2
Attenu atio n = 20 log --- ⋅ ---------------------5 V in _peak
The total gain of the stage will be:
Gdb = 20log5 + Attenuation
The maximum input swing is related to the value of input resistor, to guarantee that the input current remain
under Iin_Max value (1 mA).
V in_peak
R i > ---------------------I in_max
8/14
STA5100
Figure 2. Compressor attenuation vs. input amplitude
Attenuation(dB)
0
-6
|Vth
-12
=5|
|Vth
-18
|Vt
=2.
5|
h=
1|
-24
D01AU1265
1
2
3
4
5
6
7
8
|Vinpk|
ABSOLUTE VALUE BLOCK
The absolute value block rectifies the signal after the compression to extract the control voltage for the external
digital converter. The output voltage swing is internally limited, the gain is internally fixed to 14.
The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the
rectification (between Out_pre and Trk pins).
OUTPUT BRIDGE
The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two
power amplifiers, one in non-inverting configuration with gain equal to 2 and the other in inverting configuration
with unity gain. To guarantee the high input impedance at the input pins, Pwr_Inp1 and Pwr_Inp2, the second
amplifier stages are driven by the output of the first stages respectively.
POWER PROTECTION
To protect the output transistors of the power bridge a power detector is implemented (fig 3).
The current flowing in the power bridge and trough the series resistor Rsense is measured reading the voltage
drop between CD+1 and CD+. In the same time the voltage drop on the relevant power (Vds) is internally measured. These two voltages are converted in current and multiplied: the resulting current , Ipd, is proportional to
the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the reference current Ipda, if bigger (dissipated power > 50W) a current, Iprot, is supplied to the Protection pin. The
aim of the current Iprot is to reduce the reference voltage for the digital converter supplying the power stage of
the chip, and than to reduce the dissipated power. The response time of the system must be less than 200µSec
to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated
value is higher then 96W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is
restarted.
9/14
STA5100
Figure 3. Power Protection Block Diagram
RSENSE
CD+
CD+P
ILOAD
V/I
OC1
ILIM
MULTIPLIER
CURRENT COMP
X
PDP1
IPD
V/I
IPDP
I_PD
TO TURN-ON/OFF
SEQUENCE
CURRENT COMP
IPD
OPA
TO TURN-ON/OFF
SEQUENCE
IPROT
TO PROT PAD
OPA
IPDA
OUTP
CD-
D01AU1282
OUTP
In fig. 4 there is the power protection strategy pictures. Under the curve of the 50W power, the chip is in normal
operation, over 96W the chip is forced in Standby. This last status would be reached if the digital converter does
not respond quikly enough reducing the stress to less than 96W.
The fig.5 gives the protection current, Iprot, behavior. The current sourced by the pin Prot follows the formula:
–4
( Pd – Pd_av _th ) ⋅ 5 ⋅ 10
Iprot ≡ -----------------------------------------------------------------1.25V
for Pd < Pd_av_th the Iprot = 0
Independently of the output voltage, the chip is also shut down in the folowing conditions:
When the currentthrough the sensing resistor, R sense, reaches 12A (Voltage drop (CD+) - (CD+1) = 700mV).
When the average junction temperature of the chip reaches 150°C.
When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)-(CD-))/2
When the sum of the supply voltage |Vs+| + |Vs-| <20V
The output bridge is muted when the average junction temperature reaches 130°C.
10/14
STA5100
Figure 4. Power protection threshold
Figure 5. Protection current behaviour
Ids(mA)
Iprot(mA)
Ilim=12A
12
20
10
Standby
k
Buc
8
Pd_Max=96W
Lim
6
it a
10
on
ti
4
2
Iprot slope=0.4mA/W
Pd_reg=50W
Normal
Operation
0
10
20
30
34
40
50
Vds(V)
D01AU1303
20
D01AU1304
40
60
80
100
120
Pd(W)
Figure 6. Test and Application Circuit
C3
C12
C4
R2
INPUT1
OUT_PRE
R1
8
R4
R6
R5
C1
TRK
9
PWR_INP
10
7
4
OUTP
OUTP
IN_PRE
R3
ATT_REL
5V
3
5
R10
CD+P
CD+
CD+
R11
R16
C8
CD+N
+VS
+VS
C10
R15
C11
-VS
-VS
CD-
CD-N
CD-P
TRK-OUT
TRK-OUT
PROT
R13
15
THRESH
R12
11
22
STBY/
MUTE
R14
C9
14
PROT
THRESH
MUTE
STBY
R15
STA5100
13
24
OUTN
C7
-VS
D1
R14
6
C6
GND
C9
R13
OUTP
C2
27
1
OUTN
23
OUTN
2
26
16
12
17
D01AU1305
11/14
STA5100
EXTERNAL COMPONENTS
Name
Function
Value
Formula
Ri
R1
Input resistor
10KΩ
(|G| = 5, Rr = 50KΩ)
Rr
R i = ------G
Rr
R2
Feedback resistor
50KΩ
(|G| = 5, Ri = 10KΩ
Rr = G ⋅ Rr
Cac
C1
AC Decoupling capacitor
100nF
(fp = 16Hz,
Rac =100KΩ )
1
Cac = --------------------------------2π ⋅ fp ⋅ Rac
Cct
C2
Capacitor for the attack time
2.2µF
(Tattack = 13mSec,
Vcontrol = 9V,
Ict = 1.5mA)
Ict
Cct = attack ------------------------Vcontrol
R3
Release constant time Resistor
470KΩ
(t = 1 Sec. ,
Cct = 2.2 µF )
τ
Rct = --------Cct
R4
Resistor for tracking input voltage
filter
10KΩ
R5
Resistor for tracking input voltage
filter
56KΩ
R6
Resistor for tracking input voltage
filter
10KΩ
C3
Capacitor for Tracking input
voltage filter
1nF
C4
Dc decoupling capacitor
1µF
R7
Bias Resistor for Stby/Mute
function
10KΩ
R8
Stby/Mute constant time resistor
30KΩ
R9
Mute resistor
30KΩ
C5
Capacitor for Stby/Mute resistor
2.2µF
R10 = R11
Sensing resistor for SOA detector
60mΩ
5% 4W
R12
Conversion resistor for threshold
voltage
100KΩ
Power supply filter capacitor
100nF
C6 = C7
R15 = R16
C8 = C9
Centering resistor
Tracking rail power supply filter
680nF
R13
Protection
1KΩ
R14
TRK_out
40KΩ
C10 = C11
Power supply filter capacitor
470 µF , 63V
C12
Feedback capacitor
100pF
D1
Schottky diode
SB360
Note: Vcontrol is the voltage at Att_Rel pin.
12/14
400 Ω , 1W
STA5100
DIM.
MIN.
4.45
1.80
A
B
C
D
E
F (1)
G
G1
H (2)
H1
H2
H3
L (2)
L1
L2 (2)
L3
L4
L5
M
M1
N
O
R
R1
R2
R3
R4
V
V1
V2
V3
0.75
0.37
0.80
25.75
28.90
22.07
18.57
15.50
7.70
3.70
3.60
mm
TYP.
4.50
1.90
1.40
0.90
0.39
1.00
26.00
29.23
17.00
12.80
0.80
22.47
18.97
15.70
7.85
5
3.5
4.00
4.00
2.20
2
1.70
0.5
0.3
1.25
0.50
MAX.
4.65
2.00
MIN.
0.175
0.070
1.05
0.42
0.57
1.20
26.25
29.30
0.029
0.014
22.87
19.37
15.90
7.95
0.869
0.731
0.610
0.303
4.30
4.40
0.145
0.142
0.031
1.014
1.139
inch
TYP.
0.177
0.074
0.055
0.035
0.015
0.040
1.023
1.150
0.669
0.503
0.031
0.884
0.747
0.618
0.309
0.197
0.138
0.157
0.157
0.086
0.079
0.067
0.02
0.12
0.049
0.019
MAX.
0.183
0.079
OUTLINE AND
MECHANICAL DATA
0.041
0.016
0.022
0.047
1.033
1.153
0.904
0.762
0.626
0.313
0.169
0.173
5˚ (Typ.)
3˚ (Typ.)
20˚ (Typ.)
45˚ (Typ.)
Flexiwatt27 (vertical)
(1): dam-bar protusion not included
(2): molding protusion included
V
C
B
V
H
H1
V3
A
H2
O
H3
R3
L4
R4
V1
R2
L2
N
L3
R
L
L1
V1
V2
R2
D
R1
L5
Pin 1
R1
R1
E
G
G1
F
FLEX27ME
M
M1
7139011
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STA5100
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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