STMICROELECTRONICS STB60NF03L

STB60NF03L

N-CHANNEL 30V - 0.008 Ω - 60A D2PAK
STripFET POWER MOSFET
PRELIMINARY DATA
T YPE
STB60NF03L
■
■
■
■
V DSS
R DS(on)
ID
30 V
< 0.01 Ω
60 A
TYPICAL RDS(on) = 0.008 Ω
OPTIMIMIZED FOR HIGH SWITCHING
OPERATIONS
LOW THRESHOLD DRIVE
LOGIC LEVEL GATE DRIVE
3
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronics unique ”Single Feature
Size” strip-based process. The resulting
transistor shows extremely high packing density
for low on-resistance, rugged avalance
characteristics and less critical alignment steps
therefore
a
remarkable
manufacturing
reproducibility.
1
D2PAK
TO-263
ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ LOW VOLTAGE DC-DC CONVERTERS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ HIGH EFFICIENCY SWITCHING CIRCUITS
ABSOLUTE MAXIMUM RATINGS
Symbol
V DS
V DGR
V GS
Value
Un it
Drain-source Voltage (VGS = 0)
Parameter
30
V
Drain- gate Voltage (R GS = 20 kΩ)
30
V
± 20
V
G ate-source Voltage
o
ID
Drain Current (continuous) at Tc = 25 C
60
A
ID
Drain Current (continuous) at Tc = 100 C
o
42
A
Drain Current (pulsed)
240
A
T otal Dissipation at Tc = 25 C
100
W
Derating Factor
0.67
W /o C
Single Pulse Avalanche Energy
650
mJ
I DM (•)
P tot
E AS ( 1 )
Ts tg
Tj
o
Storage Temperature
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
September 1999
-65 to 175
o
C
175
o
C
( 1) starting Tj = 25 oC, ID = 30A , VDD = 20V
1/6
STB60NF03L
THERMAL DATA
R thj -case
R thj -amb
Tl
Thermal Resistance Junction-case
Max
Thermal Resistance Junction-ambient
Max
Maximum Lead Temperature F or Soldering Purpose
o
1.5
62.5
300
o
C/W
C/W
o
C
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbo l
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Con ditions
I D = 250 µA
V GS = 0
I DSS
V DS = Max Rating
Zero Gate Voltage
Drain Current (V GS = 0) V DS = Max Rating
IGSS
Gate-body Leakage
Current (VDS = 0)
Min.
Typ.
Max.
30
Unit
V
T c =125 oC
V GS = ± 20 V
1
10
µA
µA
± 100
nA
ON (∗)
Symbo l
Parameter
Test Con ditions
ID = 250 µA
V GS(th)
Gate Threshold Voltage V DS = V GS
R DS(on)
Static Drain-source On
Resistance
V GS = 10V
V GS = 4.5V
I D(o n)
On State Drain Current
V DS > ID(o n) x R DS(on )ma x
V GS = 10 V
Min.
Typ.
Max.
Unit
1
1.5
2.5
V
0.008
0.0095
0.01
0.015
Ω
Ω
ID = 30 A
ID = 30 A
60
A
DYNAMIC
Symbo l
g f s (∗)
C iss
C os s
C rss
2/6
Parameter
Test Con ditions
Forward
Transconductance
V DS > ID(o n) x R DS(on )ma x
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
I D =30 A
V GS = 0
Min.
Typ.
Max.
Unit
60
S
2550
630
215
pF
pF
pF
STB60NF03L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
Parameter
Test Con ditions
Min.
Typ.
Max.
Unit
t d(on)
tr
Turn-on Delay T ime
Rise Time
V DD = 15 V
I D = 30 A
R G = 4.7 Ω
V GS = 4.5 V
(Resistive Load, see fig. 3)
40
250
Qg
Q gs
Q gd
Total G ate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 24 V ID = 60 A V GS = 5 V
43
12
21
58
nC
nC
nC
Typ.
Max.
Unit
ns
ns
SWITCHING OFF
Symbo l
t d(of f)
tf
Parameter
Turn-off Delay T ime
Fall T ime
Test Con ditions
Min.
60
70
V DD = 15 V
I D = 30 A
V GS = 4.5 V
R G = 4.7 Ω
(Resistive Load, see fig. 3)
ns
ns
SOURCE DRAIN DIODE
Symbo l
Parameter
Test Con ditions
ISD
I SDM (•)
Source-drain Current
Source-drain Current
(pulsed)
V SD (∗)
Forward On Voltage
I SD = 60 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 60 A
di/dt = 100 A/µs
T j = 150 o C
V DD = 15 V
(see test circuit, fig. 5)
t rr
Q rr
I RRM
Min.
Typ.
V GS = 0
Max.
Unit
60
240
A
A
1.5
V
75
ns
100
nC
2.6
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
3/6
STB60NF03L
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
4/6
STB60NF03L
TO-263 (D2PAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.21
1.36
0.047
0.053
D
8.95
9.35
0.352
0.368
E
10
10.4
0.393
0.409
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.624
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
D
C2
A2
A
C
DETAIL”A”
DETAIL ”A”
A1
B2
E
B
G
L2
L
L3
P011P6/E
5/6
STB60NF03L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
6/6
http://www.st.com
.