STP80NF03L-04 N-CHANNEL 30V - 0.0034 Ω - 80A TO-220 STripFET POWER MOSFET PRELIMINARY DATA T YPE V DSS R DS(on) ID STP80NF03L-04 30 V < 0.004 Ω 80 A ■ ■ ■ ■ ■ TYPICAL RDS(on) = 0.0034 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE 100 oC APPLICATION ORIENTED CHARACTERIZATION 3 DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 1 2 TO-220 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SOLENOID AND RELAY DRIVERS ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC & DC-AC CONVERTERS ■ AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc. ) ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR VGS I D(••) ID I DM (•) P tot E AS ( 1 ) T st g Tj Value Unit Drain-source Voltage (VGS = 0) Parameter 30 V Drain- gate Voltage (R GS = 20 kΩ) 30 V ± 20 V 80 A Drain Current (continuous) at Tc = 100 o C 56 A Drain Current (pulsed) 320 A G ate-source Voltage Drain Current (continuous) at Tc = 25 oC o T otal Dissipation at Tc = 25 C 210 W Derating Factor 1.43 W /o C Single Pulse Avalanche Energy 2 Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area November 1999 (••) Current limited by package J -65 to 175 o C 175 o C (1) starting Tj = 25 oC, ID =40A , VDD =15V 1/6 STP80NF03L-04 THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 0.7 62.5 0.5 300 C/W oC/W o C/W o C ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 30 Unit V 1 10 µA µA ± 100 nA Typ. Max. Unit 1.7 2.5 T c =125 oC V GS = ± 20 V ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On Resistance V GS = 10V V GS = 4.5V I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 1 0.0034 0.004 0.0042 0.0055 ID = 40 A ID = 40 A 80 V Ω Ω A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/6 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =15 A V GS = 0 Min. Typ. Max. Unit 50 S 7000 1700 600 pF pF pF STP80NF03L-04 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 15 V I D = 40 A R G = 4.7 Ω V GS = 4.5 V (Resistive Load, see fig. 3) 50 275 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V ID = 80 A V GS = 4.5 V 120 37 58 160 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbo l Parameter Test Con ditions Min. t d(of f) tf Turn-off Delay T ime Fall T ime V DD = 15 V I D = 40 A V GS = 4.5 V R G = 4.7 Ω (Resistive Load, see fig. 3) 230 190 ns ns tr (Voff) tf tc Off-voltage Rise T ime Fall T ime Cross-over Time V clamp = 24 V I D = 80 A V GS = 4.5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) 175 280 470 ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 80 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 80 A di/dt = 100 A/µs T j = 150 o C V DD = 20 V (see test circuit, fig. 5) t rr Q rr I RRM Min. Typ. V GS = 0 Max. Unit 80 320 A A 1.5 V 88 ns 0.176 µC 4.4 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/6 STP80NF03L-04 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STP80NF03L-04 TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 14.0 0.511 L2 16.4 L4 0.645 13.0 0.551 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L5 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 5/6 STP80NF03L-04 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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