STB85NF3LL N-CHANNEL 30V - 0.006Ω - 85A D2PAK LOW GATE CHARGE STripFET™II POWER MOSFET TYPE STB85NF3LL ■ ■ ■ ■ ■ VDSS RDS(on) ID 30 V < 0.008 Ω 85 A TYPICAL RDS(on) = 0.0075Ω (@4.5V) OPTIMAL RDS(on) x Qg TRADE-OFF @4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL 3 1 D2PAK DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronics unique “ Single Feature Size” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS VGSM Parameter Value Unit Drain-source Voltage (VGS = 0) 30 V Drain-gate Voltage (RGS = 20 kΩ) 30 V Gate- source Voltage ± 16 V Gate-source Voltage Pulsed (tp≤50µs; duty cycle 25%; Tj ≤ 150°C) ± 20 V ID Drain Current (continuos) at TC = 25°C 85 A ID Drain Current (continuos) at TC = 100°C 60 A Drain Current (pulsed) 340 A Total Dissipation at TC = 25°C 110 W IDM (l) PTOT Derating Factor Tstg Tj Storage Temperature Max. Operating Junction Temperature 0.73 W/°C –65 to 175 °C 175 °C (●) Pulse width limited by safe operating area November 2001 1/9 STB85NF3LL THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1.36 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 30 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ± 16V ±100 nA Max. Unit ON (1) Symbol Parameter VGS(th) Gate Threshold Voltage RDS(on) Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA Min. Typ. 1 V VGS = 10V, ID = 40 A 0.006 0.008 Ω VGS = 4.5V, ID = 40 A 0.0075 0.0095 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) 2/9 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID = 40 A VDS = 25V, f = 1 MHz, VGS = 0 Min. 30 S 2210 pF Ciss Input Capacitance Coss Output Capacitance 635 pF Crss Reverse Transfer Capacitance 138 pF STB85NF3LL ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions Min. VDD = 15V, ID = 30A RG = 4.7Ω VGS = 4.5V (see test circuit, Figure 3) VDD = 24V, ID = 60A, VGS = 4.5V Typ. Max. Unit 22 ns 130 ns 30 9 12.5 40 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol td(off) tf td(off) tf tc Parameter Test Conditions Min. Turn-off-Delay Time Fall Time VDD = 15V, ID = 30A, RG = 4.7Ω, VGS = 4.5V (see test circuit, Figure 3) 36.5 36.5 ns ns Off-voltage Rise Time Fall Time Cross-over Time Vclamp =24V, ID =30A RG = 4.7Ω, VGS = 4.5V (see test circuit, Figure 5) 32 23 40 ns ns ns SOURCE DRAIN DIODE Symbol Max. Unit Source-drain Current 85 A ISDM (2) Source-drain Current (pulsed) 340 A VSD (1) Forward On Voltage ISD = 85A, VGS = 0 1.3 V Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 85A, di/dt = 100A/µs, VDD = 15V, Tj = 150°C (see test circuit, Figure 5) ISD trr Qrr IRRM Parameter Test Conditions Min. Typ. 65 105 3.4 ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/9 STB85NF3LL Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STB85NF3LL Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STB85NF3LL Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STB85NF3LL D2PAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 E 8 0.315 10 E1 10.4 0.393 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.015 0º 8º 3 V2 0.4 7/9 1 STB85NF3LL D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. mm MIN. A DIM. mm inch MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 * on sales type 8/9 0.075 0.082 0.933 0.956 MAX. MIN. 330 B 1.5 C 12.8 D 20.2 G 24.4 N 100 T TAPE MECHANICAL DATA inch MAX. 12.992 0.059 13.2 0.504 0.520 26.4 0.960 1.039 0795 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 STB85NF3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2001 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 9/9