STS10NF30L N - CHANNEL 30V - 0.011Ω - 10A SO-8 STripFET POWER MOSFET PRELIMINARY DATA TYPE STS10NF30L ■ ■ ■ V DSS R DS( on) ID 30 V < 0.0135 Ω 10 A TYPICAL RDS(on) = 0.011 Ω STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique ” Single Feature Size ” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. SO-8 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC MOTOR DRIVE ■ DC-DC CONVERTERS ■ BATTERY MANAGMENT IN NOMADIC EQUIPMENT ■ POWER MANAGEMENT IN PORTABLE/DESKTOP PCs ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR V GS ID I DM (•) P tot Parameter Value Un it Drain-source Voltage (V GS = 0) 30 V Drain- gate Voltage (R GS = 20 kΩ) 30 V ± 20 V Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 o C 10 6.5 A A Drain Current (pulsed) 40 A 2.5 W G ate-source Voltage o o T otal Dissipation at Tc = 25 C (•) Pulse width limited by safe operating area June 2000 1/6 STS10NF30L THERMAL DATA R thj -amb Tj Ts tg (*)Thermal Resistance Junction-ambient Maximum Operating Junction T emperature Storage Temperature o 50 150 -55 to 150 C/W o C o C (*) Mounted on FR-4 board (t ≤ 10sec) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 30 Unit V T c = 125 oC V GS = ± 20 V 1 10 µA µA ± 100 nA Max. Unit ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On Resistance V GS = 10 V V GS = 4.5 V I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 1 ID = 5 A ID = 5 A Typ. 1.6 2.5 V 0.011 0.016 0.0135 0.0220 Ω Ω 10 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/6 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz Min. Typ. Max. Unit ID = 5 A 20 S V GS = 0 V 1450 390 150 pF pF pF STS10NF30L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 15 V ID = 5 A R G = 4.7 Ω V GS = 4.5 V (Resistive Load, see fig. 3) 25 280 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V ID = 10 A V GS = 10 V 25 11 12 35 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbo l t d(of f) tf Parameter Turn-off Delay T ime Fall T ime Test Con ditions Min. 40 60 V DD = 15 V ID = 5 A V GS = 4.5 V R G = 4.7 Ω (Resistive Load, see fig. 3) ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 10 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 10 A di/dt = 100 A/µs T j = 150 o C V DD = 15 V (see test circuit, fig. 5) t rr Q rr I RRM Min. Typ. V GS = 0 Max. Unit 10 40 A A 1.2 V 45 ns 52 nC 2.3 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/6 STS10NF30L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STS10NF30L SO-8 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M S 0.6 0.023 8 (max.) 0016023 5/6 STS10NF30L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6