STP75NE75 STP75NE75FP N - CHANNEL 75V - 0.01Ω - 75A TO-220/TO-220FP STripFET POWER MOSFET TYPE V DSS R DS(on) ID STP75NE75 STP75NE75FP 75 V 75 V < 0.013 Ω < 0.013 Ω 75 A 40 A ■ ■ ■ ■ TYPICAL RDS(on) = 0.01 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION 3 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 1 3 2 2 1 TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SOLENOID AND RELAY DRIVERS ■ DC MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC CONVERTERS ■ AUTOMOTIVE ENVIRONMENT ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value STP75NE75 V DS V DGR Un it STP75NE75FP Drain-source Voltage (VGS = 0) 75 V Drain- gate Voltage (RGS = 20 kΩ) 75 V ± 20 V GS ID Gate-source Voltage Drain Current (continuous) at T c = 25 o C 75 40 V A ID Drain Current (continuous) at T c = 100 oC 53 28 A Drain Current (pulsed) 300 160 A Total Dissipation at T c = 25 oC 160 50 W Derating F actor 1.06 0.37 W /o C I DM (•) P tot V ISO Insulation Withstand Voltage (DC) dv/dt Peak Diode Recovery voltage slope Ts tg Tj Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area May 1999 2000 7 -65 to 175 175 V V/ns o o C C ( 1) ISD ≤75 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/9 STP75NE75/FP THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max TO-220 TO-220FP 0.94 2.7 Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose 62.5 0.5 300 o C/W o C/W C/W o C o AVALANCHE CHARACTERISTICS Symbo l Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 75 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 30V) 200 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 75 Unit V T c = 125 oC V GS = ± 20 V 1 10 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID = 37.5 A I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. Typ. Max. Unit 2 3 4 V 0.01 0.013 Ω 75 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/9 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =37.5 A V GS = 0 Min. Typ. Max. Unit 40 S 5300 850 310 pF pF pF STP75NE75/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 40 V I D = 40 A R G = 4.7 Ω V GS = 10 V (Resistive Load, see fig. 3) 32 130 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 60 V ID = 75 A V GS = 10 V 150 30 62 200 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbo l Parameter Test Con ditions Min. t d(of f) tf Turn-off Delay T ime Fall T ime V DD = 40 V I D = 40 A V GS = 10 V R G = 4.7 Ω (Resistive Load, see fig. 3) 150 45 ns ns tr (Voff) tf tc Off-voltage Rise T ime Fall T ime Cross-over Time V clamp = 60 V I D = 75 A V GS = 4.5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) 35 60 100 ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 75 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 75 A di/dt = 100 A/µs T j = 150 o C V DD = 30 V (see test circuit, fig. 5) t rr Q rr I RRM Min. Typ. Max. Unit 43 170 A A 1.5 V V GS = 0 130 ns 0.6 µC 9 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP75NE75/FP Thermal Impedance for TO-220 Thermal Impedance forTO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP75NE75/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP75NE75/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP75NE75/FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 14.0 0.511 L2 16.4 L4 0.645 13.0 0.551 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L5 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/9 STP75NE75/FP TO-220FP MECHANICAL DATA mm DIM. MIN. A 4.4 inch TYP. MAX. MIN. TYP. MAX. 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F F1 L7 F2 H G G1 ¯ 1 2 3 L2 8/9 L4 STP75NE75/FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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