STU16NB50 N-CHANNEL 500V - 0.28Ω - 15.6A-Max220 PowerMESH MOSFET TYPE ST U16NB50 ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 500 V < 0.33 Ω 15.6 A TYPICAL RDS(on) = 0.28 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED ± 30V GATE TO SOURCE VOLTAGE RATING DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 1 2 3 Max220 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS SWITCH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ■ ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS Parameter Value Un it Drain-source Voltage (V GS = 0) 500 V Drain- gate Voltage (R GS = 20 kΩ) 500 V ± 30 V G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C 15.6 A ID Drain Current (continuous) at Tc = 100 oC 9.8 A Drain Current (pulsed) 62 A I DM (•) P tot dv/dt( 1 ) Ts tg Tj o T otal Dissipation at Tc = 25 C 160 W Derating Factor 1.28 W /o C 4.5 V/ns Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area September 1999 -65 to 150 o C 150 o C ( 1) ISD ≤16A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/6 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. STU16NB50 THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose o 0.78 62.5 0.5 300 C/W oC/W o C/W o C Max Valu e Unit AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 15.6 A E AS Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , VDD = 50 V) 850 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions Min. o I D = 250 µA V GS = 0 @ 100 C I DSS V DS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) T yp. Max. 500 Unit V T c = 125 oC V GS = ± 30 V 1 50 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage R DS(on) Static Drain-source O n V GS = 10V Resistance I D(o n) V DS = V GS Min. T yp. Max. Unit 3 4 5 V 0.28 0.33 Ω ID =7.8 A 15.6 On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/6 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse T ransfer Capacitance V DS = 25 V f = 1 MHz I D =7.8 A V GS = 0 Min. T yp. Max. 9 Unit S 2850 400 42 3710 520 55 pF pF pF STU16NB50 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l T yp. Max. Unit t d(on) tr Turn-on Time Rise Time Parameter V DD = 250 V R G = 4.7 Ω Test Con ditions ID = 7.8 A VGS = 10 V Min. 30 15 42 21 ns ns Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V I D =15.6 A V GS = 10 V 67 20 30 88 nC nC nC T yp. Max. Unit 20 15 35 26 21 49 ns ns ns T yp. Max. Unit 15.6 62 A A SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Con ditions Min. V DD = 400 V ID = 15.6 A R G = 4.7 Ω V GS = 10 V SOURCE DRAIN DIODE Symbo l ISD I SDM (•) V SD (∗) t rr Q rr I RRM Parameter Test Con ditions Min. Source-drain Current Source-drain Current (pulsed) Forward On Voltage I SD = 15.6 A V GS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 15.6 A V DD = 100 V di/dt = 100 A/µs T j = 150 o C 1.6 V 600 ns 6.8 µC 22.5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/6 STU16NB50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STU16NB50 Max220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.3 4.6 0.169 0.181 A1 2.2 2.4 0.087 0.094 A2 2.9 3.1 0.114 0.122 b 0.7 0.93 0.027 0.036 b1 1.25 1.4 0.049 0.055 b2 1.2 1.38 0.047 0.054 c 0.45 0.6 0.18 0.023 D 15.9 16.3 0.626 0.641 D1 9 9.35 0.354 0.368 D2 0.8 1.2 0.031 0.047 D3 2.8 3.2 0.110 0.126 e 2.44 2.64 0.096 0.104 E 10.05 10.35 0.396 0.407 L 13.2 13.6 0.520 0.535 L1 3 3.4 0.118 0.133 D1 D2 A1 A2 A C D3 b b2 b1 D e E L1 L P011R 5/6 STU16NB50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 6/6 http://www.st.com .