STD4NC50 N - CHANNEL 500V - 1.3 Ω - 3.7 A TO-251 PowerMESH MOSFET TYPE ST D4NC50 ■ ■ ■ ■ ■ V DSS R DS(on) ID 500 V < 1.5 Ω 3.7 A TYPICAL RDS(on) = 1.3 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED 3 2 DESCRIPTION The PowerMESHII is the evolution of the first generation of MESH OVERLAY. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns switching speed, gate charge and ruggedness. APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER 1 IPAK TO-251 (Suffix ”-1”) INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR Parameter Value Un it Drain-source Voltage (VGS = 0) 500 V Drain- gate Voltage (R GS = 20 kΩ) 500 V G ate-source Voltage ± 30 V ID Drain Current (continuous) at Tc = 25 o C 3.7 A ID o Drain Current (continuous) at Tc = 100 C 2.3 A Drain Current (pulsed) 14.8 A V GS I DM (•) P tot dv/dt( 1) Ts tg Tj o T otal Dissipation at Tc = 25 C 50 W Derating Factor 0.4 W /o C 3 V/ns Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area September 1999 -65 to 150 o C 150 o C ( 1) ISD ≤3.7 A, di/dt ≤ 100 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STD4NC50 THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 2.5 100 1.5 275 C/W oC/W o C/W o C Max Value Unit AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 3.7 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) 220 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 500 Unit V T c = 125 oC V GS = ± 30 V 1 50 µA µA ± 100 nA Max. Unit ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID = 1.9 A I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 2 Typ. 3 4 V 1.3 1.5 Ω 3.7 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D = 1.9 A V GS = 0 Min. Typ. Max. Unit 3 S 700 85 9 pF pF pF STD4NC50 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions t d(on) tr Turn-on Time Rise Time V DD = 250 V I D = 1.9 A V GS = 10 V R G = 4.7 Ω (see test circuit, figure 3) Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V Min. Typ. Max. 11.5 9 I D = 3.7 A VGS = 10 V Unit ns ns 18 6 8 25 nC nC nC Typ. Max. Unit SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions Min. 7 6 13 V DD = 400 V I D = 3.7 A R G = 4.7 Ω VGS = 10 V (see test circuit, figure 5) ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 3.7 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 3.7 A di/dt = 100 A/µs T j = 150 o C V DD = 100 V (see test circuit, figure 5) t rr Q rr I RRM Min. Typ. V GS = 0 Max. Unit 3.7 14.8 A A 1.6 V 380 ns 2.3 µC 12 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STD4NC50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STD4NC50 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STD4NC50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STD4NC50 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch MAX. MIN. A 2.2 TYP. 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 TYP. MAX. 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B6 = 1 = 2 G = = = E B2 = 3 B5 L D B3 L2 L1 0068771-E 7/8 STD4NC50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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