STB19NB20 N - CHANNEL ENHANCEMENT MODE PowerMESH MOSFET TYPE ST B19NB20 ■ ■ ■ ■ ■ ■ V DSS 200 V R DS(on) < 0.180 Ω ID 19 A TYPICAL RDS(on) = 0.150 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of Power MOSFETs with outstanding performance. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 3 1 D2PAK TO-263 (suffix ”T4”) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITCH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR V GS ID ID I DM (•) P tot dv/dt( 1) T s tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 kΩ) G ate-source Voltage Drain Current (continuous) at Tc = 25 oC o Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) T otal Dissipation at Tc = 25 oC Derating Factor Peak Diode Recovery voltage slope Storage T emperature Max. O perating Junct ion T emperature (•) Pulse width limited by safe operating area June 1998 Value 200 200 ± 30 19 12 76 125 1 5.5 -65 to 150 150 Unit V V V A A A W W /o C V/ns o C o C ( 1) ISD ≤ 19A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STB19NB20 THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case 1 o C/W 62.5 0.5 300 o C/W C/W o C Max Value Unit Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 19 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) 580 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) Min. V GS = 0 Typ. Max. 200 Unit V 1 10 µA µA ± 100 nA Max. Unit 4 5 V 0.150 0.180 Ω o T c = 125 C V GS = ± 30 V ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID = 9.5 A I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 3 Typ. 19 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =9.5 A V GS = 0 Min. Typ. Max. 3 Unit S 1000 285 45 1350 385 60 pF pF pF STB19NB20 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Typ. Max. Unit t d(on) tr Turn-on Time Rise Time Parameter V DD = 100 V I D = 9.5 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 3) Test Con ditions Min. 15 15 20 20 ns ns Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 160 V 29 9.5 13 40 nC nC nC Typ. Max. Unit 10 10 20 15 15 30 ns ns ns Typ. Max. Unit 19 76 A A 1.5 V I D = 19 A V GS = 10 V SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions Min. V DD = 160 V I D = 19 A R G = 4.7 Ω VGS = 10 V (see test circuit, figure 5) SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD =19 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD =19 A di/dt = 100 A/µs o Tj = 150 C V DD = 50 V (see test circuit, figure 5) t rr Q rr I RRM Min. V GS = 0 210 ns 1.5 µC 14.5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STB19NB20 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STB19NB20 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STB19NB20 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STB19NB20 TO-263 (D2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 E 10 10.4 0.393 0.409 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 D C2 A2 A C DETAIL”A” DETAIL ”A” A1 B2 E B G L2 L L3 P011P6/E 7/8 STB19NB20 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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