TDA7344 DIGITAL CONTROLLED AUDIO PROCESSOR WITH SURROUND SOUND MATRIX 1 STEREO INPUT VOLUME CONTROL IN 1.25dB STEP TREBLE AND BASS CONTROL THREE SURROUND MODES ARE AVAILABLE: – MOVIE, MUSIC AND SIMULATED FOUR SPEAKER ATTENUATORS: – 4 INDEPENDENT SPEAKERS CONTROL IN 1.25dB STEPS FOR BALANCE FACILITY – INDEPENDENT MUTE FUNCTION ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS DESCRIPTION The TDA7344 is a volume tone (bass and treble) balance (Left/Right) processor for quality audio applications in car radio and Hi-Fi systems. It reproduces surround sound by using phase PQFP44 (10 X 10) SDIP42 ORDERING NUMBERS: TDA7344P (PQFP44) TDA7344S (SDIP42) shifters and a signal matrix. Control of all the functions is accomplished by serial bus. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. Thanks to the used BIPOLAR/CMOS Technology, Low Distortion, Low Noise and DC stepping are obtained. PIN CONNECTIONS February 1997 1/20 TDA7344 BLOCK DIAGRAM 2/20 TDA7344 TEST CIRCUIT THERMAL DATA Symbol R th j-pins Description Thermal Resistance Junction-pins Value Unit 85 °C/W Ma x. ABSOLUTE MAXIMUM RATINGS Symbol VS Parameter Value Operating Supply Voltage T amb Operating Ambient Temperature Tstg Storage Temperature Range Unit 11 V -10 to 85 °C -55 to +150 °C QUICK REFERENCE DATA Symbol Parameter Min. Typ. Max. 9 10.5 Unit VS Supply Voltage 7 VCL Max. input signal handling 2 THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.02 S/N Signal to Noise Ratio V out = 1Vrms (made = OFF) 106 dB SC Channel Separation f = 1KHz 70 dB Volume Control Treble Control 1.25dB step (2db step) Bass Control (2db step) Balance Control Mute Attenuation 1.25dB step (LCH, RCH) V Vrms 0.1 % -78.75 0 dB -14 +14 dB -14 +14 dB -38.75 0 90 dB dB 3/20 TDA7344 ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10KΩ, RG = 600Ω, all controls flat (G = 0),Effect Ctrl = -6dB, MODE = OFF; f = 1KHz unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit SUPPLY VS Supply Voltage 7 9 10.5 V IS Supply Current 20 25 35 mA 60 80 SVR Ripple Rejection LCH / RCH out, Mode = OFF dB INPUT STAGE R II Input Resistance V CL Clipping Level C RANGE Control Range THD = 0.3%; Lin or Rin 35 50 2 2.5 Vrms 3.0 Vrms THD = 0.3%; Rin + Lin (2) 65 19.68 KΩ dB AVMIN Min. Attenuation -1 0 1 AVMAX Max. Attenuation 18.68 19.68 20.68 dB ASTEP Step Resolution 0.11 0.31 0.51 dB -3 0 3 mV VDC DC Steps adjacent att. step dB VOLUME CONTROL C RANGE Control Range 70 75 AVMIN Min. Attenuation -1 0 AVMAX Max. Attenuation 70 75 ASTEP dB 1 dB dB Step Resolution Av = 0 to -40dB 0.5 1.25 1.75 dB EA Attenuation Set Error Av = 0 to -20dB Av = -20 to -60dB -1.5 -3 0 1.5 2 dB dB ET Tracking Error 2 dB VDC DC Steps -3 -5 0 0.5 3 5 mV mV adjacent attenuation steps From 0dB to Av max BASS CONTROL (1) Gb BSTEP RB Control Range +11.5 +14 +16 dB Step Resolution Max. Boost/cut 1 2 3 dB Internal Feedback Resistance 32 44 56 KΩ +13 +14 +15 dB 0.5 2 1.5 dB -6 dB TREBLE CONTROL (1) Gt TSTEP Control Range Step Resolution Max. Boost/cut EFFECT CONTROL C RANGE SSTEP 4/20 Control Range Step Resolution - 21 1 dB TDA7344 ELECTRICAL CHARACTERISTICS (continued) SURROUND SOUND MATRIX Symbol Parameter Test Condition Min. Typ. Max. Unit GOFF In-phase Gain (OFF) Mode OFF, Input signal of 1kHz, 1.4 Vp-p, Rin → Rout Lin → Lout -1.5 0 1.5 dB D GOFF LR In-phase Gain Difference (OFF) Mode OFF, Input signal of 1kHz, 1.4 Vp-p (Rin → Rout), (Lin → Lout) -1.5 0 1.5 dB GMOV1 In-phase Gain (Movie 1) Movie mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p R in → Rout, Lin → Lout 7 dB GMOV2 In-phase Gain (Movie 2) Movie mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p R in → Rout, Lin → Lout 8 dB DGMOV LR In-phase Gain Diffrence (Movie) Movie mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p (Rin → Rout) – (Lin → Lout) 0 dB GMUS1 In-phase Gain (Music 1) Music mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p (Rin → Rout) – (Lin → Lout) 6 dB GMUS2 In-phase Gain (Music 2) Music mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p R in → Rout, Lin → Lout 7.5 dB D GMUS LR In-phase Gain Difference (Music) Music mode, Effect Ctrl = -6dB Input signal of 1kHz, 1.4 Vp-p (Rin → Rout) – (Lin → Lout) 0 dB L MON1 Simulated L Output 1 Simulated Mode, EffectCtrl = -6dB Input signal of 250Hz, 1.4 Vp-p, Rin and Lin → Lou t 4.5 dB LMON2 Simulated L Output 2 Simulated Mode, EffectCtrl = -6dB Input signal of 1kHz, 1.4 Vp-p, Rin and Lin → Lou t – 4.0 dB LMON3 Simulated L Output 3 Simulated Mode, EffectCtrl = -6dB Input signal of 3.6kHz, 1.4 Vp-p, Rin and Lin → Lou t 7.0 dB R MON1 Simulated R Output 1 Simulated Mode, EffectCtrl = -6dB Input signal of 250Hz, 1.4 Vp-p, Rin and Lin →R out – 4.5 dB R MON2 Simulated R Output 2 Simulated Mode, EffectCtrl = -6dB Input signal of 1kHz, 1.4 Vp-p, Rin and Lin →R out 3.8 dB R MON3 Simulated R Output 3 Simulated Mode, EffectCtrl = -6dB Input signal of 3.6kHz, 1.4 Vp-p, Rin and Lin → Rout – 20 dB RLP1 Low Pass Filter Resistance 7.5 10 12.5 RPS1 Phase Shifter 1 Resistance 13.5 17.95 22.5 kΩ RPS2 Phase Shifter 2 Resistance 0.3 0.4 0.5 KΩ RPS3 Phase Shifter 3 Resistance 13.6 18.08 22.6 KΩ RPS4 Phase Shifter 4 Resistance 13.6 18.08 22.6 KΩ RHPF High Pass Filter Resistance 45 60 75 KΩ RLPF LP Pin Impedance 7.5 10 12.5 KΩ KΩ 5/20 TDA7344 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit SPEAKER ATTENUATORS Crange Control Range 35 37.5 40 dB SSTEP Step Resolution 0.5 1.25 1.75 dB Attenuation set error -1.5 1.5 dB Output Mute Attenuation 80 EA AMUTE VDC DC Steps 90 dB 0 1 mV mV 70 75 dB adjacent att. steps from 0 to mute SPEAKER ATTENUATORS AUX Crange Control Range SSTEP Step Resolution Av = 0 to -40dB 0.5 1.25 1.75 Attenuation set error Av = 0 to 20dB -1.5 0 1.5 dB -3 0 2 dB 3 mV EA Av = -20 to -60dB VDC AMUTE DC Steps adjacent att. steps Output Mute Attenuation dB -3 0 80 90 dB 2 2.5 Vrms AUDIO OUTPUTS VOCL Clipping Level d = 0.3% ROUT Output resistance 100 200 300 VOUT DC Voltage Level 4.2 4.5 4.8 Ω V 8 15 15 30 µVrms µVrms GENERAL NO(OFF) Output Noise (OFF) BW = 20Hz to 20KHz Output R and L Output AUX R and L NO(MOV) Output Noise (Movie) Mode =Movie , BW = 20Hz to 20KHz Rout and Lout measurement 30 µVrms NO(MUS) Output Noise (Music) Mode = Music , BW = 20Hz to 20KHz, Rout and Lout measurement 30 µVrms N O(MON) Output Noise (Simulated) Mode = Simulated, BW = 20Hz to 20KHz Rout and Lout measurement 30 µVrms d Distorsion Av = 0 ; Vin = 1Vrms SC Channel Separation 0.02 60 0.1 70 % dB BUS INPUTS V IL Input Low Voltage VIH Input High Voltage IIN Input Current VO Output Voltage SDA Acknowledge 1 3 Note: (1) Bass and Treble response: The center frequency and the resonance quality can be choosen by the external circuitry. A standard first order bass response can be realized by a standard feedback network. (2) The peack voltage of the two input signals must be less then (Lin + Rin) peak • AVin < 6/20 VS 2 V -5 IO = 1.6mA VS : 2 V 0.4 +5 µA 0.8 V TDA7344 I2C BUS INTERFACE Data transmission from microprocessor to the TDA7344 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown in fig. 3, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown in fig.4 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an ac- knowledge bit. The MSB is transferred first. Acknowledge The master (µP) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 5). The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse. The audioprocessor which has been addressed has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. Transmission without Acknowledge Avoiding to detect the acknowledge of the audioprocessor, the µP can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking and decreases the noise immunity. Figure 3: Data Validity on the I2CBUS Figure 4: Timing Diagram of I2CBUS Figure 5: Acknowledge on the I2CBUS 7/20 TDA7344 SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (s) A chip address byte, containing the TDA7344 address (the 8th bit of the byte must be 0). The TDA7344 must always acknowledge at the end of each transmitted byte. A subaddress (function) bytes (identified by the MSB = 0) A sequence of dates and subaddresses (N bytes + achnowledge. The dates are identified by MSB = 1, subaddresses by MSB = 0) A stop condition (P) ACK = Achnowledge S = Start P = Stop INTERFACE FEATURES - Due to the fact that the MSB is used to select if the byte transmitted is a subaddress (function) or a data (value), between a start and stop condition, is possible to receive, how many subaddresses and datas as wanted. - The subaddress (function) is fixed until a new subaddress is transmitted, so the TDA7344 can receive how many data as wanted for the selected subaddress (without the need for a new start condition) - If TDA7344 receives a subaddress with the LSB = 1 the incremental bus is selected, so it enters in a loop condition that means that every acknowledge will increase automatically the subaddress (function) and it receives the data related to the new subaddress. EXAMPLES 1) NO INCREMENTAL BUS TDA7344 receives a start condition, the correct chip address, a subaddress with the LSB = 0 (no incremental bus), N-datas (all these datas concern the subaddress selected), a new subaddress, N-data, a stop condition. So it can receive in a single transmission how many subaddress are necessary, and for each subaddress how many data are necessary. 2) INCREMENTAL BUS TDA7344 receives a start condition, the correct chip address a subaddress with the LSB = 1 (incremental bus): now it is in a loop condition with an autoincrease of the subaddress. The first data that it receives doesn’t concern the subaddress sended but the next one, the second one concerns the subaddress sended plus two in the loop etc, and at the end it receives the stop condition. In the pictures there are some examples: S = start A CHIP ADDRESS 0 80 (HEX) 1 82 (HEX) ACK = acknowledge B = 1 incremental bus, B = 0 no incremental bus P = stop 1) one subaddress, with n data concerning that subaddress (no incremental bus) 8/20 TDA7344 2) one subaddress, (with incremental bus) , with n data (data1 that concerns subaddress +1, data 2 that concerns subaddress + 2 etc.) 3) more subaddress with more data DATA BYTES FUNCTION SELECTION FIRST BYTE (subaddress) The first byte select the function, it is identified by the MSB = 0 MSB LSB SUBADDRESS A0 A1 A2 A3 B 0 0 0 0 X X X B VOLUME ATTENUATION & LOUDNESS 0 1 0 0 X X X B SURROUND & OUT & EFFECT CONTROL 0 0 1 0 X X X B BASS 0 1 1 0 X X X B TREBLE 0 0 0 1 X X X B ATT SPEAKER R 0 1 0 1 X X X B ATT SPEAKER L 0 0 1 1 X X X B ATT. ROUT AUX 0 1 1 1 0 X X B ATT. LOUT AUX 0 1 1 1 1 X X B INPUT STAGE CONTROL B = 1 yes incremental bus; B = 0 no incremental bus; X = indifferent 0,1 9/20 TDA7344 VALUE SELECTION The second byte select the value, it is identified by the MSB = 1 VOLUME ATTENUATION MSB 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 LSB 1.25 dB STEPS 0 1 0 1 0 1 0 1 0 -1.25 -2.50 -3.75 -5.00 -6.25 -7.50 -8.75 10 dB STEPS 0 -10 -20 -30 -40 -50 -60 -70 LOUDNESS ON OFF LSB 1.25 dB STEPS 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 SELECTION 0 1 ATT AUX OUT1 AND 2 MSB 1 1 0 0 0 0 0 1 0 -1.25 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 1 -2.50 -3.75 -5.00 -6.25 -7.50 -8.75 10 dB STEPS 0 -10 -20 -30 -40 -50 -60 -70 MUTE OFF ON 1 1 1 1 1 1 1 1 1 1 10/20 0 0 0 0 1 1 1 1 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 TDA7344 ATT SPEAKER R AND L MSB LSB 1.25 dB STEPS 1 X X 0 0 0 0 1 X X 0 0 1 -1.25 1 X X 0 1 0 -2.50 1 X X 0 1 1 -3.75 1 X X 1 0 0 -5.00 1 X X 1 0 1 -6.25 1 X X 1 1 0 -7.50 1 X X 1 1 1 -8.75 10 dB STEPS 1 X X 0 0 0 1 X X 0 1 -10 1 X X 1 0 -20 1 X X 1 1 1 X X 1 1 -30 1 1 1 MUTE LSB 2 dB STEPS TREBLE/ BASS MSB 1 X X X 0 1 1 1 14 1 X X X 0 1 1 0 12 1 X X X 0 1 0 1 10 1 X X X 0 1 0 0 8 1 X X X 0 0 1 1 6 1 X X X 0 0 1 0 4 1 X X X 0 0 0 1 2 1 X X X 0 0 0 0 0 1 X X X 1 0 0 0 0 1 X X X 1 0 0 1 -2 1 X X X 1 0 1 0 -4 1 X X X 1 0 1 1 -6 1 X X X 1 1 0 0 -8 1 X X X 1 1 0 1 -10 1 X X X 1 1 1 0 -12 1 X X X 1 1 1 1 -14 11/20 TDA7344 SURROUND & OUT & EFFECT CONTROL MSB LSB SELECTION SELECTION SURROUND 1 0 0 SIMULATED 1 0 1 MUSIC 1 1 0 MOVIE 1 1 1 OFF SELECTION 1 1 OUT 0 OUT VAR 1 OUT FIX SELECTION EFFECT CONTROL 1 0 0 0 0 -6 1 0 0 0 1 -7 1 0 0 1 0 -8 1 0 0 1 1 -9 1 0 1 0 0 -10 1 0 1 0 1 -11 1 0 1 1 0 -12 1 0 1 1 1 -13 1 1 0 0 0 -14 1 1 0 0 1 -15 1 1 0 1 0 -16 1 1 0 1 1 -17 1 1 1 0 0 -18 1 1 1 0 1 -19 1 1 1 1 0 -20 1 1 1 1 1 -21 For example to select the music mode, out fix, effect control =-9dB: 1 00 1 1 1 0 1 12/20 TDA7344 INPUT CONTROL RANGE (0 TO -19.68dB) MSB LSB 0.3125 dB STEPS 1 X 0 0 0 0 1 Xx 0 0 1 -0.3125 1 X 0 1 0 -0.625 1 X 0 1 1 -0.9375 1 X 1 0 0 -1.25 1 X 1 0 1 -1.5625 1 X 1 1 0 -1.875 1 X 1 1 1 -2.1875 2.5 dB STEPS 1 X 0 0 0 0 1 X 0 0 1 -2.5 1 X 0 1 0 -5.0 1 X 0 1 1 -7.5 1 X 1 0 0 -10 1 X 1 0 1 -12.5 1 X 1 1 0 -15 1 X 1 1 1 -17.5 POWER ON RESET VOLUME ATTENUATION MAX ATTENUATION, LOUDNESS OFF TREBLE -14dB BASS -14dB SURROUND & OUT CONTROL + EFFECT CONTROL OFF + FIX + MAX ATTENUATION ATT SPEAKER R MUTE ATT SPEAKER L MUTE ATT AUX OUT 1 MUTE ATT AUX OUT 2 MUTE 13/20 TDA7344 PIN: HP1 PIN: HP2 PIN: Lin, Rin PIN: LOUD -R, LOUB-L PIN: AC - LO, AC - RO, PIN: AC - LIN, AC - RIN, 14/20 TDA7344 PIN: BASS - LA, BASS - RA PIN: BASS - LB, BASS - RB PIN: TREBLE - L, TREBLE - R PIN: VARO - L, VARO -R PIN: VARi - L, VARi -R PIN: LOUT, ROUT, LOUT AUX, ROUT AUX, REAR 15/20 TDA7344 PIN: SCL, SDA PIN: ADDR PIN: LP PIN: PS3, PS2 PIN: PS3A, PS4A PIN: CREF 16/20 TDA7344 PIN: PS2 PIN: PS2A PIN: PS1 PIN: PS1A PIN: LP1 17/20 TDA7344 PQFP44 PACKAGE MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. A MIN. TYP. MAX. 2.45 A1 0.25 A2 1.95 B 0.096 0.010 2.00 2.10 0.077 0.079 0.30 0.45 0.012 0.018 c 0.13 0.23 0.005 0.009 D 12.95 13.20 13.45 0.51 0.52 0.53 D1 9.90 10.00 10.10 0.390 0.394 0.398 D3 8.00 0.315 e 0.80 0.031 0.083 E 12.95 13.20 13.45 0.510 0.520 0.530 E1 9.90 10.00 10.10 0.390 0.394 0.398 E3 8.00 L 0.65 0.315 0.80 L1 0.95 0.026 0.031 1.60 0.037 0.063 K 0°(min.), 7°(max.) D D1 A D3 A2 A1 23 33 22 34 0.10mm .004 44 B E E1 B E3 Seating Plane 12 11 1 C L L1 e K PQFP44 18/20 TDA7344 SDIP42 PACKAGE MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. A MIN. TYP. MAX. 5.08 0.20 A1 0.51 0.020 A2 3.05 3.81 4.57 0.120 0.150 0.180 B 0.38 0.46 0.56 0.0149 0.0181 0.0220 B1 0.89 1.02 1.14 0.035 0.040 0.045 c 0.23 0.25 0.38 0.0090 0.0098 0.0150 D 36.58 36.83 37.08 1.440 1.450 1.460 E 15.24 16.00 0.60 E1 12.70 14.48 0.50 13.72 0.629 0.540 e 1.778 0.070 e1 15.24 0.60 0.570 e2 18.54 0.730 e3 1.52 0.060 L 2.54 3.30 3.56 0.10 0.130 0.140 E A2 A L A1 E1 B B1 e e1 e2 D c E 42 22 .015 0,38 Gage Plane 1 e3 21 e2 SDIP42 19/20 TDA7344 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGSTHOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1997 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 20/20