TDA7406T CAR RADIO SIGNAL PROCESSOR Audio processor: ■ 4 STEREO INPUTS ■ 4 MONO INPUTS ■ VOLUME CONTROL ■ 7 BAND EQUALIZER FILTER CONTROL ■ HIGH PASS FILTER FOR SUBWOOFER APPLICATION ■ DIRECT MUTE AND SOFT MUTE ■ INTERNAL BEEP GENERATION ■ 4 INDEPENDENT SPEAKER OUTPUTS ■ SOFT STEP SPEAKER CONTROL ■ SUBWOOFER OUTPUT ■ 7 BAND SPECTRUM ANALYZER ■ FULL MIXING CAPABILITY ■ PAUSE DETECTOR Stereo decoder: ■ RDS MUTE ■ NO EXTERNAL ADJUSTMENTS ■ AM/FM NOISEBLANKER WITH SEVERAL TRIGGER CONTROLS ■ PROGRAMMABLE MULTIPATH DETECTOR TQFP44 ORDERING NUMBER: TDA7406T ■ QUALITY DETECTOR OUTPUT Digital control: 2 ■ I C-BUS INTERFACE DESCRIPTION The device includes a high performance audio processor with 7 bands equalizer and spectrum analyzer plus a stereo decoder-noiseblanker. The whole low frequency signal processing necessary for state-ofthe-art as well as future car radios is therefore provided. The digital control allows a full programming not only of the audioprocessor and filter characteristics but also in the stereodecoder part especially for the adaptation to different IF-devices. PIN CONNECTION (Top view) April 2001 1/49 TDA7406T SUPPLY Symbol Parameter Test Conditions Min. Typ. Max. Unit 7.5 9 10 V 42 60 78 mA VS Supply Voltage IS Supply Current VS = 9V Ripple Rejection @ 1kHz Audioprocessor (all Filters flat) 60 dB Stereodecoder + Audioprocessor 55 dB SVRR THERMAL DATA Symbol Description Rth j-pins Thermal Resistance Junction-pins max Value Unit 65 °C/W Value Unit 10.5 1V -40 to 85 °C -55 to +150 °C ABSOLUTE MAXIMUM RATINGS Symbol VS Parameter Operating Supply Voltage Tamb Operating Temperature Range Tstg Storage Temperature Range ESD: All pins are protected against ESD according to the MIL883 standard. 2/49 CDL NAVI AM NAVI AM IF CMPX MPX1 AM/MPX2 TIM PHONE CDC L R FM INPUT MULTIPLEXER TAPE MD CD TIM PHONE PDR+ PD- PDL+ TAPER TAPEL MDR MDL CDR STD INGAIN MIXING SELECTOR MAIN SOURCE SELECTOR PAUSE R L PAUSE 80KHz-LP IN-GAIN + AUTO ZERO PLL BEEP + SPECTRUM ANALYSER SACLK PILDET LOUDNESS SAOUT SOFTSTEP VOLUME PILOTCANCELLATION SOFT MUTE SM R + MPIN SWACOUT MPOUT MULTIPATH DETECTOR DEMODULATOR + STEREO ADJUST + STEREO BLED DIGITAL CONTROL 7 BAND EQUALIZER L ACOUTR ACOUTL AM/FM NOISE BLANKER 25KHz-LP HIGH PASS ACINL SWIN MIXINLF FRONT MIXINLR ACINR PULSE FORMER S&H SUBWOOFER FILTER REAR OUTPUT SELECTOR MIXINRF SUBWOOFEROUT DCIN MIXINRR ACIN A LEVEL D HIGH CUT R L MONO FADER SOFT STEP FADER SOFT STEP FADER SOFT STEP FADER SOFT STEP FADER SOFT STEP FADER D01AU1255 SUPPLY QUAL I2C BUS MIXER VS GND CREF QUA SCL SDA OUT SW OUT RR OUT RF OUT RF OUT LF TDA7406T BLOCK DIAGRAM 3/49 TDA7406T 1 AUDIOPROCESSOR PART Features: ■ Input multiplexer – Pseudo differential CDC stereo input, programmable as single-ended input. – 3 single-ended stereo inputs. – 4single-ended mono inputs. – Input gain adjust 0...15dB in 1dB steps. – Internal offset-cancellation (autozero). ■ Beep – Internal beep generator with 4 different frequencies. ■ Mixing stage – Beep, Phone- and Navi-Input mixable to all speaker outputs. – TIM or tuner (FM/AM) programmable as fourth mixing source. – Level control range of 95dB (+15...-79db). ■ Loudness – Loudness programmable center frequency and filter slope. – 0...19dB attenuation in 1dB steps. – selectable flat-mode (constant attenuation). ■ Volume – Gain/Attenuation with 0.5dB step resolution. – soft-step control with programmable blend times. – 110dB range (+32...-79db). ■ Equalizer – Seven bands equalizer with 2nd order frequency response switch-capacitors filters. – Center frequency programmable for lowest and highest filter. – Programmable quality factor in four steps for each filter. – ±15dB range with 1dB steps. ■ Spectrum analyzer – seven bandpass 2nd order frequency response switch-capacitors filters – Programmable quality factor for different visual appearance – Analog output – Controlled by external serial clock ■ High pass Filter – 2nd order Butterworth high pass with programmable cut-off frequency – Selectable flat-mode ■ Speakers – 4 independent speaker controls with separate mute. – Control range 95dB (+15...-79dB) in 1dB steps with soft step. – 4 independent programmable mix inputs with 50% mixing ratio ■ Subwoofer – Single-ended monaural output – control range 95dB (+15...-79dB) in 1dB steps with soft step. – separate mute ■ Mute functions – direct mute – digitally controlled Soft mute with 4 programmable mute-time 4/49 TDA7406T Table 1. ELECTRICAL CHARACTERISTICS (VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit 70 100 130 kΩ INPUT SELECTOR Rin Input Resistance VCL Clipping Level 2.2 2.6 VRMS SIN Input Separation 80 100 dB GIN MIN Min. Input Gain -1 0 1 dB GIN MAX Max. Input Gain 13 15 17 dB GSTEP Step Resolution 0.5 1 1.5 dB Adjacent Gain Steps -5 1 5 mV GMIN to GMAX -10 61 10 mV VDC Voffset DC Steps all single ended Inputs Remaining offset with Autozero 0.5 mV DIFFERENTIAL STEREO INPUTS Rin CMRR eNO Input Resistance (see Fig. 1) Differential 70 100 Common Mode Rejection Ratio VCM = 1VRMS @ 1kHz 46 70 dB VCM = 1VRMS @ 10kHz 46 60 dB 11 µV Output-Noise @ Speaker-Outputs 20Hz - 20kHz, flat; all stages 0dB 130 kΩ BEEP CONTROL VRMS Beep Level Mix-Gain = 6dB 250 350 500 mV fBeep Beep Frequency f Beep1 475 500 525 Hz fBeep2 740 780 820 Hz fBeep3 1.48 1.56 1.64 kHz fBeep4 2.28 2.4 2.52 kHz MIXING CONTROL MLEVEL Mixing Ratio Main / Mix-Source -6/-6 dB GMAX Max. Gain 13 15 17 dB AMAX Max. Attenuation -83 -79 -75 dB ASTEP Attenuation Step 0.5 1 1.5 dB LOUDNESS CONTROL ASTEP Step Resolution 0.5 1 1.5 dB AMAX Max. Attenuation -21 -19 -17 dB fPeak Peak Frequency f P1 180 200 220 Hz fP2 360 400 440 Hz fP3 540 600 660 Hz fP4 720 800 880 Hz 30 32 34 dB VOLUME CONTROL GMAX Max. Gain 5/49 TDA7406T Table 1. ELECTRICAL CHARACTERISTICS (continued) (VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit AMAX Max. Attenuation -83 -79 -75 dB ASTEP Step Resolution 0 0.5 1 dB G = -20 to +20dB -0.75 0 +0.75 dB G = -80 to -20dB -4 0 3 dB 2 dB EA ET VDC Attenuation Set Error Tracking Error DC Steps Adjacent Attenuation Steps 0.1 3 mV From 0dB to GMIN 0.5 5 mV SOFT MUTE AMUTE TD Mute Attenuation Delay Time 80 100 dB T1 0.48 1 ms T2 0.96 2 ms T3 70 123 170 ms T4 200 324 600 ms 1 V VTH low Low Threshold for SM-Pin 1) VTH high High Threshold for SM - Pin 2.5 RPU Internal pull-up resistor 32 VPU Internal pull-up Voltage V 45 58 3.3 kΩ V EQUALIZER CONTROL CRANGE ASTEP fC1 Control Range +14 +15 +16 dB Step Resolution 0.5 1 1.5 dB f C1a 55 62 69 Hz fC1b 90 100 110 Hz Center Frequency Band 1 fC2 Center Frequency Band 2 f C2 141 157 173 Hz fC3 Center Frequency Band 3 f C3 365 396 437 Hz fC4 Center Frequency Band 4 f C4 0.9 1 1.1 kHz fC5 Center Frequency Band 5 f C5 2.25 2.51 2.766 kHz fC6 Center Frequency Band 6 f C6a 3.6 4 4.4 kHz fC6b 5.70 6.34 6.98 kHz f C7a 13.5 15 16.5 kHz fC7b 14.4 16 17.6 kHz Q1 0.9 1 1.1 Q2 1.26 1.4 1.54 Q3 1.62 1.8 1.98 Q4 1.98 2.2 2.44 fC7 Q Center Frequency Band 7 Quality Factor 1) The SM-Pin is active low (Mute = 0) 6/49 TDA7406T Table 1. ELECTRICAL CHARACTERISTICS (continued) (VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified) Symbol DCGAIN Parameter DC-gain, Band 1 Test Condition DC = off Min. Typ. Max. Unit -1 0 +1 dB DC = on, 15dB boost 4 dB SPECTRUM ANALYZER CONTROL VSAOut Output Voltage Range 0 3.3 V fC1 Center Frequency Band 1 f C1 55 62 69 Hz fC2 Center Frequency Band 2 f C2 141 157 173 Hz fC3 Center Frequency Band 3 f C3 356 396 436 Hz fC4 Center Frequency Band 4 f C4 0.9 1 1.1 kHz fC5 Center Frequency Band 5 f C5 2.26 2.51 2.76 kHz fC6 Center Frequency Band 6 f C6 5.70 6.34 6.98 kHz fC7 Center Frequency Band 7 f C7 14.4 16 17.6 kHz Q Quality Factor Q1 1.62 1.8 1.98 Q2 3.15 3.5 3.85 fSAClk Clock Frequency 1 tSAdel Analog Output Delay Time 2 µs trepeat Spectrum Analyzer Repeat Time 50 ms tintres Internal Reset Time 100 kHz 3 ms Window 1 40 mV Window 2 80 mV Window 3 160 mV PAUSE DETECTOR VTH Zero Crossing Threshold IDELAY Pull-Up Current VTHP Pause Threshold 15 25 35 3 µA V SPEAKER ATTENUATORS Rin Input Impedance 35 50 65 kΩ GMAX Max. Gain 14.5 15.5 16.5 dB AMAX Max. Attenuation -83.5 -79.5 -75 dB ASTEP Step Resolution 0.5 1 1.5 dB AMUTE Output Mute Attenuation 80 90 EE Attenuation Set Error VDC DC Steps Adjacent Attenuation Steps MR Mixing Ratio Signal/MixIn 0.5 dB 3 dB 5 mV 50/50 % 2.6 VRMS AUDIO OUTPUTS VCLIP RL Clipping Level Output Load Resistance Thd=0.3% 2.2 2 kΩ 7/49 TDA7406T Table 1. ELECTRICAL CHARACTERISTICS (continued) (VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified) Symbol Parameter Max. Unit 10 nF 30 120 Ω 4.3 4.5 4.7 V f HP1 81 90 99 Hz fHP2 122 135 148 Hz fHP3 162 180 198 Hz fHP4 194 215 236 Hz Input Impedance 35 50 65 kΩ GMAX Max. Gain 14 15 16 dB AATTN Max. Attenuation -83 -79 -75 dB ASTEP Step Resolution 0 1 1.5 dB AMUTE Output Mute Attenuation 80 90 CL Test Condition Min. Typ. Output Load Capacitance ROUT Output Impedance VDC DC Voltage Level HIGH PASS fHP Highpass corner frequency SUBWOOFER ATTENUATOR Rin EE Attenuation Set Error VDC DC Steps Adjacent Attenuation Steps dB 2 dB 1 5 mV SUBWOOFER Lowpass fLP Lowpass corner frequency f LP1 72 80 88 Hz fLP2 108 120 132 Hz fLP3 144 160 176 Hz 3 15 µV 20 µV µV GENERAL eNO Output Noise BW = 20Hz - 20kHz output muted BW = 20Hz - 20kHz all gains = 0dB single ended inputs S/N d SC 8/49 Signal to Noise Ratio distortion Channel Separation left/right 10 all gains = 0dB flat; VO = 2VRMS 103 dB All EQ-bands at +12dB; Q = 1.0 a-weighted; VO = 2.6VRMS 87 dB VIN = 1VRMS; all stages 0dB 0.01 0.1 % VOUT = 1VRMS; Bass & Treble = 12dB 0.05 0.1 % 80 90 dB TDA7406T 2 DESCRIPTION OF THE AUDIOPROCESSOR PART 2.1 Input stages In the basic configuration there is a source-Selector with 8 inputs: one pseudo-differential (CDC), three single ended stereo (MD, CD, Tape), three single-ended mono (PHONE, NAVI, TIM) plus the “tuner” input. The tuner input takes the signal from either MPX1 or MPX2/AM pins (through the stereodecoder) see Fig. 1. 2.1.1 Pseudo-differential stereo Input (PD) The PD input is implemented as a buffered pseudo-differential stereo stage with 100kΩ input-impedance at each input pin. This input is also configurable as single-ended stereo input (CDC, see pin-out). The common input-pin, PD- features a fast charge switch to speed up the charge time of external capacitors. This switch is released the first time the input-selector data-byte (0) is assessed. 2.1.2 Single-ended stereo Inputs, single-ended mono inputs and FM-MPX input All single ended inputs have an input impedance of 100kΩ. The AM-pin can be connected to the input of the stereo-decoder in order to use the AM-noiseblanker and AM-High-Cut feature. As input “Tuner” for the input selector either the stereo-decoder output or the AM-pin is selectable. 2.1.3 Mixing Selector It is possible to enable/disable the mixing feature (ratio 50%) at the outputs stages between whichever input source and one of the following signals: Beep, Phone, Navigator and Tuner/TIM. 2.1.4 Beep Generator There are four possible selectable beeping frequencies: 600Hz, 780Hz, 1.56KHz and 2.4KHz. Figure 1. Input-stages 9/49 TDA7406T 2.2 AutoZero The AutoZero allows a reduction of the number of pins as well as external components by canceling any offset generated by or before the In-Gain-stage (Please notice that externally generated offsets, e.g. generated through the leakage current of the coupling capacitors, are not canceled). The auto-zeroing is started every time the DATA-BYTE 0 is selected and needs max. 0.3ms for the alignment. To avoid audible clicks the Audioprocessor have to be muted by soft mute or hard mute during this time. 2.2.1 AutoZero for Stereodecoder-Selection A special procedure is recommended for selecting the stereodecoder at the input-selector to guarantee an optimum offset-cancellation: (Step 0: SoftMute or Mute the signal-path) Step 1: Temporary deselect the stereodecoder at the input-selector Step 2: Configure the stereodecoder via IIC-Bus Step 3: Wait 1ms Step 4: Select the stereodecoder The root cause of this procedure is, that after muting the stereodecoder (Step 1), the internal stereodecoder filters have to settle in order to perform a proper offset-cancellation. 2.2.2 AutoZero-Remain In some cases, for example if the µP is executing a refresh cycle of the IIC-Bus-programming, it is not useful to start a new AutoZero-action because no new source is selected and an undesired mute would appear at the outputs. For such applications the TDA7406T could be switched in the AutoZero-Remain-Mode (Bit 6 of the subaddress-byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the AutoZero and the old adjustment-value remains. 2.2.3 PAUSE Detector A pause detector stage with programmable threshold (40/80/160mV) is provided (see data Byte 14). The pause detector info is available at the PAUSE pin; a capacitor must be connected between this pin and GND. When the incoming signal is detected to be outside the selected window, the external capacitor is discharged. When the signal is inside the window, the capacitor is integrating up. The pause status can be detected in two ways: a) reading directly the PAUSE pin level Pause Off = level low (<3.0V) Pause On = level high (>3.0V) b) by reading the I2C transmitted byte, bit P P = 1 pause active P = 0 no pause detected The external capacitor value fixes the time constant. The pull up current is 25µA typical. 10/49 TDA7406T 2.3 Loudness There are four parameters programmable in the loudness stage: ■ Attenuation: 0 to -19dB attenuation in 1dB steps vs. frequency (see the response at fP = 400Hz in Figure 2). ■ Peak Frequency: Four programmable peak frequencies: 200,400,600 and 800Hz (see Figure 3). ■ Filter Order: First or second order frequency response (see Figure 4). ■ Flat mode: Selectable flat-mode. In flat mode the loudness stage works as a 0dB to -19dB attenuator. Figure 2. Loudness Attenuation @ fP = 400Hz. 0.0 -5.0 -10.0 dB -15.0 -20.0 -25.0 10.0 100.0 1.0K 10.0K 1.0K 10.0K Hz Figure 3. Loudness Center frequencies @ Attn. = 15dB 0.0 -5.0 dB -10.0 -15.0 -20.0 10.0 100.0 Hz 11/49 TDA7406T Figure 4. 1st and 2nd Order Loudness @ Attn. = 15dB, fP=400Hz 0.0 -5.0 dB -10.0 -15.0 -20.0 10.0 100.0 Hz 1.0K 10.0K 2.4 Soft Mute The digitally controlled Soft Mute stage allows signal muting/demutingwith a programmable slope. The Mute time is selectable among 4 values: 0.48, 0.96, 123 and 324ms. The mute process can either be activated by the Soft Mute pin or via the I2C-bus. This slope is realized in a special S-shaped curve to mute slow in the critical regions (see Figure 5). For timing purposes the I2C-bus output register (Bit0 = SM read bit) is set to 1 from the start of muting until the end of de-muting. Figure 5. Soft Mute-Timing Note: Please notice that a started Mute-action is always terminated and could not be interrupted by a change of the mute -signal. 12/49 TDA7406T 2.5 Volume Control 2.5.1 Gain/Attenuation Control The volume control can range from a gain of 32dB up to an attenuation of 79dB; however it is not recommended to use a gain higher than 20dB for performance reasons. 2.5.2 Soft Step Volume When the speaker-level is changed, audible clicks could appear at the output. The root cause of those clicks could either be a DC offset before the speaker-stage or the sudden change of the envelope of the audio signal. With the SoftStep-feature both kinds of clicks could be reduced to a minimum and are no more audible. The blend-time from one step to the next is programmable with four different values: 320µs, 1.28ms, 5.12ms and 20.4ms. Figure 6. SoftStep-Timing for Volume 1dB 0.5dB SS Time -0.5dB -1dB Note: For steps more than 0.5dB (Volume) or 1dB (Speaker) the SoftStep mode should be deactivated because it could generate a hard 1dB step during blending. 2.6 The Seven Band Equalizer 2.6.1 Equalizer Filter Each filter is realized as a switched capacitor with a 2nd order frequency response. There are three parameters programmable in the equalizer filter: ■ Attenuation: ±15dB in 1db step resolution (Figure 7 shows the boost and cut response as a function of frequency at a center frequency of 1kHz.) ■ Center Frequency: This parameter is programmable in the filter stages 1(62/100Hz), 6(4/6.34kHz) and 7(15/16kHz). The others bands are fixed at: 157, 396, 1K and 2.5K Hertz (see Figure 8). ■ Quality Factors: The four possible quality factors are 1, 1.4, 1.8 and 2.2 (see Figure 9). The center frequency, Q, DC-mode and boost/cut can be set fully independently for each filter. Figure 10 shows the superposition of all equalizer filter curves for different quality factors. 13/49 TDA7406T Figure 7. Equalizer filter control @ fCenter = 1kHz, Q = 1.0 15 dB 10 5 0 -5 -10 -15 20 100 10k 1k 20k Hz Figure 8. Center frequencies @ Gain = 15dB, Q = 1.0 16 dB 14 12 10 8 6 4 2 0 -2 14/49 10 100 1k Hz 20k TDA7406T Figure 9. Quality factors @ boost = 15dB, fCenter = 1kHz 16 dB 14 12 10 8 6 4 2 0 -2 10 100 1k Hz 20k Figure 10. Superposition of all EQ bands @ boost = 15dB 18 dB 16 14 12 10 8 6 4 2 0 10 100 1k Hz 20k 2.6.2 DC-Mode The filter stage 1 (62/100Hz) has a programmable +4dB DC-gain when the boost is set at +15dB (See Figure 11). 15/49 TDA7406T Figure 11. EQ band1, normal- and DC-mode @ boost = 15 dB, fCenter = 62 Hz 16 dB 14 12 10 8 6 4 2 0 -1 1 Hz 1K 100 10 10K Note: The center frequency, Q, DC-mode and boost/cut can be set fully independently for each filter. 2.7 Subwoofer Application There is one separate subwoofer output. A low-pass filter stage at this output allows the selection of three different frequencies: 80/120/160Hz. A high Pass Filter stage is present in the main path with selectable 90/135/ 180/215Hz frequencies. Both filters, the low-pass as well as the high-pass filter can be disabled and have butterworth characteristics so that their cutoff frequencies are not equal but shifted by the factor 1.125 to get a flat frequency response (see Figure 12). Figure 12. Subwoofer Application with Lowpass @ 80/120/160Hz and HighPass @ 90/135/180Hz 0.0 -10.0 -20.0 dB -30.0 -40.0 -50.0 10.0 16/49 100.0 Hz 1.0K 10.0K TDA7406T 2.8 Spectrum analyzer A fully integrated seven band spectrum analyzer with programmable quality factor is present in the IC (Figure 13). The spectrum analyzer consists of seven band pass filters with a rectifier and sample capacitor which stores the maximum peak signal level since the last read cycle. This peak signal level can be read by a microprocessor at the SAout pin. To allow easy interfacing to a microprocessor analog port, the output voltage at this pin is referred to device ground. The microprocessor starts a read cycle when there is a clock edge going negative at the SA clk input. On the following positive clock edges, the peak signal level for the band pass filters is subsequently switched to SAout. Each analog output data is valid after the time t SAdel. A reset of the sample capacitors is induced whenever SAclk remains high for the time tintres. Note that a proper reset requires the clock signal SAclk to be held at high potential. Figure 13 shows the block diagram and Figure 14 illustrates the read cycle timing of the spectrum analyzer. The spectrum analyzer minimum repeat time is 50ms. 2.8.1 Spectrum Analyzer Filters Each filter is realized as a switched capacitor with a 2nd order frequency response. The center frequency of the filter stages are: 62,157, 396, 1K, 2.51K, 6.34k and 16kHz. It is possible to choose between two different filter quality factors: 1.8 and 3.5. Figure 13. Spectrum analyzer block diagram Figure 14. Timing spectrum analyzer 17/49 TDA7406T 2.9 AC-coupling In some applications additional signal manipulations are desired. For this purpose an AC-coupling is placed before the speaker-attenuators, which can be activated or internally shorted by I²C-Bus. In short condition the input-signal of the speaker-attenuator is available at the AC-outputs. The input-impedance of this AC-inputs is 50kΩ. In addition there are MixIn inputs available. With this inputs it is possible to mix an external signal to every speaker with a mixing ratio of 50% (see Figure 15). The source of front and rear speaker can be set independently. As source is possible to choose: – internal dc coupling (not recommended) – external ac coupling using ACIn pins – external ac coupling using MixIn pins – mixing of ACIn and MixIn pins (mixing ratio: 50%) If the MixIn pins of the rear speaker are not used this inputs can be used as mixing inputs for the internal subwoofer filter. Figure 15. AC/DC-coupling and MixIn Inputs 2.10 Speaker-Attenuator stage Each of the four speakers and the subwoofer output has a separate volume control in the range: +15... -79dB plus mute with a typical value of -90dB. 2.11 Output Mixer A Mixing-stage is placed after each speaker gain/attenuator stage and can be set independently to mixingmode. Having a full volume control for the Mix-signal in the range:+15... -79dB plus mute with a typical value of -90dB, the stage offers a wide flexibility to adapt the mixing levels. 18/49 TDA7406T Figure 16. Output Selector 2.12 Audioprocessor Testing During the Test Mode, which can be activated by setting bit I2 of the subaddress byte and D0 of the audioprocessor testing byte, several internal signals are available at the Navi pin. During this mode the input resistance of 100kΩ is disconnected from the pin. The internal signals available are shown in the Data-byte specification. 19/49 TDA7406T 3 STEREODECODER PART 3.1 Features: ■ No external components necessary ■ PLL with adjustment free, fully integrated VCO ■ Automatic pilot dependent MONO/STEREO switching ■ Very high suppression of intermodulation and interference ■ Programmable Roll-Off compensation ■ Dedicated RDS-Softmute ■ Highcut and Stereoblend-characteristics programmable in a wide range ■ FM/AM noiseblanker with several threshold controls ■ Multipath-detector with programmable internal/external influence ■ I2C-bus control of all necessary functions Table 2. ELECTRICAL CHARACTERISTICS VS = 9V, de-emphasis time constant = 50µs, MPX input voltage VMPX = 500mV (75kHz deviation), modulation frequency = 1kHz, input gain = 6dB, Tamb = 27°C, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit 0.5 1.25 Vrms Vin MPX Input Level Rin Input Resistance 70 100 130 kΩ Gmin Min. Input Gain 1.5 3.5 4.5 dB Gmax Max. Input Gain 8.5 11 12.5 dB Gstep Step Resolution 1.75 2.5 3.25 dB SVRR Supply Voltage Ripple Rejection Input Gain = 3.5dB Vripple = 100mV, f = 1kHz 60 dB 50 dB α Max. Channel Separation THD Total Harmonic Distortion fin=1kHz, mono S+N -------------N Signal plus Noise to Noise Ratio A-weighted, S = 2Vrms 80 91 30 0.02 0.3 % dB MONO/STEREO-SWITCH VPTHST1 Pilot Threshold Voltage for Stereo, PTH = 1 10 15 25 mV VPTHST0 Pilot Threshold Voltage for Stereo, PTH = 0 15 25 35 mV VPTHMO1 Pilot Threshold Voltage for Mono, PTH = 1 7 12 17 mV VPTHMO0 Pilot Threshold Voltage for Mono, PTH = 0 10 19 25 mV PLL ∆f/f Capture Range DEEMPHASIS and HIGHCUT 20/49 0.5 % TDA7406T Table 2. ELECTRICAL CHARACTERISTICS (continued) VS = 9V, de-emphasis time constant = 50µs, MPX input voltage VMPX = 500mV (75kHz deviation), modulation frequency = 1kHz, input gain = 6dB, Tamb = 27°C, unless otherwise specified. Symbol Parameter τDeempF De-emphasis Time constants FM Test Conditions Min. Typ. Max. Unit VLEVEL >> VHCH 25 50 75 µs VLEVEL >> VHCH 44 62.5 80 µs VLEVEL >> VHCH 50 75 100 µs VLEVEL >> VHCH 70 100 130 µs M MFM τDeempA Highcut Time constant Multiplier FM VLEVEL << VHCL De-emphasis Time constants AM 3 VLEVEL >> VHCH 37.5 µs VLEVEL >> VHCH 47 µs VLEVEL >> VHCH 56 µs VLEVEL >> VHCH 75 µs VLEVEL << VHCL 3.7 M MAM REF5V High cut Time constant Multiplier AM Internal Reference Voltage 4.7 5 5.3 V Lmin min. LEVEL Gain -1 0 +1 dB Lmaxs max. LEVEL Gain 5 6 7 dB LGstep LEVEL Gain Step Resolution see section 2.7 0.2 0.4 0.6 dB VSBLmin Min. Voltage for Mono see section 2.8 17 20 23 %REF5V VSBLmax Max. Voltage for Mono see section 2.8 62 70 78 %REF5V VSBLstep Step Resolution see section 2.8 1.6 3.3 5.0 %REF5V VHCHmin Min. Voltage for NO Highcut see section 2.9 77 42 47 %REF5V VHCHmax Max. Voltage for NO Highcut see section 2.9 58 66 74 %REF5V VHCHstep Step Resolution see section 2.9 4.2 8.4 12.6 %REF5V VHCLmin Min. Voltage for FULL High cut see section 2.9 15 17 19 %VHCH VHCLmax Max. Voltage for FULL High cut see section 2.9 29 33 37 %VHCH VHCLstep Step Resolution see section 2.9 2.1 4.2 6.3 %REF5V 40 50 dB Carrier and harmonic suppression at the output α19 Pilot Signalf=19kHz α38 Subcarrier f=38kHz 75 dB α57 Subcarrier f=57kHz 62 dB α76 Subcarrier f=76kHz 90 dB 21/49 TDA7406T Table 2. ELECTRICAL CHARACTERISTICS (continued) VS = 9V, de-emphasis time constant = 50µs, MPX input voltage VMPX = 500mV (75kHz deviation), modulation frequency = 1kHz, input gain = 6dB, Tamb = 27°C, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit Intermodulation (Note 1) α2 fmod=10kHz, fspur=1kHz 65 dB α3 fmod=13kHz, fspur=1kHz 75 dB 70 dB 75 dB Traffic Radio (Note 2) α57 Signal f=57kHz SCA - Subsidiary Communications Authorization (Note 3) α67 Signal f=67kHz ACI - Adjacent Channel Interference (Note 4) α114 Signal f=114kHz 95 dB α190 Signal f=190kHz 84 dB Notes to the Characteristics Note 1. Intermodulation Suppression V o ( signa l ) ( at1kH z ) α 2 = ---------------------------------------------------------------- ;ƒ s = ( 2 ⋅ 10kHz ) – 19kHz V o ( spur iou s ) ( a t1kHz ) V o ( signa l ) ( at1kH z ) α 3 = ---------------------------------------------------------------- ;ƒ s = ( 3 ⋅ 13kHz ) – 38kHz V o ( spur iou s ) ( a t1kHz ) measured with: 91% pilot signal; fm = 10 kHz or 13 kHz. Note 2. Traffic Radio (V.F.) Suppression measured with: 91% stereo signal; 9% pilot signal; fm=1kHz; 5% subcarrier (f=57kHz, fm=23Hz AM, m=60%) V o ( sign al ) ( a t1 kHz ) α57 ( V.W.F. ) = ------------------------------------------------------------------------------------V o ( sp urious ) ( at1kH z±23kHz ) Note 3. SCA (Subsidiary Communications Authorization) measured with: 81% mono signal; 9% pilot signal; fm=1kHz; 10%SCA - subcarrier (fs = 67kHz, unmodulated). V o ( sign al ) ( at1 kHz ) α67 = ---------------------------------------------------------------- ;ƒ s = ( 3 ⋅ 38kHz ) – 67kH z V o ( spu rio us ) ( at9kHz ) 22/49 TDA7406T Note 4. ACI (Adjacent Channel Interference) V o ( sign al ) ( a t1 kHz ) α114 = ---------------------------------------------------------------- ;ƒ s = 110kH z – ( 3 ⋅ 38 kHz ) V o ( spu rio us ) ( at4kH z ) V o ( sign al ) ( a t1 kHz ) α190 = ---------------------------------------------------------------- ;ƒ s = 186kH z – ( 5 ⋅ 38 kHz ) V o ( spu rio us ) ( at4kH z ) measured with: 90% mono signal; 9% pilot signal; fm=1kHz; 1% spurious signal (fs = 110kHz or 186kHz, unmodulated). 3.2 Dual MPX Usage 3.2.1 Feature Description The TDA7406T is able to support a twin tuner concept via the Dual-MPX-Mode. The DC-Voltage at the CMPXpin controls whether one or both MPX-signals are used to decode the stereo FM-signal. Therefor two windowcomparators with a characteristic as shown in Figure 17 are implemented (Please note that the thresholds have a hysteresis of 500mV). In this mode the stereodecoder high impedance-mute mutes both inputs in parallel. Figure 17. Block diagram Dual MPX 23/49 TDA7406T NOISE BLANKER PART Features: ■ AM and FM mode ■ internal 2nd order 140kHz high-pass filter for MPX path ■ internal rectifier and filters for AM-IF path ■ programmable trigger thresholds ■ trigger threshold dependent on high frequency noise with programmable gain ■ additional circuits for deviation- and fieldstrength-dependent trigger adjustment ■ 4 selectable pulse suppression times for each mode ■ programmable noise rectifier charge/discharge current Table 3. ELECTRICAL CHARACTERISTICS All parameters measured in FM mode if not otherwise specified. Symbol VTR VTRNOISE VRECT Parameter Trigger Threshold 1) noise controlled Trigger Threshold Rectifier Voltage Test conditions meas.with VPEAK=0.9V Min. Typ. Max. Unit 111 30 mVOP 110 35 mVOP 101 40 mVOP 100 45 mVOP 011 50 mVOP 010 55 mVOP 001 60 mVOP 000 65 mVOP 00 260 mVOP 01 220 mVOP 10 180 mVOP 11 140 mVOP meas.with VPEAK=1.5V VMPX=0mV 0.5 0.9 1.3 V VMPX=50mV, f=150kHz 1.5 1.7 2.1 V VMPX=200mV, f=150kHz 2 2.5 2.9 V VRECTDEV Deviation dependent Rectifier Voltage meas.with VMPX=500mV (75kHz dev.) 11 10 01 00 0.5 0.9 1.7 2.5 0.9 (off) 1.2 2.0 2.8 1.3 1.5 2.3 3.1 VOP VOP VOP VOP VRECTFS meas.with VMPX=0mV, VLEVEL<< VSBL (fully mono) 11 10 01 00 0.5 0.9 1.7 2.1 0.9 (off) 1.4 1.9 2.4 1.3 1.5 2.3 3.1 V V V V 24/49 Fieldstrength controlled Rectifier Voltage TDA7406T Table 3. ELECTRICAL CHARACTERISTICS (continued) All parameters measured in FM mode if not otherwise specified. Symbol Parameter Test conditions Min. Typ. Max. Unit TSFM Suppression Pulse Duration FM Signal HOLDN in Testmode 00 01 10 11 38 25.5 32 22 µs µs µs µs TSAM Suppression Pulse Duration AM Signal HOLDN in Testmode 00 01 10 11 1.2 800 1.0 640 ms µs ms µs VRECTADJ Noise rectifier discharge adjustment Signal PEAK in Testmode 00 01 10 11 0.3 0.8 1.3 2.0 V/ms Signal PEAK in Testmode 0 1 10 20 mV/µs 00 01 10 11 0.3 0.5 0.7 0.9 V/ms SRPEAK Noise rectifier charge VADJMP Noise rectifier adjustment through Signal PEAK in Multipath Testmode RAMIF AM IF Input resistance 35 GAMIF,min min. gain AM IF 65 kΩ 6 dB GAMIF,max max. gain AM IF 20 dB GAMIF,step step gain AM IF 2 dB 14 kHz 56 kHz fAMIF,min Signal AM-RECTIFIER in Testmode 50 min. fc AM IF Signal AM-RECTIFIER in Testmode fAMIF,max max. fc AM IF Notes: 1. All thresholds are measured using a pulse with TR = 2 µs, THIGH= 2 µs and TF = 10 µs. The repetition rate must not increase the PEAK voltage. V in V op DC T im e TR T HIGH T F 25/49 TDA7406T Figure 18. Trigger Threshold vs. VPEAK V TH 260 mV (00 ) 220 mV (01 ) 180 mV (1 0) 140 mV (1 1) MIN . TR IG . T HR ES H O L D N O ISE C O N T R O L LE D T R IG . TH R ES H O L D 65m V 8 STEPS 30m V 0.9 V V P EA K [V ] 1.5 V Figure 19. Deviation Controlled Trigger Adjustment VP E A K [V OP ] 00 2 .8 01 2 .0 10 1 .2 0 .9 D ete c tor o ff (1 1 ) 20 3 2 .5 45 D E V IA T IO N [K H z] 75 Figure 20. Fieldstrength Controlled Trigger Adjustment VP E A K MONO S TER E O ≈ 3V 2 .4V (00 ) 1 .9V (0 1 ) 1 .4V (1 0 ) N O IS E 0 .9 V A T C _ S B O F F (1 1) n ois y s ig n al 26/49 g o o d sig n a l E' TDA7406T MULTIPATH DETECTOR Features: ■ internal 19kHz band-pass filter ■ programmable band-pass- and rectifier-gain ■ selectable internal influence on Stereoblend and/or Highcut Table 4. ELECTRICAL CHARACTERISTICS Symbol fCMP GBPMP Parameter Test Conditions Min. Typ. Max. Unit Center frequency of MultipathBandpass stereodecoder locked on Pilot tone 19 kHz Bandpass Gain G1 6 dB G2 12 dB G3 16 dB G4 18 dB G1 7.6 dB G2 4.6 dB G3 0 dB 0.25 0.5 µA 4 mA GRECTMP Rectifier Gain ICHMP Rectifier Charge Current IDISMP Rectifier Discharge Current Quality Detector A 4 Multipath Influence Factor 00 01 10 11 0.70 0.85 1.00 1.15 FUNCTIONAL DESCRIPTION OF STEREODECODER Figure 21. Block diagram of the stereodecoder 27/49 TDA7406T The stereodecoder-part of the TDA7406T (see Fig. 25) contains all functions necessary to demodulate the MPX-signal like pilot tone-dependent MONO/STEREO-switching as well as “stereoblend” and “highcut”. Adaptations like programmable input gain, roll-off compensation, selectable de-emphasis time constant and a programmable field strength input allow to use different IF-devices. 4.1 Stereodecoder-Mute The TDA7406T has a fast and easy to control RDS-Mute function which is a combination of the audioprocessor's SoftMute and the high-ohmic mute of the stereodecoder. If the stereodecoder is selected and a SoftMute command is sent (or activated through the SM-pin) the stereodecoder will be set automatically to the high-ohmic mute condition after the audio-signal has been soft muted. Hence a checking of alternate frequencies could be performed. Additionally the PLL can be set to “Hold”-mode, which disables the PLL input during the mute time. To release the system from the mute condition simply the unmute-command must be sent: the stereodecoder is unmuted immediately and the audioprocessor is softly unmuted. Fig. 26 shows the output-signal VO as well as the internal stereodecoder mute signal. This influence of SoftMute on the stereodecoder mute can be switched off by setting bit 3 of the SoftMute byte to “0”. A stereodecoder mute command (bit 0, stereodecoder byte set to “1”) will set the stereodecoder in any case independently to the high-ohmic mute state. If any other source than the stereodecoder is selected the decoder remains muted and the MPX-pin is connected to Vref to avoid any discharge of the coupling capacitor through leakage currents. No further mute command should be applied. Figure 22. Signals during stereodecoder's SoftMute Figure 23. Signal-Control via SoftMute-Pin 28/49 TDA7406T 4.2 2.2. InGain + InFilter The InGain stage allows to adjust the MPX-signal to an internal magnitude of about 1Vrms which is the recommended value. The 4.th order input filter has a corner frequency of 80kHz and is used to attenuate spikes and noise and acts as an anti-aliasing filter for the following switch capacitor filters. 4.3 Demodulator In the demodulator block the left and the right channel are separated from the MPX-signal. In this stage also the 19-kHz pilot tone is cancelled. For reaching a high channel separation the TDA7406T offers an I2C-bus programmable roll-off adjustment which is able to compensate the lowpass behavior of the tuner section. If the tuner's attenuation at 38kHz is in a range from 7.2% to 31.0% the TDA7406T needs no external network in front of the MPX-pin. Within this range an adjustment to obtain at least 40dB channel separation is possible. The bits for this adjustment are located together with the fieldstrength adjustment in one byte. This gives the possibility to perform an optimization step during the production of the car radio where the channel separation and the fieldstrength control are trimmed. The setup of the Stereoblend characteristics which is programmable in a wide range is described in 4.8. 4.4 De-emphasis and Highcut The de-emphasis-lowpass allows to choose a time constant between 37.5 and 100µs. The highcut control range will be 2 x τDeemp or 2.7 x τDeemp dependent on the selected time constant (see programming section). The bit D7 of the hightcut-byte will shift time constant and range. Inside the highcut control range (between VHCH and VHCL) the LEVEL signal is converted into a 5 bit word which controls the lowpass time constant between τDeemp...3 (3.7) x τDeemp. Thereby the resolution will remain always 5 bits independently of the absolute voltage range between the VHCH- and VHCL-values. In addition the maximum attenuation can be fixed between 2 and 10dB. The highcut function can be switched off by I2C-bus (bit D7, Highcut byte set to “0”). The setup of the highcut characteristics is described in 4.9. 4.5 PLL and Pilot tone-Detector The PLL has the task to lock on the 19kHz pilot tone during a stereo-transmission to allow a correct demodulation. The included pilot tone-detector enables the demodulation if the pilot tone reaches the selected pilot tone threshold VPTHST. Two different thresholds are available. The detector output (signal STEREO, see Block diagram) can be checked by reading the status byte of the TDA7406T via I2C-bus. During a Softmute the PLL can be set into “Hold”-mode which freezes the PLL's state (bit D4, Softmute byte). After releasing the Softmute the PLL will again follow the input signal only by correcting the phase error. 4.6 Fieldstrength Control The fieldstrength input is used to control the highcut- and the stereoblend-function. In addition the signal can be also used to control the noiseblanker thresholds and as input for the multipath detector. These additional functions are described in sections 5.3 and 6. 4.7 LEVEL-Input and -Gain To suppress undesired high frequency modulation on the highcut- and stereoblend-control signal the LEVEL signal is lowpass filtered firstly. The filter is a combination of a 1.st-order RC-lowpass at 53kHz (working as antialiasing filter) and a 1.st-order switched-capacitor-lowpass at 2.2kHz. The second stage is a programmable gain stage to adapt the LEVEL signal internally to different IF-devices (see Testmode section 5: LEVELHCC). The gain is widely programmable in 16 steps from 0dB to 6dB (step=0.4dB). These 4 bits are located together with the Roll-Off bits in the “Stereodecoder-Adjustment”-byte to simplify a possible adjustment during the production of the car radio. This signal controls directly the Highcut stage whereas the signal is filtered again (fc=100Hz) before the stereoblend stage (see fig. 24). 29/49 TDA7406T 4.8 Stereoblend Control The stereoblend control block converts the internal LEVEL-voltage (LEVELSB) into an demodulator compatible analog signal which is used to control the channel separation between 0dB and the maximum separation. Internally this control range has a fixed upper limit which is the internal reference voltage REF5V. The lower limit can be programmed between 20 and 70% of REF5V in 3.3% steps (see figs.24, 25). To adjust the external LEVEL-voltage to the internal range two values must be defined: the LEVEL gain LG and VSBL (see fig. 25). At the point of full channel separation the external level signal has to be amplified so that internally it becomes equal to REF5V. The second point (e.g. 10dB channel sep.) is then adjusted with the VSBL voltage. Figure 24. Internal stereoblend characteristics The gain can be programmed through 4 bits in the “Stereodecoder-Adjustment”-byte. All necessary internal reference voltages like REF5V are derived from a bandgap circuit. Therefore they have a temperature coefficient near zero. Figure 25. Relation between internal and external LEVEL-voltages for setup of Stereoblend 70 20 30/49 TDA7406T 4.9 Highcut Control The highcut control set-up is similar to the stereoblend control set-up: the starting point VHCH can be set with 2 bits to be 42, 50, 58 or 66% of REF5V whereas the range can be set to be 17, 22, 28 or 33% of VHCH (see fig. 26). Figure 26. Highcut characteristics 5 FUNCTIONAL DESCRIPTION OF THE NOISEBLANKER In the automotive environment the MPX-signal as well as the AM-signal is disturbed by spikes produced by the ignition and other radiating sources like the wiper-motor. The aim of the noiseblanker part is to cancel the audible influence of the spikes. Therefore the output of the stereodecoder is held at the actual voltage for a time between 22 and 38µs in FM (370 and 645µs in AM-mode). The block diagram of the noiseblanker is given in fig.27. Figure 27. Block diagram of the noiseblanker In a first stage the spikes must be detected but to avoid a wrong triggering on high frequency (white) noise a complex trigger control is implemented. Behind the trigger stage a pulse former generates the “blanking”-pulse. 5.1 Trigger Path FM The incoming MPX signal is highpass-filtered, amplified and rectified. This second order highpass-filter has a corner-frequency of 140kHz. The rectified signal, RECT, is integrated (lowpass filtered) to generate a signal called PEAK. The DC-charge/discharge behavior can be adjusted as well as the transient behavior (MP-discharge control). Also noise with a frequency 140kHz increases the PEAK voltage. The PEAK voltage is fed to a threshold generator, which adds to the PEAK-voltage a DC-dependent threshold VTH. Both signals, RECT and PEAK+VTH are fed to a comparator which triggers a re-triggerable flip-flop. The flip-flop's output activates the sample-and-hold circuits in the signal path for the selected duration. 31/49 TDA7406T 5.2 Noise Controlled Threshold Adjustment (NCT) There are mainly two independent possibilities for programming the trigger threshold: 1. the low threshold in 8 steps (bits D1 to D3 of the noiseblanker-byte I) 2. and the noise adjusted threshold in 4 steps (bits D4 and D5 of the noiseblanker-byte I, see fig. 19). The low threshold is active in combination with a good MPX signal without noise; the PEAK voltage is less than 1V. The sensitivity in this operation is high. If the MPX signal is noisy (low fieldstrength) the PEAK voltage increases due to the higher noise, which is also rectified. With increasing of the PEAK voltage the trigger threshold increases, too. This gain is programmable in 4 steps (see fig. 22). 5.3 Additional Threshold Control Mechanism 5.3.1 Automatic Threshold Control by the Stereoblend voltage Besides the noise controlled threshold adjustment there is an additional possibility for influencing the trigger threshold which depends on the stereoblend control. The point where the MPX signal starts to become noisy is fixed by the RF part. Therefore also the starting point of the normal noise-controlled trigger adjustment is fixed (fig. 20). In some cases the behavior of the noiseblanker can be improved by increasing the threshold even in a region of higher fieldstrength. Sometimes a wrong triggering occurs for the MPX signal often shows distortion in this range which can be avoided even if using a low threshold. Because of the overlap of this range and the range of the stereo/mono transition it can be controlled by stereoblend. This increase of the threshold is programmable in 3 steps or switched off. 5.3.2 Over Deviation Detector If the system is tuned to stations with a high deviation the noiseblanker can trigger on the higher frequencies of the modulation or distortion. To avoid this behavior, which causes audible noise in the output signal, the noiseblanker offers a deviation-dependent threshold adjustment. By rectifying the MPX signal a further signal representing the actual deviation is obtained. It is used to increase the PEAK voltage. Offset and gain of this circuit are programmable in 3 steps with the bits D6 and D7 of the noiseblanker-byte I (bit combination '00' turns off the detector, see fig. 19). 5.3.3 Multipath-Level To react on high repetitive spikes caused by a Multipath-situation, the discharge-time of the PEAK voltage can be decreased depending on the voltage-level at pin MPout. The TDA7406T offers a linear as well as a threshold driven control. The linear influence of the Multipath-Level on the PEAK-signal (D7 of Multipath-Control-Byte) gives a discharge slewrate of 1V/ms1. The second possibility is to activate the threshold driven discharge which switches on the 18kOhm discharge if the Multipath-Level is below 2.5V (D7 of noiseblanker-byte II-byte). 1 The slewrate is measured with R Discharge=infinite and VMPout=2.5V 5.3.4 AM mode of the Noiseblanker The TDA7406T noiseblanker is also suitable for AM noise cancelling. The detector uses in AM mode the 450kHz unfiltered IF-output of the tuner for spike detection. A combination of programmable gain-stage and lowpassfilter forms an envelope detector which drives the noiseblanker's input via a 120kHz 1.st order highpass. In order to blank the whole spike in AM mode the hold-times of the sample and hold circuit are much longer then in FM (640µs to 1.2ms). All threshold controls can be used like in FM mode. 6 FUNCTIONAL DESCRIPTION OF THE MULTIPATH-DETECTOR Using the Multipath-Detector the audible effects of a multipath condition can be minimized. A multipath-condition is detected by rectifying the spectrum around 19kHz in the fieldstrength signal. An external capacitor is used to define the attack- and decay-times for the Stereoblend (see block diagram, fig. 32). Due to the very small charge currents this capacitor should be a low leakage current type (e.g ceramic). Using this configuration an adaptation to the user's requirement is possible without effecting the “normal” fieldstrength input (LEVEL) for the stereodecoder. This application is given in fig. 28. Another (internal) time constant is used to control the 32/49 TDA7406T Highcut through the multipath detector Selecting the “internal influence” in the configuration byte the Stereo-Blend and/or the Highcut is automatically invoked during a multipath condition according to the voltage appearing at the MP_OUT-pin. Figure 28. Block diagram of the Multipath-Detector 7 QUALITY DETECTOR The TDA7406T offers a quality detector output which gives a voltage representing the FM-reception conditions. To calculate this voltage the MPX-noise and the multipath-detector output are summed according to the following formula: VQual = 1.6 (VNoise-0.8 V)+ a (REF5V-VMpout). The noise-signal is the PEAK-signal without additional influences (see noiseblanker description). The factor 'a' can by programmed from 0.7 to 1.15. The output is a low impedance output able to drive external circuitry as well as simply fed to an AD-converter for RDS applications. 8 TESTMODE During the Testmode, which can be activated by setting bit I2 of the subaddress byte and bit D1 of the stereodecoder testing-byte, several internal signals are available at the FD2R+ pin. During this mode the input resistance of 100kOhm is disconnected from the pin. The internal signals available are shown in the Data-byte specification 33/49 TDA7406T 9 I²C BUS INTERFACE 9.1 Interface Protocol The interface protocol comprises: -a start condition (S) -a chip address byte (the LSB bit determines read / write transmission) -a subaddress byte -a sequence of data (N-bytes + acknowledge) -a stop condition (P) CHIP ADDRESS SUBADDRESS MSB LSB S 1 0 0 0 1 1 0 R/W ACK MSB T AZ I A A A DATA 1...DATA n A LSB MSB A ACK LSB DATA ACK P S = Start R/W = “0” -> Receive-Mode (Chip could be programmed by µP) “1” -> Transmission-Mode (Data could be received by µP) ACK = Acknowledge P = Stop MAX CLOCK SPEED 500kbits/s 9.1.1 Auto increment If bit I in the subaddress byte is set to “1”, the auto increment of the subaddress is enabled. 9.1.2 TRANSMITTED DATA (send mode) MSB X LSB X X X X P ST SM SM = Soft mute activated ST = Stereo P = Pause X = Not Used The transmitted data is automatically updated after each ACK. Transmission can be repeated without new chip address. 9.1.3 Reset Condition A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that, the following data is written automatically into the registers of all subaddresses: MSB 1 LSB 1 1 1 1 1 1 0 The programming after POR is marked bold-face / underlined in the programming tables. With this programming all the outputs are muted to VREF (VOUT= VDD/2). 34/49 TDA7406T 9.2 SUBADDRESS (receive mode) 1MSB LSB FUNCTION I2 I1 I0 A4 A3 A2 A1 A0 Audioprocessor Testmode off on 0 1 AutoZero Remain off on 0 1 Auto-Increment Mode off on 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 10 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Subaddress Source Selector Loudness Volume EQ Filter 1 (62/100Hz) EQ Filter 2 (157Hz) EQ Filter 3 (396Hz) EQ Filter 4 (1kHz) EQ Filter 5 (2.51kHz) EQ Filter 6 (4/6.34kHz) EQ Filter 7 (15/16kHz) Mixing Programming SoftMute Subwoofer / Spectrum analyzer / HighPass Configuration Audioprocessor I Configuration Audioprocessor II Speaker attenuator LF Speaker attenuator RF Speaker attenuator LR Speaker attenuator RR Subwoofer attenuator Mixing Level Control Testing Audioprocessor Stereodecoder Noise-Blanker I Noise-Blanker II AM / AM-Noiseblanker High-Cut Control Fieldstrength & Quality Multipath-Detector Stereodecoder Adjustment Configuration Stereodecoder Testing Sterodecoder 35/49 TDA7406T 9.3 DATA BYTE SPECIFICATION The status after Power-On-Reset is marked bold-face / underlined in the programming tables. Table 5. Input Selector (0) MSB LSB FUNCTION D7 D6 0 0 : 1 1 D5 D4 0 0 : 1 1 0 0 : 1 1 D3 D2 D1 D0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Source Selector CDC/PD CD MD Tape Phone Navi Tuner TIM Input Gain 0dB 1dB : 14dB 15dB 0 1 : 0 1 Mute off on 0 1 Table 6. Loudness (1) MSB LSB FUNCTION D7 D6 0 0 1 1 0 1 36/49 D5 0 1 0 1 D4 D3 D2 D1 D0 0 0 : 0 0 : 1 : 0 0 : 1 1 : 0 : 0 0 : 1 1 : 0 : 0 0 : 1 1 : 1 : 0 1 : 0 1 : 1 : Attenuation 0 dB -1 dB : -14 dB -15 dB : -19 dB not allowed Center Frequency 200Hz 400Hz 600Hz 800Hz Loudness Order First Order Second Order TDA7406T Table 7. Volume (2) MSB LSB ATTENUATION D7 D6 D5 D4 D3 D2 D1 D0 0 0 : 0 0 0 : 0 0 0 : 1 1 0 0 : 0 0 0 : 0 1 1 : 1 1 0 0 : 0 0 0 : 1 0 0 : 0 0 0 0 : 1 1 1 : 1 0 0 : 1 1 0 0 : 1 1 1 : 1 0 0 : 1 1 0 0 : 0 0 0 : 1 0 0 : 1 1 0 0 : 0 0 1 : 1 0 0 : 1 1 0 1 : 0 1 0 : 1 0 1 : 0 1 Gain/Attenuation (+32.0dB) (+31.5dB) : +20.0dB +19.5dB +19.0dB : +0.5dB 0.0dB -0.5dB : -79.0dB -79.5dB Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limited by software to the maximum value, which is needed for the system. Table 8. Equalizer (3,4,5,6,7,8,9) MSB LSB FUNCTION D7 D6 0 0 1 1 D5 0 1 0 1 D4 D3 D2 D1 D0 0 0 : 0 0 1 1 : 1 1 0 0 : 1 1 1 1 : 0 0 0 0 : 1 1 1 1 : 0 0 0 0 : 1 1 1 1 : 0 0 0 1 : 0 1 1 0 : 1 0 Equalizer cut/boost level -15dB -14dB : -1dB 0dB 0dB +1dB : +14dB +15dB Equalizer Q-Factor 2.2 1.8 1.4 1.0 0 1 Equalizer Center Frequency (only Subaddresses 3,8,9) 62Hz(addr 3)/4kHz(addr 8)/15kHz(addr 9) 100Hz(addr 3)/6.24kHz(addr 8)/16kHz(addr 9) 0 1 DC mode EQ Band 1 (62/100 Hz, Subaddress. 4!) on off 37/49 TDA7406T Table 9. Mixing Programming (10) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 Mixing Mute enable Mixing Source Beep Phone Navi Tuner / TIM 0 1 0 1 Mixing Target Speaker LF off Speaker LF on Speaker RF off Speaker RF on Speaker LR off Speaker LR on Speaker RR off Speaker RR on 0 1 0 1 0 1 0 1 1 must be “1” Table 10. SoftMute (11) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 1 38/49 0 1 0 1 0 1 0 1 SoftMute On (Mute) Off SoftMute Time Mute time = 0.48ms Mute time = 0.96ms Mute time = 123ms Mute time = 324 ms Influence on Stereodecoder Highohmic-Mute on off Influence on Pilot-detector Hold and MP-Hold on off Influence on SoftMute on off Beep Frequencies 600 Hz 780 Hz 1.56 kHz 2.4 kHz TDA7406T Table 11. Subwoofer Configuration / Spectrum Analyzer / HighPass (12) MSB D7 LSB D6 D5 D4 D3 0 0 1 1 D2 D1 D0 0 0 1 1 0 1 0 1 Subwoofer Filter off 80Hz 120Hz 160Hz Subwoofer Coupling AC using SWIn pin AC using MixInR pins AC using SWIn pin DC 0 1 0 1 Spectrum Analyzer Q-Factor 3.5 1.8 0 1 High Pass Enable Filter off Filter on 0 1 0 0 1 1 FUNCTION High Pass Cut-Off-Frequency 90Hz 135Hz 180Hz 215Hz 0 1 0 1 Table 12. Configuration Audioprocessor I (13) MSB D7 LSB D6 D5 D4 D3 D2 D1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 FUNCTION D0 CDC Input Mode single ended pseudo differential CDC Input Gain -6 dB 0 dB SoftStep Volume off on SoftStep Time 320µs 1.28ms 5.12ms 20.4ms Loudness flat filter ON Mixing Selector Tuner/TIM Switch TIM Tuner Tuner Selection AM Stereodecoder 39/49 TDA7406T Table 13. Configuration Audioprocessor II (14) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 Pause Detector off on Pause ZC Window 160mV 80mV 40mV not allowed 0 1 0 1 Front Speaker Mixing ACIn and MixIn AC coupling (MixIn) AC coupling (ACIn) DC coupling 0 1 0 1 Rear Speaker Mixing ACIn and MixIn AC coupling (MixIn) AC coupling (ACIn) DC coupling 0 1 0 1 1 must be “1” Table 14. Speaker and Subwoofer Level Control (15,16,17,18,19) MSB LSB ATTENUATION D7 0 1 40/49 D6 D5 D4 D3 D2 D1 D0 0 : 0 0 0 0 : 0 : 0 : 1 : 1 : 1 1 0 : 0 0 0 0 : 1 : 1 : 0 : 0 : 0 1 0 : 0 0 1 1 : 0 : 1 : 0 : 1 : 1 X 1 : 0 0 0 0 : 0 : 0 : 0 : 0 : 1 X 1 : 0 0 0 0 : 0 : 0 : 0 : 0 : 1 X 1 : 0 0 0 0 : 0 : 0 : 0 : 0 : 1 X 1 : 1 0 0 1 : 0 : 0 : 0 : 0 : 1 X Gain/Attenuation +15dB : + 1dB 0dB 0dB - 1dB : -16dB : -32dB : -48dB : -64dB -79dB Mute SoftStep On/Off On Off TDA7406T Table 15. Mixer Level Control (20) MSB LSB ATTENUATION D7 D6 D5 D4 D3 D2 D1 D0 1 0 : 0 0 0 0 : 0 0 : 1 1 1 0 : 0 0 0 0 : 0 0 : 0 0 1 0 : 0 0 0 0 : 0 1 : 0 0 X 1 : 0 0 0 0 : 1 0 : 1 1 X 1 : 0 0 0 0 : 1 0 : 1 1 X 1 : 0 0 0 0 : 1 0 : 1 1 X 1 : 1 0 0 1 : 1 0 : 0 1 X 1 1 0 0 : 0 0 : 0 0 X Gain/Attenuation +15dB : + 1dB 0dB 0dB - 1dB : -15dB -16dB : -78dB -79dB Mute Table 16. Testing Audioprocessor (21) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 1 0 1 0 1 X 0 1 X X X 0 1 0 1 0 1 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 0 0 1 0 1 Audioprocessor Testmode off on Test-Multiplexer Spectrum Analyzer Filter 62Hz Spectrum Analyzer Filter 157Hz Spectrum Analyzer Filter 400Hz Spectrum Analyzer Filter 1kHz Spectrum Analyzer Filter 2.51kHz Spectrum Analyzer Filter 6.34kHz Spectrum Analyzer Filter 16kHz Not Allowed not used 200kHz Oscillator NB-Hold internal Reference Clock external internal AZ Function off on SC-Clock Fast Mode Normal Mode Note: This byte is used for testing or evaluation purposes only and must not set to other values than “11111110” in the application! 41/49 TDA7406T Table 17. Stereodecoder (22) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 1 0 1 IN-Gain 11dB IN-Gain 8.5dB IN-Gain 6dB IN-Gain 3.5dB Stereodecoder Input AM MPX 0 1 0 1 Forced MONO MONO/STEREO switch automatically 0 1 0 0 1 1 STD Unmuted STD Muted Pilot Threshold HIGH Pilot Threshold LOW 0 1 0 1 De-emphasis 50µs (37.5µs1) De-emphasis 62.5µs (46.9µs1) De-emphasis 75µs (56.3µs1) De-emphasis 100µs (75µs1) 1 If De-emphasis-Shift enabled (Subaddr.26/Bit7 = 0) Table 18. Noiseblanker I (23) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 42/49 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Noiseblanker off Noiseblanker on Low Low Low Low Low Low Low Low Threshold Threshold Threshold Threshold Threshold Threshold Threshold Threshold Noise Noise Noise Noise 65mV 60mV 55mV 50mV 45mV 40mV 35mV 30mV Controlled Controlled Controlled Controlled Threshold Threshold Threshold Threshold 320mV 260mV 200mV 140mV Over deviation Adjust 2.8V Over deviation Adjust 2.0V Over deviation Adjust 1.2V Over deviation Detector OFF TDA7406T Table 19. Noiseblanker II (24) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 PEAK charge current low high Fieldstrength adjust 2.3V 1.8V 1.3V OFF 0 1 0 1 Blank Time FM / AM 38µs / 1.2ms 25.5µs / 800µs 32µs / 1.0s 22µs / 640µs 0 1 0 1 Noise Rectifier Discharge Resistor R = infinite RDC = 56k RDC = 33k RDC = 18k 0 1 0 1 Strong Multipath influence on PEAK 18k off on (18k discharge if VMPout< 2.5V) 0 1 Table 20. AM / FM-Noiseblanker (25) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 0 0 1 1 1 1 0 0 1 1 1 1 0 1 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Stereodecoder Mode FM AM AM Rectifier Gain 6dB 8dB 10dB 12dB 14dB 16dB 18dB 20dB Rectifier Cut-Off Frequency 14.0kHz 18.5kHz 28.0kHz 56.0kHz must be “1” 43/49 TDA7406T Table 21. High-Cut (26) MSB D7 LSB D6 D5 D4 D3 D2 D1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 FUNCTION D0 High-Cut off on max. High-Cut 2dB 5dB 7dB 10dB 0 1 0 1 VHCH to be at 42% REF5V 50% REF5V 58% REF5V 66% REF5V 0 1 0 1 VHCL to be at 16.7% VHCH 22.2% VHCH 27.8% VHCH 33.3% VHCH 0 1 0 1 De-emphasis Shift On Off 0 1 Table 22. Fieldstrength Control (27) MSB D7 LSB D6 D5 0 0 1 1 0 0 1 1 44/49 0 1 0 1 D4 0 1 0 1 D3 D2 D1 D0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FUNCTION VSBL to be at 20.0% REF5V 23.3% REF5V 26.6% REF5V 30.0% REF5V 33.3% REF5V 36.6% REF5V 40.0% REF5V 43.3% REF5V 46.6% REF5V 50.0% REF5V 53.3% REF5V 56.6% REF5V 60.0% REF5V 63.3% REF5V 66.6% REF5V 70.0% REF5V Quality Detector Coefficient a=0.7 a=0.85 a=1.0 a=1.15 HCC-Level-Shift (only Level through MPD) 0.0V 500mV 1.0 V 1.5 V TDA7406T Table 23. Multipath Detector (28) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 1 0 0 1 1 Fast Load on off Bandpass Gain 6dB 12dB 16dB 18dB 0 1 0 1 Rectifier Gain Gain = 7.6dB Gain = 4.6dB Gain = 0dB disabled 0 1 0 1 Charge Current at MP-Out 0.25µA 0.50µA 0 1 Multipath on High-Cut Decay-Time 2ms 10ms 0 1 Multipath influence on PEAK Discharge off -1V/ms 0 1 Table 24. Stereodecoder Adjustment (29) MSB LSB FUNCTION D2 D1 D0 0 0 0 : 0 : 0 0 0 0 : 1 : 1 0 0 1 : 0 : 1 0 1 0 : 0 : 1 Roll-Off Compensation not allowed 7.2% 9.4% : 13.7% : 20.2% 1 1 1 : 1 : 1 0 0 0 : 1 : 1 0 0 1 : 0 : 1 0 1 0 : 0 : 1 not allowed 19.6% 21.5% : 25.3% : 31.0% D7 D6 0 0 0 : 1 D5 0 0 0 : 1 D4 0 0 1 : 1 D3 0 1 0 : 1 LEVEL Gain 0dB 0.4dB 0.8dB : 6dB 45/49 TDA7406T Table 25. Stereodecoder Configuration (30) MSB D7 LSB D6 D5 D4 D3 D2 D1 0 1 1 x 1 x 1 1 1 Level-Input over Multipath-Detector1 On Off Dual MPX Mode On Off 0 1 1 Multipath Influence on High-Cut On Off Multipath Influence on Stereo-Blend On Off 0 1 0 1 FUNCTION D0 1 must be “1” Using the Multipath Time-Constants for Stereo-Bland and High-Cut Table 26. Testing Stereodecoder(31) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Main Testmode off on Stereodecoder Testmode off on Test signals F228 NB threshold Level for Stereo-Blend Pilot magnitude VHCCL Pilot threshold VHCCH REF5V HOLDN NB Peak AM-Rectifier VCOCON; VCO Control Voltage VSBL Pilot threshold Level for High-Cut REF5V Audioprocessor Oscillator Off On must be “1” Note: This byte is used for testing or evaluation purposes only and must not be set to other values than “11111100” in the application! 46/49 TDA7406T Figure 29. Application Diagram 47/49 TDA7406T mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 1.60 A1 0.05 A2 1.35 B 0.30 C 0.09 0.063 0.15 0.002 0.006 1.40 1.45 0.053 0.055 0.057 0.37 0.45 0.012 0.014 0.018 0.20 0.004 0.008 D 12.00 0.472 D1 10.00 0.394 D3 8.00 0.315 e 0.80 0.031 E 12.00 0.472 E1 10.00 0.394 E3 8.00 0.315 L 0.45 0.60 0.75 OUTLINE AND MECHANICAL DATA MAX. 0.018 0.024 L1 1.00 K 0°(min.), 3.5˚(typ.), 7°(max.) 0.030 0.039 TQFP44 (10 x 10) D D1 A A2 A1 33 23 34 22 0.10mm .004 B E B E1 Seating Plane 12 44 11 1 C L e K TQFP4410 48/49 TDA7406T Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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