TDA7454 4 x 35W HIGH EFFICIENCY QUAD BRIDGE CAR RADIO AMPLIFIER HIGH OUTPUT POWER CAPABILITY: 4 x 40W/4Ω MAX. 4 x 35W/4Ω EIAJ. 4 x 25W/4Ω @14.4V, 1KHz, 10% 4 x 60W/2Ω MAX. 2Ω DRIVING CAPABILITY DUAL MODE OPERATING EXTERNALLY PRESETTABLE: CONVENTIONAL CLASS AB MODE, HIGH EFFICIENCY MODE LOW EXTERNAL COMPONENTS COUNT: – NO BOOTSTRAP CAPACITORS – NO EXTERNAL COMPENSATION – INTERNALLY FIXED GAIN (26dB) CLIPPING DETECTOR ST-BY FUNCTION (CMOS COMPATIBLE) MUTE FUNCTION (CMOS COMPATIBLE) AUTOMUTE AT MINIMUM SUPPLY VOLTAGE DETECTION LOW RADIATION Protections: OUPUT SHORT CIRCUIT TO GND; TO VS; ACROSS THE LOAD 3 STEPS OVERRATING CHIP TEMPERATURE WITH THERMAL WARNING LOAD DUMP VOLTAGE FORTUITOUS OPEN GND BLOCK & APPLICATION DIAGRAM MULTIPOWER BCD TECHNOLOGY Flexiwatt 25 LOUDSPEAKER DC CURRENT ESD DESCRIPTION The TDA7454 is a new BCD technology QUAD BRIDGE type of car radio amplifier in Flexiwatt25 packagespecially intendedfor car radio applications. Among the features, its superior efficiency performance coming from the internal exclusive structure, makes it the most suitable device to simplify the thermal management in high power sets. The dissipated output power under average listening condition is in fact reduced up to 50% when compared to the level provided by conventional class AB solutions. 6 STD/HI- EFF 16 20 7 0.22µF IN RIGHT FRONT 11 VCC1 VCC2 8 RIGHT FRONT + 9 ST-BY IN RIGHT REAR 4 0.22µF VCC - 13 S-GND 5 + 12 2 MUTE 22 0.22µF IN LEFT FRONT 15 100µF RIGHT REAR 3 - 19 18 LEFT FRONT + 17 SVR 0.22µF 10 1 21 IN LEFT REAR 14 CD 25 TAB + 24 23 LEFT REAR D94AU172C October 1999 1/13 TDA7454 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vop Operating Supply Voltage 18 V VS DC Supply Voltage 28 V Peak Supply Voltage (for t = 50ms) 40 V IO Output Peak Current (not repetitive t = 100µs) 8 A IO Output Peak Current (repetitive f > 10Hz) 6 A Power Dissipation T case = 70°C 86 W -55 to 150 °C Vpeak Ptot Tstg, Tj Storage and Junction Temperature THERMAL DATA Symbol Rth j-case Description Thermal Resistance Junction-case Max PIN CONNECTION (Top view) 25 CD 24 PW GND LR 23 OUT LR- 22 MUTE OUT LR+ 20 VCC2 19 OUT LF- 18 PW GND LF 17 OUT LF+ 16 STD/HEFF 15 IN LF 14 IN LR 13 S GND 12 IN RR 11 IN RF 10 SVR 9 OUT RF+ 8 PW GND RF 7 OUT RF- 6 VCC1 OUT RR+ 4 ST-BY 3 OUT RR- 2 PW GND RR 1 TAB D94AU173A 2/13 Value Unit 1 °C/W TDA7454 ELECTRICAL CHARACTERISTICS (Refer to the test circuit V S = 14.4V; RL = 4Ω; f = 1KHz; T amb = 25°C, unless otherwise specified Symbol Parameter VS Supply Voltage Range Id Total Quiescent Drain Current Po Output Power Test Condition Min. Typ. 8 Max. Unit 18 V 250 mA 60 140 THD = 10% THD = 1% 23 18 25 20 W W THD = 10% RL = 2Ω; THD = 1% RL = 2Ω; 40 28 42 30 W W Po EIAJ EIAJ Output Power (*) Vs = 13.7V Vs = 13.7V, RL = 2Ω 32 50 35 52 W W Po max. Max. Output Power (*) Vs = 14.4V Vs = 14.4V, RL = 2Ω 38 55 40 60 W W Total harmonic distortion PO = 1W to 10W; STD MODE PO = 1W; HE MODE PO = 10W; HE MODE 0.03 0.04 0.1 0.3 0.3 0.5 % % % R L = 2Ω; HE MODE; PO = 3W R L = 2Ω; HE MODE; PO = 15W 0.06 0.15 0.3 0.5 % % KΩ THD CT Cross Talk 45 55 R IN Input Impedance 11 15 19 GV Voltage Gain 25 26 27 dB ∆GV EIN Voltage Gain Match 1 dB Output Noise Voltage R g = 600Ω 150 mV SVR Supply Voltage Rejection f = 300Hz; Vr = 1Vrms; R g = 0 to 100Ω; BW Power Bandwidth (–3dB) A SB Stand-by Attenuation Vsb IN Stand-by in Threshold Vsb OUT Stand-by Current Consumption AM Mute Attenuation IN Mute in Thereshold VM OUT Mute out Threshold IM Mute pin Current (Sourced) Mode Select Switch 100 45 52 Clip Det. out Current (Pull up to 5V with 10KΩ) dB KHz 100 dB 1.5 V 100 µA 3.5 80 V 90 dB 1.5 V 10 µA 3.5 V = 0 to VS VS max = 18V Standard BTL Mode Op. (Vpin 16 ) -10 V 1 Open High Efficiency Mode (Vpin 16 ) CD dB 75 90 Stand-by out Threshold Isb VM f = 1KHz to 10KHz CD off: P Omin = 10W CD on: THD = 5% 150 0.5 V 5 µA µA (*) Saturated square wave output. 3/13 TDA7454 Figure 1: Standard Test and Application Circuit. C8 0.1µF C9 2200µF Vcc1 Vcc2 6 R1 20 4 ST-BY 10K R2 9 C6 0.1µF MUTE 7 22 10K C7 1µF 5 C1 3 0.22µF TDA7454 12 IN RR 17 C2 0.22µF 18 C3 0.22µF 21 14 IN LR S-GND 24 13 (*) SW1 (*) OPEN = STANDARD BTL CLOSED=HI-EFF BTL OUT LR 23 16 4/13 OUT LF 19 15 IN LF C4 0.22µF OUT RR 2 11 IN RF OUT RF 8 10 25 SVR 1 TAB C5 100µF D95AU416 CLIP DET TDA7454 Figure 2: P.C.B. and components layout of fig. 1 circuit. (1.25 :1 scale) COMPONENTS & TOP COPPER LAYER BOTTOM COPPER LAYER 5/13 TDA7454 Figure 3: Quiescent Current vs. Supply Voltage Id (mA) 240 Figure 4: Output Power vs. Supply Voltage 45 Po (W) 40 200 160 THD= 10 % RL= 4 Ohm f= 1 KHz 35 Vi = 0 RL = 4 Ohm 30 25 120 THD= 1 % 20 15 80 10 40 8 10 12 Vs (V) 14 16 18 Figure 5: Max. Output Power vs. Supply Voltage 60 55 50 45 40 35 30 25 20 15 10 5 Po (W) 8 9 10 11 12 13 Vs (V) 14 15 16 17 18 Figure 6: Output Power vs. Supply Voltage 50 Po (W) 45 THD = 10 % 40 RL= 4 Ohm f= 1 KHz RL = 2 Ohm f = 1 KHz 35 30 THD = 1 % 25 20 15 10 8 9 10 11 12 13 Vs (V) 14 15 16 17 18 Figure 7: Max. Output Power vs. Supply Voltage 75 70 65 60 55 50 45 40 35 30 25 20 15 5 Po (W) 5 8 10 11 12 Vs (V) 13 14 15 Figure 8: THD vs. Output Power 10 RL= 2 Ohm f= 1 KHz 9 THD (%) RL = 4 Ohm HI-EFF MODE 1 f = 10 KHz 0.1 f = 1 KHz 8 6/13 9 10 11 12 Vs (V) 13 14 15 16 0 0 1 Po (W) 10 16 TDA7454 Figure 10: Muting Attenuation vs. Vpin 22 Figure 9: THD vs. Output Power 10 THD (%) RL= 2 Ohm HI-EFFMODE 1 100 90 80 70 60 50 40 30 20 10 0 f = 10 KHz 0.1 f = 1 KHz 0 0 1 10 Po (W) Figure 11: THD vs. Frequency OUT ATTN Po= 4 W f= 20 to 20,000 Hz 0 0.5 1 1.5 2 2.5 3 3.5 Vpin22 (V) 4 4.5 5 Figure 12: Supply Voltage Rejection vs. Frequency THD (%) 100 10 SVR (dB) 90 RL = 4 Ohm Po = 1 W HI-EFF MODE 1 80 Vripple= 1 Vrms Rg= 0 70 60 50 0.1 40 30 0 10 100 1000 f (Hz) 10000 80 Po = 4 W RL = 4 Ohm Rg = 0 HI-E FF MODE 60 50 40 30 20 10 100 f (Hz) 1000 100 1000 10000 Figure 14: Power Dissipation and Efficiency vs. Output Power CROSSTALK (dB) 70 10 f (Hz) Figure 13: Cross-Talk vs. Frequency 90 20 10000 Ptot (W) 70 65 Vs= 14.4 V 60 RL = 4 x 4 Ohm 55 f = 1 KHz 50 45 HI-EFF MODE 40 n 35 30 25 20 Ptot 15 10 5 0 0.1 1 Po (W) n (%) 70 60 50 40 30 20 10 10 0 7/13 TDA7454 OPERATING PRINCIPLE. Thanks to its unique operating principle, the TDA7454 obtains a substantial reduction of power dissipation from traditional class-AB amplifiers without being affected by the massive radiation effects and complex circuitry normally associated with class-D solutions. Its is composed of 8 amplifier blocks, making up 4 bridge-equivalent channels. Half of this structure is drafted in fig 15. These blocks continuously change their connections during every single signal event, according to the instantaneous power demand. This means that at low volumes (output power steadily lower than 2.5 W) the TDA7454 acts as a Single Ended amplifier, condition where block “C” remains disabled and the block “D” behaves like a buffer, which, by furnishing the correct DC biasing (half-Vcc) to each pair of speakers, eliminate the needs of otherwise required output-decoupling capacitors. At the same time, SW1 keeps closed. thus ensuring a common biasing point for L-R front / L-R rear speakers couples. As a result, the equivalent circuit becomes that of fig. 16. The internal switches (SW1) are high-speed, dissipation-free power MOS types, whose realization has been made possible by the ST- exclusive Bypolar-CMOS-DMOS mixed technology process (BCD). From fig. 16 it can be observed that “A” and “B” amplifiers work in phase opposition. Supposing their output have the same signal (equal shape/amplitude), the current sourced by “B” will be entirely sunk by “A”, while no current will flow into “D”, causing no power dissipation in the latter. “A” and “B” are practically configured as a bridge whose load is constituted by Ra + Rb (= 8 Ohm, if 4 Ohm speakers are used), with considerable advantages in terms of power dissipation. Designating “A” and “B” for the reproduction of either FRONT or REAR sections of the same channel (LEFT or RIGHT), keeping the fader in centre position (same amplitude for FRONT and REAR sections) and using the same speakers, as it happens during most of the time, will transpose this best-case dissipation condition into practical applications. To fully take advantage of the TDA7454’s low-dissipation feature, it is then especially important to adopt some criteria in the channels assignment, using the schematic of fig. 1 as a reference. When the power demand increases to more than 2.5 W, all the blocks will operate as amplifiers, SW1 is opened, leading to the seemingly conventional bridge configuration of fig. 17. The efficiency enhancement is based upon the concept that the average output power during the reproduction of normal music/speech programs will stand anywhere between 10 % and 15 % of the rated power (@ THD= 10 %) that the amplifier 8/13 can deliver. This holds true even at high volumes and frequent clipping occurrence. Applied to the TDA7454 (rated power= 25 W), this will result into an average output level of 2.5 - 3 W in sine-wave operation, region where the dissipated power is about 50 % less than that of a traditional amplifier of equivalent power class (see TDA7454 vs. CLASS-AB characteristics, fig. 18). Equally favourable is the case shown by fig. 19, when gaussian-distributed signal amplitudes, which best simulates the amplifier’s real working conditions, are used. APPLICATION HINTS (ref. to the circuit of fig. 1) STAND-BY and MUTING (pins 4 & 22) Both STAND-BY and MUTING pins are CMOScompatible. The current sunk by each of them is about 1 µA. For pop prevention it is essential that during TURN ON/OFF sequences the muting be preventively inserted before making stand-by transitions. But, if for any reason, either muting or stand-by are not used, they have to be connected to Vcc through a 100 Kohm (minimum) resistance. The R-C networks values in fig. 1 (R1-C6 and R2C7) are meant to be the minimum-necessary for obtaining the lowest pop levels possible. Any reductions (especially for R2-C7) will inevitably impair this parameter. SVR (pin 10) The duty of the SVR capacitor (C5) is double: assuring adequate supply-ripple rejection and controlling turn ON/OFF operations. Its indicated value (100 uF) is the minimum-recommended to correctly serve both the purposes. INPUTS (pins 11-12-13-14) The inputs are internally biased at half-Vcc level. The typical input impedance is 15 KOhm, which implies using Cin (C1-C2-C3-C4) = 220 nF for obtaining a theoretical minimum-reproducible frequency of 48 Hz (-3 dB). In any case, Cin values can be enlarged if a lower frequency bound is desired, but, at any Cin enlargement must correspond a proportional increase of Csvr (C5), to safeguard the on/off pop aspect. The following table indicates the right values to be used for Cin and Csvr, whose operating voltage can be 10 V. LOW FREQUENCY ROLL-OFF (-3dB) Cin (µF) Csvr (µF) 48 0.22 100 22 0.47 220 16 0.68 330 11 1 470 TDA7454 Table 1: MODE SELECTION TABLE OPERATION OF THE DEVICE 1) STD/HI-EFF (pin 16 = OPEN) STANDARD QUAD BRIDGE MODE HIGH-EFF QUAD BRIDGE MODE 100 STANDARD QUAD ST-BY MODE SINGLE-ENDED MODE 150 Tchip (deg) 17 0 2) STD/HI-EFF (pin 16 = GND) HIGH-EFF QUAD BRIDGE MODE STANDARD QUAD ST-BY MODE SINGLE-ENDED MODE 150 Tchip (deg) 170 3) STD/HI-EFF (pin 16 connected as shown in the figure below. STANDARD QUAD BRIDGE MODE OR HIGH-EFF MODE (Theatsink dependent) HIGH-EFF QUAD BRIDGE MODE STANDARD QUAD ST-BY MODE SINGLE-ENDED MODE Tchip (deg) 100 150 17 0 Vref STD/HI-EFF (pin 16) NTC t(Theatsink) D94AU174A OUTPUT STAGE STABILITY The TDA7454’s is intrinsically stable and will properly drive any kind of conventional car-radio speakers without the need of supplementary output compensation (e.g. Boucherot cells), thus allowing a drastic reduction of the external parts whose number, abated to the essentials, reflects that of traditional amplifiers. In this respect, perfect pin-to-pin compatibility with the entire SgsThomson’s 4-BTL family (TDA738X) exists. STANDARD / HIGH-EFFICIENCY OPERATION (pin 16) The TDA7454’s operating mode can be selected by changing the connection of pin 16, according to table 1. At low battery levels (<10 V), the device will automatically turn into STANDARD BRIDGE mode, independently from the status of pin 16. Condition # 3 in table 1 is particularly useful when the TDA7454’s operation has to be conditioned by the temperature in other more heat-sensitive devices in the same environment. The NTC resistor is a temperature sensor, to be situated near the critical part(s), will appropriately drive pin 16 through a low-power transitor. Initially the TDA7454 can be set to operate as a STANDARD BRIDGE, turning into HIGH EFFICIENCY mode only if overheating is recognised in the critical spot, thus reducing the overall temperature in the circuit. CLIPPING DETECTOR / DIAGNOSTIC (pin 25) The TDA7454 is equipped with a diagnostic function whose output is available at pin 25. This pin requires a pull-up resistor (10 KOhm min.) to a DC source that may range from 5 V to Vcc. The following events will be recognized and signaled out: Clipping A train of negative-going pulses will appear, each of them syncronized with every single clipping event taking place in ant of the outputs. A possible application consists of filtering / integrating the pulses and implement a routine for automatically reducing / restoring the volume using microprocessor - driven audioprocessors, to counteract the clipping sound-damagingeffects. Overheating Chip temperatures above 150 oC will be signaled out at pin 25 in the form of longer-lasting pulses, as the stepping back into the operating temperature requires some time. 9/13 TDA7454 This constitues a substantial difference from the “clipping” situation, making the two information unmistakable. Associated to a suitable external circuitry, this “warning” signal could be used to mute some portions of the I.C. (e.g. the rear channels) or to attenuate the volume. Short Circuit Some kinds of short circuit (OUT - GND, OUTVcc), either present before the power-on or made afterwards, will cause pin 25 to remain steadily low as long as the faulty condition persists. Short-circuits across the speakers will give intermittent (pulsed) signalling, proportional to the output voltage amplitude. External Layout Grounding The 4 bridge stuctures have independent power ground accesses (pins 2,8,18,24), while the signal ground is common to all of them (pin 13). The Figure 15: TDA7454’s Half Structure + A RF TAB (pin 1) is connected to the chip substrate and has to be grounded to the best-filtered ground spot (usually nearby the minus terminal of the Vcc-filtering electrolytic capacitor). This same point should be used as the centre of a multi-track star-like configuration, or, alternatively, as the origin of only two separate tracks, one for P-GND, one for S-GND, each of them routed to their specific ground pin(s). This will provide the right degree of separation between P-GND and S-GND yet assuring the (necessary) electrical connection between them. The correct ground assignment for the each element of the circuit will then be: POWER GND: Battery (-), Supply filters (C8, C9), TAB (pin 1). SIGNAL GND: Pre-amplifier (Audiprocessor) ground, SVR capacitor (C5), muting/st-by capacitors (C6, C7). Figure 16: Single Ended Operation (Po < 2.5W) B RR INF + A RF INF INR SW1 Vf C + Ron2 F-channel - R-channel D97AU793 CONTROL LOGIC D97AU792 Figure 17: He Bridge Operation (Po < 2.5W) + A RF B INR RR Vf C Vr - + D D97AU794 10/13 Vr D - INF B RR if + if-ir D INR TDA7454 Figure 18: Power Dissipation (Sine-Wave) Pdiss (W) 55 50 45 Vs = 14.4 V RL = 4 x 4 Ohm 40 CLASS-AB 35 30 25 20 15 10 TDA7454 5 0 0.1 1 Po each channel (W) Figure 19: Power Dissipation (Gaussian Signals) 45 Pdiss (W) 40 35 Vs = 14.4 V RL = 4 x 4 Ohm 30 CLASS-AB 25 20 15 10 10 5 0 TDA7454 0.1 1 10 Pout each channel (W) 11/13 TDA7454 DIM. MIN. 4.45 1.80 A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 0.75 0.37 0.80 23.75 28.90 22.07 18.57 15.50 7.70 3.70 3.60 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 24.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 MIN. 0.175 0.070 1.05 0.42 0.57 1.20 24.25 29.30 0.029 0.014 22.87 19.37 15.90 7.95 0.869 0.731 0.610 0.303 4.30 4.40 0.145 0.142 0.031 0.935 1.138 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 0.945 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 OUTLINE AND MECHANICAL DATA 0.041 0.016 0.022 0.047 0.955 1.153 0.904 0.762 0.626 0.313 0.169 0.173 5° (Typ.) 3° (Typ.) 20° (Typ.) 45° (Typ.) Flexiwatt25 (1): dam-bar protusion not included (2): molding protusion included H H1 V3 A H2 O H3 R3 L4 R4 V1 R2 L2 N L3 R L L1 V1 V2 R2 D R1 L5 R1 R1 E G V G1 F M B C V FLEX25ME 12/13 M1 TDA7454 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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