TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com ±1°C REMOTE TEMPERATURE AND ±2.5°C LOCAL TEMPERATURE SENSOR IN SOT23-8 Check for Samples: TMP422-EP FEATURES 1 • • • • • • • • • 234 SOT23-8 Package ±1°C Remote Diode Sensor (Max) ±2.5°C Local Temperature Sensor (Max) Series Resistance Cancellation n-Factor Correction Two-Wire/ SMBus™ Serial Interface Multiple Interface Addresses Diode Fault Detection RoHS Compliant and NO Sb/Br SUPPORTS DEFENSE, AEROSPACE AND MEDICAL APPLICATIONS • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C to 125°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability +5V APPLICATIONS • • • • • Processor/FPGA Temperature Monitoring LCD/ DLP®/LCOS Projectors Servers Central Office Telecom Equipment Storage Area Networks (SAN) 8 V+ 1 SCL DX1 2 SDA DX2 7 SMBus Controller 6 3 DX3 4 DX4 GND 5 1 Channel Local 2 Channels Remote (1) Additional temperature ranges available - contact factory DESCRIPTION The TMP422 is a remote temperature sensor monitor with a built-in local temperature sensor. The remote temperature sensor diode-connected transistors are typically low-cost, NPN- or PNP-type transistors or diodes that are an integral part of microcontrollers, microprocessors, or FPGAs. Remote accuracy is ±1°C for multiple IC manufacturers, with no calibration needed. The two-wire serial interface accepts SMBus write byte, read byte, send byte, and receive byte commands to configure the device. The TMP422 includes series resistance cancellation, programmable non-ideality factor, wide remote temperature measurement range (up to 150°C), and diode fault detection. The TMP422 is available in a SOT23-8 package. 1 2 3 4 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DLP is a registered trademark of Texas Instruments. SMBus is a trademark of Intel Corporation. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Table 1. ORDERING INFORMATION (1) (1) (2) PRODUCT ORDERABLE PART NUMBER PACKAGE-LEAD PACKAGE DESIGNATOR (2) PACKAGE MARKING VID NUMBER TMP422 TMP422AMDCNTEP SOT23-8 DCN TMP4 V62/11618-01XE For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. Power Supply, VS Input Voltage Pins 1, 2, 3, and 4 only Pins 6 and 7 only TMP422 UNIT +7 V –0.5 to VS + 0.5 V –0.5 to 7 V Input Current 10 mA Power dissipation, PD 230 mW –65 to +150 °C Storage Temperature Range +150 °C Human Body Model (HBM) 3000 V Charged Device Model (CDM) 1000 V Machine Model (MM) 200 V Junction Temperature (TJ max) ESD Rating (1) 2 Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS At TA = –55°C to +125°C and VS = 2.7V to 5.5V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNIT TEMPERATURE ERROR Local Temperature Sensor Remote Temperature Sensor (1) TELOCAL TEREMOTE vs Supply (Local/Remote) TA = –55°C to +125°C ±1.25 ±2.5 °C TA = +15°C to +85°C, TD = –55°C to +125°C, VS = 3.3V 0.25 ±1 °C TA = –55°C to +125°C, TD = –55°C to +125°C, VS = 3.3V ±1 ±3 °C TA = –55°C to +125°C, TD = –55°C to +125°C ±3 ±5 °C VS = 2.7V to 5.5V ±0.2 ±0.72 °C/V 115 130 ms TEMPERATURE MEASUREMENT Conversion Time (per channel) 100 Resolution Local Temperature Sensor (programmable) 12 Bits Remote Temperature Sensor 12 Bits Remote Sensor Source Currents 120 μA Medium High 60 μA Medium Low 12 μA Low 6 μA High Series Resistance 3kΩ Max η Remote Transistor Ideality Factor Optimized Ideality Factor 1.008 SMBus INTERFACE Logic Input High Voltage (SCL, SDA) VIH Logic Input Low Voltage (SCL, SDA) VIL 2.1 Hysteresis 500 SMBus Output Low Sink Current SDA Output Low Voltage V 0.8 6 VOL IOUT = 6mA 0 ≤ VIN ≤ 6V Logic Input Current mA 0.15 –1 SMBus Input Capacitance (SCL, SDA) 0.4 V +1 μA 3.4 MHz 35 ms 1 μs 3 SMBus Clock Frequency SMBus Timeout 25 V mV 30 SCL Falling Edge to SDA Valid Time pF DIGITAL INPUTS Input Capacitance 3 pF Input Logic Levels Input High Voltage VIH 0.7(V+) (V+)+0.5 Input Low Voltage VIL –0.5 0.3(V+) V Leakage Input Current IIN 1 μA 0V ≤ VIN ≤ VS V POWER SUPPLY Specified Voltage Range VS Quiescent Current IQ Undervoltage Lockout Power-On Reset Threshold 5.5 V 0.0625 Conversions per Second 2.7 32 38 μA Eight Conversions per Second 400 525 μA Serial Bus Inactive, Shutdown Mode 3 10 μA Serial Bus Active, fS = 400kHz, Shutdown Mode 90 Serial Bus Active, fS = 3.4MHz, Shutdown Mode 350 UVLO 2.3 POR μA μA 2.4 2.6 V 1.6 2.3 V +125 °C TEMPERATURE RANGE –55 Specified Range Thermal Resistance, junction-to-ambient SOT23 θJA 164 °C/W Thermal Resistance, junction-to-case SOT23 θJC 108 °C/W (1) Tested with less than 5Ω effective series resistance and 100pF differential input capacitance. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 3 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com PIN CONFIGURATION DCN PACKAGE SOT23-8 (TOP VIEW) DX1 1 DX2 2 8 V+ 7 SCL TMP422 DX3 3 6 SDA DX4 4 5 GND PIN ASSIGNMENTS TMP422 4 NO. NAME 1 DX1 DESCRIPTION Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 2 DX2 Channel 1 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 3 DX3 Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 4 DX4 Channel 2 remote temperature sensor connection pin. Also sets the TMP422 address; see Table 10. 5 GND Ground 6 SDA Serial data line for SMBus, open-drain; requires pull-up resistor to V+. 7 SCL Serial clock line for SMBus, open-drain; requires pull-up resistor to V+. 8 V+ Positive supply voltage (2.7V to 5.5V) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C and VS = +5.0V, unless otherwise noted. REMOTE TEMPERATURE ERROR vs TEMPERATURE 3 V+ = 3.3V TREMOTE = +25°C 2 30 Typical Units Shown h = 1.008 1 0 -1 -2 2 1 0 -1 -2 -3 -3 -50 0 -25 25 50 75 100 125 -50 -25 0 25 50 75 100 Ambient Temperature, TA (°C) Ambient Temperature, TA (°C) Figure 1. Figure 2. REMOTE TEMPERATURE ERROR vs LEAKAGE RESISTANCE REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE (Diode-Connected Transistor, 2N3906 PNP) 125 2.0 Remote Temperature Error (°C) 60 Remote Temperature Error (°C) 50 Units Shown V+ = 3.3V Local Temperature Error (°C) Remote Temperature Error (°C) 3 LOCAL TEMPERATURE ERROR vs TEMPERATURE 40 20 R - GND 0 R - V+ -20 -40 1.5 V+ = 2.7V 1.0 0.5 0 V+ = 5.5V -0.5 -1.0 -1.5 -2.0 -60 0 5 10 15 20 25 30 0 Leakage Resistance (MW ) 500 1000 1500 2000 2500 3000 3500 RS ( W ) Figure 3. Figure 4. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 5 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C and VS = +5.0V, unless otherwise noted. REMOTE TEMPERATURE ERROR vs SERIES RESISTANCE (GND Collector-Connected Transistor, 2N3906 PNP) REMOTE TEMPERATURE ERROR vs DIFFERENTIAL CAPACITANCE 3 1.5 Remote Temperature Error (°C) Remote Temperature Error (°C) 2.0 V+ = 2.7V 1.0 0.5 V+ = 5.5V 0 -0.5 -1.0 -1.5 -2.0 2 1 0 -1 -2 -3 0 500 1000 1500 2000 2500 3000 0 3500 0.5 1.0 TEMPERATURE ERROR vs POWER-SUPPLY NOISE FREQUENCY QUIESCENT CURRENT vs CONVERSION RATE 15 10 3.0 500 Local 100mVPP Noise Remote 100mVPP Noise Local 250mVPP Noise Remote 250mVPP Noise 450 400 350 5 IQ (mA) Temperature Error (°C) 2.5 Figure 6. 20 0 -5 300 200 150 -15 100 -20 50 5 10 15 V+ = 5.5V 250 -10 -25 0 0.0625 Frequency (MHz) V+ = 2.7V 0.125 0.25 0.5 1 2 4 8 Conversion Rate (conversions/sec) Figure 7. 6 2.0 Figure 5. 25 0 1.5 Capacitance (nF) RS (W) Figure 8. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C and VS = +5.0V, unless otherwise noted. SHUTDOWN QUIESCENT CURRENT vs SCL CLOCK FREQUENCY SHUTDOWN QUIESCENT CURRENT vs SUPPLY VOLTAGE 500 8 450 7 400 6 5 300 250 IQ (mA) IQ (mA) 350 V+ = 5.5V 200 4 3 150 2 100 1 50 V+ = 3.3V 0 0 1k 10k 100k 1M 10M 2.5 SCL CLock Frequency (Hz) 3.0 3.5 4.0 4.5 5.0 5.5 V+ (V) Figure 9. Figure 10. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 7 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com APPLICATION INFORMATION The TMP422 (three-channel) is a digital temperature sensor that combines a local die temperature measurement channel and two remote junction temperature measurement channels in a single SOT23-8 package. This device is two-wire- and SMBus interface-compatible and are specified over a temperature range of –55°C to +125°C. The TMP422 contains multiple registers for holding configuration information and temperature measurement results. The TMP422 requires transistors connected between DX1 and DX2 and between DX3 and DX4. Unused channels on the TMP422 must be connected to GND. The TMP422 SCL and SDA interface pins each require pull-up resistors as part of the communication bus. A 0.1μF power-supply bypass capacitor is recommended for local bypassing. Figure 11 illustrates a typical application for the TMP422. +5V Transistor-connected configuration(1): 0.1mF Series Resistance RS(2) DXP1 RS(2) 8 1 CDIFF(3) 2 V+ DX1(4) DX2(4) DXN1 RS(2) DXP2 RS(2) 3 CDIFF(3) DXN2 4 SCL SDA 10kW (typ) 10kW (typ) 7 6 SMBus Controller TMP422 DX3 (4) DX4(4) GND 5 Diode-connected configuration(1): RS(2) RS(2) CDIFF(3) (1) Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance cancellation. (2) RS (optional) should be < 1.5kΩ in most applications. Selection of RS depends on application; see the Filtering section. (3) CDIFF (optional) should be < 1000pF in most applications. Selection of CDIFF depends on application; see the Filtering section and Figure 6, Remote Temperature Error vs Differential Capacitance. (4) TMP422 SMBus slave address is 1001 100 when connected as shown. Figure 11. TMP422 Basic Connections 8 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com SERIES RESISTANCE CANCELLATION Series resistance in an application circuit that typically results from printed circuit board (PCB) trace resistance and remote line length is automatically cancelled by the TMP422, preventing what would otherwise result in a temperature offset. A total of up to 3kΩ of series line resistance is cancelled by the TMP422, eliminating the need for additional characterization and temperature offset correction. See the two Remote Temperature Error vs Series Resistance typical characteristic curves (Figure 4 and Figure 5) for details on the effects of series resistance and power-supply voltage on sensed remote temperature error. DIFFERENTIAL INPUT CAPACITANCE The TMP422 tolerates differential input capacitance of up to 1000pF with minimal change in temperature error. The effect of capacitance on sensed remote temperature error is illustrated in Figure 6, Remote Temperature Error vs Differential Capacitance. TEMPERATURE MEASUREMENT DATA Temperature measurement data may be taken over an operating range of –40°C to +127°C for both local and remote locations. However, measurements from –55°C to +150°C can be made both locally and remotely by reconfiguring the TMP422 for the extended temperature range, as described below. Temperature data that result from conversions within the default measurement range are represented in binary form, as shown in Table 2, Standard Binary column. Note that although the device is rated to only measure temperatures down to –55°C, it may read temperatures below this level. However, any temperature below –64°C results in a data value of –64 (C0h). Likewise, temperatures above +127°C result in a value of 127 (7Fh). The device can be set to measure over an extended temperature range by changing bit 2 (RANGE) of Configuration Register 1 from low to high. The change in measurement range and data format from standard binary to extended binary occurs at the next temperature conversion. For data captured in the extended temperature range configuration, an offset of 64 (40h) is added to the standard binary value, as shown in the Extended Binary column of Table 2. This configuration allows measurement of temperatures as low as –64°C, and as high as +191°C; however, most temperature-sensing diodes only measure with the range of –55°C to +150°C. Additionally, the TMP422 is rated only for ambient temperatures ranging from –55°C to +125°C. Parameters in the Absolute Maximum Ratings table must be observed. Table 2. Temperature Data Format (Local and Remote Temperature High Bytes) LOCAL/REMOTE TEMPERATURE REGISTER HIGH BYTE VALUE (1°C RESOLUTION) (1) (2) STANDARD BINARY (1) EXTENDED BINARY (2) TEMP (°C) BINARY HEX BINARY –64 1100 0000 C0 0000 0000 00 –50 1100 1110 CE 0000 1110 0E –25 1110 0111 E7 0010 0111 27 0 0000 0000 00 0100 0000 40 1 0000 0001 01 0100 0001 41 5 0000 0101 05 0100 0101 45 10 0000 1010 0A 0100 1010 4A 25 0001 1001 19 0101 1001 59 50 0011 0010 32 0111 0010 72 75 0100 1011 4B 1000 1011 8B 100 0110 0100 64 1010 0100 A4 125 0111 1101 7D 1011 1101 BD 127 0111 1111 7F 1011 1111 BF 150 0111 1111 7F 1101 0110 D6 175 0111 1111 7F 1110 1111 EF 191 0111 1111 7F 1111 1111 FF HEX Resolution is 1°C/count. Negative numbers are represented in two's complement format. Resolution is 1°C/count. All values are unsigned with a –64°C offset. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 9 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com Both local and remote temperature data use two bytes for data storage. The high byte stores the temperature with 1°C resolution. The second or low byte stores the decimal fraction value of the temperature and allows a higher measurement resolution, as shown in Table 3. The measurement resolution for the both the local and remote channels is 0.0625°C, and is not adjustable. Table 3. Decimal Fraction Temperature Data Format (Local and Remote Temperature Low Bytes) TEMPERATURE REGISTER LOW BYTE VALUE (0.0625°C RESOLUTION)(1) TEMP (°C) STANDARD AND EXTENDED BINARY HEX 0 0000 0000 00 0.0625 0001 0000 10 0.1250 0010 0000 20 0.1875 0011 0000 30 0.2500 0100 0000 40 0.3125 0101 0000 50 0.3750 0110 0000 60 0.4375 0111 0000 70 0.5000 1000 0000 80 0.5625 1001 0000 90 0.6250 1010 0000 A0 0.6875 1011 0000 B0 0.7500 1100 0000 C0 0.8125 1101 0000 D0 0.8750 1110 0000 E0 0.9385 1111 0000 F0 (1) Resolution is 0.0625°C/count. All possible values are shown. Standard Binary to Decimal Temperature Data Calculation Example High byte conversion (for example, 0111 0011): Convert the right-justified binary high byte to hexadecimal. From hexadecimal, multiply the first number by 160 = 1 and the second number by 161 = 16. The sum equals the decimal equivalent. 0111 0011b → 73h → (3 × 160) + (7 × 161) = 115 Low byte conversion (for example, 0111 0000): To convert the left-justified binary low-byte to decimal, use bits 7 through 4 and ignore bits 3 through 0 because they do not affect the value of the number. 0111b → (0 × 1/2)1 + (1 × 1/2)2 + (1 × 1/2)3 + (1 × 1/2)4 = 0.4375 Note that the final numerical result is the sum of the high byte and low byte. In negative temperatures, the unsigned low byte adds to the negative high byte to result in a value less than the high byte (for instance, –15 + 0.75 = –14.25, not –15.75). Standard Decimal to Binary Temperature Data Calculation Example For positive temperatures (for example, +20°C): (+20°C)/(+1°C/count) = 20 → 14h → 0001 0100 Convert the number to binary code with 8-bit, right-justified format, and MSB = '0' to denote a positive sign. +20°C is stored as 0001 0100 → 14h. For negative temperatures (for example, –20°C): (|–20|)/(+1°C/count) = 20 → 14h → 0001 0100 Generate the two's complement of a negative number by complementing the absolute value binary number and adding 1. –20°C is stored as 1110 1100 → ECh. 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com REGISTER INFORMATION The TMP422 contains multiple registers for holding configuration information, temperature measurement results, and status information. These registers are described in Figure 12 and Table 4. POINTER REGISTER Figure 12 shows the internal register structure of the TMP422. The 8-bit Pointer Register is used to address a given data register. The Pointer Register identifies which of the data registers should respond to a read or write command on the two-wire bus. This register is set with every write command. A write command must be issued to set the proper value in the Pointer Register before executing a read command. Table 4 describes the pointer address of the TMP422 registers. The power-on reset (POR) value of the Pointer Register is 00h (0000 0000b). Pointer Register Local and Remote Temperature Registers Status Register SDA Configuration Registers One-Shot Start Register Conversion Rate Register I/O Control Interface N-Factor Correction Registers SCL Identification Registers Software Reset Figure 12. Internal Register Structure Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 11 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com Table 4. Register Map BIT DESCRIPTION POINTER (HEX) POR (HEX) 7 6 5 4 3 2 1 0 00 00 LT11 LT10 LT9 LT8 LT7 LT6 LT5 LT4 Local Temperature (High Byte) 01 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote Temperature 1 (High Byte) (1) 02 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote Temperature 2 (High Byte) (1) 03 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote Temperature 3 (High Byte) (1) 08 BUSY 0 0 0 0 0 0 0 Status Register 09 00 0 SD 0 0 0 RANGE 0 0 Configuration Register 1 0A 1C/3C 0 REN3 REN2 REN LEN RC 0 0 Configuration Register 2 0B 07 0 0 0 0 0 R2 R1 R0 X X X X X X X X One-Shot Start (2) Local Temperature (Low Byte) 0F (1) Conversion Rate Register 10 00 LT3 LT2 LT1 LT0 0 0 PVLD 0 11 00 RT3 RT2 RT1 RT0 0 0 PVLD OPEN Remote Temperature 1 (Low Byte) 12 00 RT3 RT2 RT1 RT0 0 0 PVLD OPEN Remote Temperature 2 (Low Byte) 13 00 RT3 RT2 RT1 RT0 0 0 PLVD OPEN Remote Temperature 3 (Low Byte 21 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 1 22 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 2 23 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N Correction 3 X X X X X X X X Software Reset (3) FC (1) (2) (3) REGISTER DESCRIPTION FE 55 0 1 0 1 0 1 0 1 Manufacturer ID FF 21 0 0 1 0 0 0 1 0 TMP422 Device ID Compatible with Two-Byte Read; see Figure 17. X = undefined. Writing any value to this register initiates a one-shot start; see the One-Shot Conversion section. X = undefined. Writing any value to this register initiates a software reset; see the Software Reset section. TEMPERATURE REGISTERS The TMP422 has multiple 8-bit registers that hold temperature measurement results. The local channel and each of the remote channels have a high byte register that contains the most significant bits (MSBs) of the temperature analog-to-digital converter (ADC) result and a low byte register that contains the least significant bits (LSBs) of the temperature ADC result. The local channel high byte address is 00h; the local channel low byte address is 10h. The remote channel high byte is at address 01h; the remote channel low byte address is 11h. For the TMP422, the second remote channel high byte address is 02h; the second remote channel low byte is 12h. These registers are read-only and are updated by the ADC each time a temperature measurement is completed. The TMP422 contains circuitry to assure that a low byte register read command returns data from the same ADC conversion as the immediately preceding high byte read command. This assurance remains valid only until another register is read. For proper operation, the high byte of a temperature register should be read first. The low byte register should be read in the next read command. The low byte register may be left unread if the LSBs are not needed. Alternatively, the temperature registers may be read as a 16-bit register by using a single two-byte read command from address 00h for the local channel result, or from address 01h for the remote channel result (02h for the second remote channel result, and 03h for the third remote channel). The high byte is output first, followed by the low byte. Both bytes of this read operation are from the same ADC conversion. The power-on reset value of all temperature registers is 00h. 12 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com STATUS REGISTER The Status Register reports the state of the temperature ADCs. Table 5 summarizes the Status Register bits. The Status Register is read-only, and is read by accessing pointer address 08h. The BUSY bit = '1' if the ADC is making a conversion; it is set to '0' if the ADC is not converting. CONFIGURATION REGISTER 1 Configuration Register 1 (pointer address 09h) sets the temperature range and controls the shutdown mode. The Configuration Register is set by writing to pointer address 09h and read by reading from pointer address 09h. Table 6 summarizes the bits of Configuration Register 1. The shutdown (SD) bit (bit 6) enables or disables the temperature measurement circuitry. If SD = '0', the TMP422 convert continuously at the rate set in the conversion rate register. When SD is set to '1', the TMP422 stops converting when the current conversion sequence is complete and enter a shutdown mode. When SD is set to '0' again, the TMP422 resumes continuous conversions. When SD = '1', a single conversion can be started by writing to the One-Shot Register. See the One-Shot Conversion section for more information. The temperature range is set by configuring the RANGE bit (bit 2) of the Configuration Register. Setting this bit low configures the TMP422 for the standard measurement range (–40°C to +127°C); temperature conversions will be stored in the standard binary format. Setting bit 2 high configures the TMP422 for the extended measurement range (–55°C to +150°C); temperature conversions will be stored in the extended binary format (see Table 2). The remaining bits of the Configuration Register are reserved and must always be set to '0'. The power-on reset value for this register is 00h. CONFIGURATION REGISTER 2 Configuration Register 2 (pointer address 0Ah) controls which temperature measurement channels are enabled and whether the external channels have the resistance correction feature enabled or not. Table 7 summarizes the bits of Configuration Register 2. Table 5. Status Register Format STATUS REGISTER (Read = 08h, Write = NA) BIT # BIT NAME POR VALUE (1) D7 D6 D5 D4 D3 D2 D1 D0 BUSY 0 0 0 0 0 0 0 0 (1) 0 0 0 0 0 0 0 The BUSY bit changes to '1' approximately 1ms following power-up. It is high whenever the TMP422 converts a temperature reading. Table 6. Configuration Register 1 Bit Descriptions CONFIGURATION REGISTER 1 (Read/Write = 09h, POR = 00h) FUNCTION POWER-ON RESET VALUE Reserved — 0 6 SD 0 = Run 1 = Shut Down 0 5, 4, 3 Reserved — 0 2 Temperature Range 0 = –55°C to +127°C 1 = –55°C to +150°C 0 1, 0 Reserved — 0 BIT NAME 7 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 13 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com The RC bit (bit 2) enables the resistance correction feature for the external temperature channels. If RC = '1', series resistance correction is enabled; if RC = '0', resistance correction is disabled. Resistance correction should be enabled for most applications. However, disabling the resistance correction may yield slightly improved temperature measurement noise performance, and reduce conversion time by about 50%, which could lower power consumption when conversion rates of two per second or less are selected. The LEN bit (bit 3) enables the local temperature measurement channel. If LEN = '1', the local channel is enabled; if LEN = '0', the local channel is disabled. The REN bit (bit 4) enables external temperature measurement for channel 1. If REN = '1', the first external channel is enabled; if REN = '0', the external channel is disabled. The REN2 bit (bit 5) enables the second external measurement channel. If REN2 = '1', the second external channel is enabled; if REN2 = '0', the second external channel is disabled. The temperature measurement sequence is: local channel, external channel 1, external channel 2, external channel 3, shutdown, and delay (to set conversion rate, if necessary). The sequence starts over with the local channel. If any of the channels are disabled, they are bypassed in the sequence. CONVERSION RATE REGISTER The Conversion Rate Register (pointer address 0Bh) controls the rate at which temperature conversions are performed. This register adjusts the idle time between conversions but not the conversion timing itself, thereby allowing the TMP422 power dissipation to be balanced with the temperature register update rate. Table 8 describes the conversion rate options and corresponding current consumption. A one-shot command can be used during the idle time between conversions to immediately start temperature conversions on all enabled channels. Table 7. Configuration Register 2 Bit Descriptions CONFIGURATION REGISTER 2 (Read/Write = 0Ah, POR = 3Ch) 14 FUNCTION POWER-ON RESET VALUE Reserved — 0 6 REN3 0 = External Channel 3 Disabled 1 = External Channel 3 Enabled 0 5 REN2 0 = External Channel 2 Disabled 1 = External Channel 2 Enabled 1 4 REN 0 = External Channel 1 Disabled 1 = External Channel 1 Enabled 1 3 LEN 0 = Local Channel Disabled 1 = Local Channel Enabled 1 2 RC 0 = Resistance Correction Disabled 1 = Resistance Correction Enabled 1 1, 0 Reserved — 0 BIT NAME 7 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com Table 8. Conversion Rate Register CONVERSION RATE REGISTER (Read/Write = 0Bh, POR = 07h) AVERAGE IQ (TYP) (μA) (1) (2) R7 R6 R5 R4 R3 R2 R1 R0 CONVERSIONS/SEC VS = 2.7V VS = 5.5V 0 0 0 0 0 0 0 0 0.0625 11 32 0 0 0 0 0 0 0 1 0.125 17 38 0 0 0 0 0 0 1 0 0.25 28 49 0 0 0 0 0 0 1 1 0.5 47 69 0 0 0 0 0 1 0 0 1 80 103 0 0 0 0 0 1 0 1 2 128 155 0 0 0 0 0 1 1 0 4 (1) 190 220 0 0 0 0 0 1 1 1 8 (2) 373 413 Conversion rate shown is for only one or two enabled measurement channels. When three channels are enabled, the conversion rate is 2 and 2/3 conversions-per-second. When four channels are enabled, the conversion rate is 2 per second. Conversion rate shown is for only one enabled measurement channel. When two channels are enabled, the conversion rate is 4 conversions-per-second. When three channels are enabled, the conversion rate is 2 and 2/3 conversions-per-second. When four channels are enabled, the conversion rate is 2 conversions-per-second. ONE-SHOT CONVERSION When the TMP422 is in shutdown mode (SD = 1 in the Configuration Register 1), a single conversion is started on all enabled channels by writing any value to the One-Shot Start Register, pointer address 0Fh. This write operation starts one conversion; the TMP422 returns to shutdown mode when that conversion completes. The value of the data sent in the write command is irrelevant and is not stored by the TMP422. When the TMP422 are in shutdown mode, the conversion sequence currently in process must be completed before a one-shot command can be issued. One-shot commands issued during a conversion are ignored. n-FACTOR CORRECTION REGISTER The TMP422 allows for a different n-factor value to be used for converting remote channel measurements to temperature. The remote channel uses sequential current excitation to extract a differential VBE voltage measurement to determine the temperature of the remote transistor. Equation 1 describes this voltage and temperature. VBE2 - VBE1 = hkT I ln 2 q I1 (1) The value n in Equation 1 is a characteristic of the particular transistor used for the remote channel. The power-on reset value for the TMP422 is n = 1.008. The value in the n-Factor Correction Register may be used to adjust the effective n-factor according to Equation 2 and Equation 3. heff = 1.008 ´ 300 300 - NADJUST NADJUST = 300 - (2) 300 ´ 1.008 heff (3) The n-correction value must be stored in two's-complement format, yielding an effective data range from –128 to +127. The n-correction value may be written to and read from pointer address 21h. The n-correction value for the second remote channel may be written and read from pointer address 22h. The register power-on reset value is 00h, thus having no effect unless the register is written to. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 15 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com SOFTWARE RESET The TMP422 may be reset by writing any value to the Software Reset Register (pointer address FCh). This action restores the power-on reset state to all of the TMP422 registers as well as aborts any conversion in process. The TMP422 also supports reset via the two-wire general call address (0000 0000). The General Call Reset section contains more information. Table 9. n-Factor Range NADJUST BINARY HEX DECIMAL n 0111 1111 7F 127 1.747977 0000 1010 0A 10 1.042759 0000 1000 08 8 1.035616 0000 0110 06 6 1.028571 0000 0100 04 4 1.021622 0000 0010 02 2 1.014765 0000 0001 01 1 1.011371 0000 0000 00 0 1.008 1111 1111 FF –1 1.004651 1111 1110 FE –2 1.001325 1111 1100 FC –4 0.994737 1111 1010 FA –6 0.988235 1111 1000 F8 –8 0.981818 1111 0110 F6 –10 0.975484 1000 0000 80 –128 0.706542 GENERAL CALL RESET The TMP422 supports reset via the two-wire General Call address 00h (0000 0000b). The TMP422 acknowledges the General Call address and respond to the second byte. If the second byte is 06h (0000 0110b), the TMP422 executes a software reset. This software reset restores the power-on reset state to all TMP422 registers, and aborts any conversion in progress. The TMP422 takes no action in response to other values in the second byte. IDENTIFICATION REGISTERS The TMP422 allows for the two-wire bus controller to query the device for manufacturer and device IDs to enable software identification of the device at the particular two-wire bus address. The manufacturer ID is obtained by reading from pointer address FEh. The device ID is obtained by reading from pointer address FFh. The TMP422 returns 55h for the manufacturer code. The TMP422 returns 22h for the device ID. These registers are read-only. BUS OVERVIEW The TMP422 is SMBus interface-compatible. In SMBus protocol, the device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. To address a specific device, a START condition is initiated. START is indicated by pulling the data line (SDA) from a high-to-low logic level while SCL is high. All slaves on the bus shift in the slave address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being addressed responds to the master by generating an Acknowledge and pulling SDA low. Data transfer is then initiated and sent over eight clock pulses followed by an Acknowledge bit. During data transfer SDA must remain stable while SCL is high, because any change in SDA while SCL is high is interpreted as a control signal. Once all data have been transferred, the master generates a STOP condition. STOP is indicated by pulling SDA from low to high, while SCL is high. 16 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com SERIAL INTERFACE The TMP422 operates only as a slave device on either the two-wire bus or the SMBus. Connections to either bus are made via the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP422 supports the transmission protocol for fast (1kHz to 400kHz) and high-speed (1kHz to 3.4MHz) modes. All data bytes are transmitted MSB first. SERIAL BUS ADDRESS To communicate with the TMP422, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation. Two-Wire Interface Slave Device Addresses The TMP422 supports four slave device addresses. The slave device address is set by the connections between the external transistors and the TMP422 according to Figure 13 and Table 10. If one of the channels is unused, the respective DXP connection should be connected to GND, and the DXN connection should be left unconnected. The polarity of the transistor for external channel 2 (pins 3 and 4) sets the least significant bit of the slave address. The polarity of the transistor for external channel 1 (pins 1 and 2) sets the next least significant bit of the slave address. Table 10. Slave Address Options TWO-WIRE SLAVE ADDRESS DX1 DX2 DX3 DX4 1001 100 DXP1 DXN1 DXP2 DXN2 1001 101 DXP1 DXN1 DXN2 DXP2 1001 110 DXN1 DXP1 DXP2 DXN2 1001 111 DXN1 DXP1 DXN2 DXP2 SCL SDA V+ Q0 Q1 DX1 V+ DX2 SCL Q2 DX1 V+ DX2 SCL Q4 DX1 V+ DX2 SCL Q6 DX1 V+ DX2 SCL DX3 SDA DX3 SDA DX3 SDA DX3 SDA DX4 GND DX4 GND DX4 GND DX4 GND Q3 Address = 1001100 Address = 1001101 Q5 Q7 Address = 1001110 Address = 1001111 Figure 13. TMP422 Connections for Device Address Setup The TMP422 checks the polarity of the external transistor at power-on, or after software reset, by forcing current to pin 1 while connecting pin 2 to approximately 0.6V. If the voltage on pin 1 does not pull up to near the V+ of the TMP422, pin 1 functions as DXP for channel 1, and the second LSB of the slave address is '0'. If the voltage on pin 1 does pull up to near V+, the TMP422 forces current to pin 2 while connecting pin 1 to 0.6V. If the voltage on pin 2 does not pull up to near V+, the TMP422 uses pin 2 for DXP of channel 1, and sets the second LSB of the slave address to '1'. If both pins are shorted to GND or if both pins are open, the TMP422 uses pin 1 as DXP and sets the address bit to '0'. This process is then repeated for channel 2 (pins 3 and 4). If the TMP422 is to be used with transistors that are located on another IC (such as a CPU, DSP, or graphics processor), it is recommended to use pin 1 or pin 3 as DXP to ensure correct address detection. If the other IC has a lower supply voltage or is not powered when the TMP422 tries to detect the slave address, a protection diode may turn on during the detection process and the TMP422 may incorrectly choose the DXP pin and corresponding slave address. Using pin 1 and/or pin 3 for transistors that are on other ICs ensures correct operation independent of supply sequencing or levels. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 17 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com READ/WRITE OPERATIONS Accessing a particular register on the TMP422 is accomplished by writing the appropriate value to the Pointer Register. The value for the Pointer Register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP422 requires a value for the Pointer Register (see Figure 15). When reading from the TMP422, the last value stored in the Pointer Register by a write operation is used to determine which register is read by a read operation. To change which register is read for a read operation, a new value must be written to the Pointer Register. This transaction is accomplished by issuing a slave address byte with the R/W bit low, followed by the Pointer Register byte; no additional data are required. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. See Figure 17 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the Pointer Register bytes, because the TMP422 retain the Pointer Register value until it is changed by the next write operation. Note that register bytes are sent MSB first, followed by the LSB. Read operations should be terminated by issuing a Not-Acknowledge command at the end of the last byte to be read. For a single-byte operation, the master should leave the SDA line high during the Acknowledge time of the first byte that is read from the slave. For a two-byte read operation, the master must pull SDA low during the Acknowledge time of the first byte read, and should leave SDA high during the Acknowledge time of the second byte read from the slave. TIMING DIAGRAMS The TMP422 is two-wire and SMBus-compatible. Figure 14 to Figure 17 describe the timing for various operations on the TMP422. Parameters for Figure 14 are defined in Table 11. Bus definitions are: Bus Idle: Both SDA and SCL lines remain high. Start Data Transfer: A change in the state of the SDA line, from high to low, while the SCL line is high, defines a START condition. Each data transfer initiates with a START condition. Denoted as S in Figure 14. Stop Data Transfer: A change in the state of the SDA line from low to high while the SCL line is high defines a STOP condition. Each data transfer terminates with a repeated START or STOP condition. Denoted as P in Figure 14. Data Transfer: The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the master device. The receiver acknowledges data transfer. Acknowledge: Each receiving device, when addressed, is obliged to generate an Acknowledge bit. A device that acknowledges must pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the Acknowledge clock pulse. Setup and hold times must be taken into account. On a master receive, data transfer termination can be signaled by the master generating a Not-Acknowledge on the last byte that has been transmitted by the slave. t(LOW) tF tR t(HDSTA) SCL t(HDSTA) t(HIGH) t(HDDAT) t(SUSTO) t(SUSTA) t(SUDAT) SDA t(BUF) P S S P Figure 14. Two-Wire Timing Diagram 18 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com Table 11. Timing Characteristics for Figure 14 FAST MODE PARAMETER HIGH-SPEED MODE MIN MAX MIN MAX UNIT 0.4 0.001 3.4 MHz SCL Operating Frequency f(SCL) 0.001 Bus Free Time Between STOP and START Condition t(BUF) 600 160 ns t(HDSTA) 100 100 ns Repeated START Condition Setup Time t(SUSTA) 100 100 ns STOP Condition Setup Time t(SUSTO) 100 100 ns Data Hold Time t(HDDAT) 0 (1) 0 (2) ns Data Setup Time t(SUDAT) 100 10 ns SCL Clock LOW Period t(LOW) 1300 160 ns SCL Clock HIGH Period t(HIGH) 600 60 ns Hold time after repeated START condition. After this period, the first clock is generated. Clock/Data Fall Time tF 300 160 Clock/Data Rise Time tR 300 160 tR 1000 for SCL ≤ 100kHz (1) (2) ns ns For cases with fall time of SCL less than 20ns and/or the rise or fall time of SDA less than 20ns, the hold time should be greater than 20ns. For cases with a fall time of SCL less than 10ns and/or the rise or fall time of SDA less than 10ns, the hold time should be greater than 10ns. 1 9 9 1 ¼ SCL SDA 1 0 0 1 1 0 0(1) R/W Start By Master P7 P6 P5 P4 P3 P2 P1 P0 ACK By TMP422 ¼ ACK By TMP422 Frame 2 Pointer Register Byte Frame 1 Two-Wire Slave Address Byte 9 1 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 D1 D0 ACK By TMP422 Stop By Master Frame 3 Data Byte 1 (1) Slave address 1001100 shown. Figure 15. Two-Wire Timing Diagram for Write Word Format Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 19 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com 1 9 1 9 SCL SDA 1 0 0 1 1 0 0(1) P7 R/W Start By Master P6 P5 P4 P3 P2 P1 ¼ P0 ACK By TMP422 ACK By TMP422 Frame 1 Two-Wire Slave Address Byte 1 ¼ Frame 2 Pointer Register Byte 9 1 9 ¼ SCL (Continued) SDA (Continued) 1 0 0 1 1 0 0(1) R/W Start By Master D7 D6 D5 ACK By TMP422 Frame 3 Two-Wire Slave Address Byte D4 D3 D2 D1 D0 From TMP422 ¼ NACK By Master(2) Frame 4 Data Byte 1 Read Register (1) Slave address 1001100 shown. (2) Master should leave SDA high to terminate a single-byte read operation. Figure 16. Two-Wire Timing Diagram for Single-Byte Read Format 20 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com 1 9 1 9 ¼ SCL SDA 1 0 0 1 1 0 0(1) P7 R/W Start By Master P6 P5 P4 P3 P2 P1 ¼ P0 ACK By TMP422 ACK By TMP422 Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte 1 9 1 9 ¼ SCL (Continued) SDA (Continued) 1 0 0 1 1 0 0(1) D7 R/W Start By Master D6 D5 ACK By TMP422 Frame 3 Two-Wire Slave Address Byte 1 D4 D3 D2 D1 D0 From TMP422 ¼ ACK By Master Frame 4 Data Byte 1 Read Register 9 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 From TMP422 D2 D1 D0 NACK By Master(2) Stop By Master Frame 5 Data Byte 2 Read Register (1) Slave address 1001100 shown. (2) Master should leave SDA high to terminate a two-byte read operation. Figure 17. Two-Wire Timing Diagram for Two-Byte Read Format HIGH-SPEED MODE In order for the two-wire bus to operate at frequencies above 400kHz, the master device must issue a High-Speed mode (Hs-mode) master code (0000 1xxx) as the first byte after a START condition to switch the bus to high-speed operation. The TMP422 does not acknowledge this byte, but switches the input filters on SDA and SCL and the output filter on SDA to operate in Hs-mode, allowing transfers at up to 3.4MHz. After the Hs-mode master code has been issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP422 switch the input and output filters back to fast mode operation. TIMEOUT FUNCTION The TMP422 reset the serial interface if either SCL or SDA are held low for 30ms (typical) between a START and STOP condition. If the TMP422 is holding the bus low, the device releases the bus and waits for a START condition. To avoid activating the timeout function, it is necessary to maintain a communication speed of at least 1kHz for the SCL operating frequency. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 21 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com SHUTDOWN MODE (SD) The TMP422 Shutdown Mode allows the user to save maximum power by shutting down all device circuitry other than the serial interface, reducing current consumption to typically less than 3μA; see Figure 10, Shutdown Quiescent Current vs Supply Voltage. Shutdown Mode is enabled when the SD bit (bit 6) of Configuration Register 1 is high; the device shuts down once the current conversion is completed. When SD is low, the device maintains a continuous conversion state. SENSOR FAULT The TMP422 can sense an open circuit. Short-circuit conditions return a value of –64°C. The detection circuitry consists of a voltage comparator that trips when the voltage at DXP exceeds (V+) – 0.6V (typical). The comparator output is continuously checked during a conversion. If a fault is detected, the OPEN bit (bit 0) in the temperature result register is set to '1' and the rest of the register bits should be ignored. When not using a remote sensor with the TMP422, the DX pins should be connected (refer to Table 10) such that DXP connections are grounded and DXN connections are left open (unconnected). UNDERVOLTAGE LOCKOUT The TMP422 senses when the power-supply voltage has reached a minimum voltage level for the ADC to function. The detection circuitry consists of a voltage comparator that enables the ADC after the power supply (V+) exceeds 2.45V (typical). The comparator output is continuously checked during a conversion. The TMP422 does not perform a temperature conversion if the power supply is not valid. The PVLD bit (bit 1, see Table 4) of the individual Local/Remote Temperature Register is set to '1' and the temperature result may be incorrect. FILTERING Remote junction temperature sensors are usually implemented in a noisy environment. Noise is most often created by fast digital signals, and it can corrupt measurements. The TMP422 has a built-in 65kHz filter on the inputs of DX1 through DX4 to minimize the effects of noise. However, a bypass capacitor placed differentially across the inputs of the remote temperature sensor is recommended to make the application more robust against unwanted coupled signals. The value of this capacitor should be between 100pF and 1nF. Some applications attain better overall accuracy with additional series resistance; however, this increased accuracy is application-specific. When series resistance is added, the total value should not be greater than 3kΩ. If filtering is needed, suggested component values are 100pF and 50Ω on each input; exact values are application-specific. REMOTE SENSING The TMP422 is designed to be used with either discrete transistors or substrate transistors built into processor chips and ASICs. Either NPN or PNP transistors can be used, as long as the base-emitter junction is used as the remote temperature sense. NPN transistors must be diode-connected. PNP transistors can either be transistoror diode-connected (see Figure 11). Errors in remote temperature sensor readings are typically the consequence of the ideality factor and current excitation used by the TMP422 versus the manufacturer-specified operating current for a given transistor. Some manufacturers specify a high-level and low-level current for the temperature-sensing substrate transistors. The TMP422 uses 6μA for ILOW and 120μA for IHIGH. The ideality factor (n) is a measured characteristic of a remote temperature sensor diode as compared to an ideal diode. The TMP422 allow for different n-factor values; see the N-Factor Correction Register section. The ideality factor for the TMP422 is trimmed to be 1.008. For transistors that have an ideality factor that does not match the TMP422, Equation 4 can be used to calculate the temperature error. Note that for the equation to be used correctly, actual temperature (°C) must be converted to kelvins (K). 22 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com TERR = h - 1.008 ´ (273.15 + T(°C)) 1.008 (4) Where: n = ideality factor of remote temperature sensor T(°C) = actual temperature TERR = error in TMP422 because n ≠ 1.008 Degree delta is the same for °C and K For n = 1.004 and T(°C) = 100°C: ǒ Ǔ T ERR + 1.004 * 1.008 1.008 ǒ273.15 ) 100°CǓ T ERR + 1.48°C (5) If a discrete transistor is used as the remote temperature sensor with the TMP422, the best accuracy can be achieved by selecting the transistor according to the following criteria: 1. Base-emitter voltage > 0.25V at 6μA, at the highest sensed temperature. 2. Base-emitter voltage < 0.95V at 120μA, at the lowest sensed temperature. 3. Base resistance < 100Ω. 4. Tight control of VBE characteristics indicated by small variations in hFE (that is, 50 to 150). Based on these criteria, two recommended small-signal transistors are the 2N3904 (NPN) or 2N3906 (PNP). MEASUREMENT ACCURACY AND THERMAL CONSIDERATIONS The temperature measurement accuracy of the TMP422 depends on the remote and/or local temperature sensor being at the same temperature as the system point being monitored. Clearly, if the temperature sensor is not in good thermal contact with the part of the system being monitored, then there will be a delay in the response of the sensor to a temperature change in the system. For remote temperature-sensing applications using a substrate transistor (or a small, SOT23 transistor) placed close to the device being monitored, this delay is usually not a concern. The local temperature sensor inside the TMP422 monitors the ambient air around the device. The thermal time constant for the TMP422 is approximately two seconds. This constant implies that if the ambient air changes quickly by 100°C, it would take the TMP422 about 10 seconds (that is, five thermal time constants) to settle to within 1°C of the final value. In most applications, the TMP422 package is in electrical, and therefore thermal, contact with the printed circuit board (PCB), as well as subjected to forced airflow. The accuracy of the measured temperature directly depends on how accurately the PCB and forced airflow temperatures represent the temperature that the TMP422 is measuring. Additionally, the internal power dissipation of the TMP422 can cause the temperature to rise above the ambient or PCB temperature. The internal power dissipated as a result of exciting the remote temperature sensor is negligible because of the small currents used. For a 5.5V supply and maximum conversion rate of eight conversions per second, the TMP422 dissipate 2.3mW (PDIQ = 5.5V × 415μA). A θJA of 168°C/W causes the junction temperature to rise approximately +0.39°C above the ambient. LAYOUT CONSIDERATIONS Remote temperature sensing on the TMP422 measures very small voltages using very low currents; therefore, noise at the IC inputs must be minimized. Most applications using the TMP422 will have high digital content, with several clocks and logic level transitions creating a noisy environment. Layout should adhere to the following guidelines: 1. Place the TMP422 as close to the remote junction sensor as possible. 2. Route the DXP and DXN traces next to each other and shield them from adjacent signals through the use of ground guard traces; see Figure 18. If a multilayer PCB is used, bury these traces between ground or VDD planes to shield them from extrinsic noise sources. 5 mil (0.127mm) PCB traces are recommended. 3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are used, make the same number and approximate locations of copper-to-solder connections in both the DXP and DXN connections to cancel any thermocouple effects. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP 23 TMP422-EP SBOS577 – SEPTEMBER 2011 www.ti.com 4. Use a 0.1μF local bypass capacitor directly between the V+ and GND of the TMP422; see Figure 19. Minimize filter capacitance between DXP and DXN to 1000pF or less for optimum measurement performance. This capacitance includes any cable capacitance between the remote temperature sensor and the TMP422. 5. If the connection between the remote temperature sensor and the TMP422 is less than 8 in (20.32 cm) long, use a twisted-wire pair connection. Beyond 8 in, use a twisted, shielded pair with the shield grounded as close to the TMP422 as possible. Leave the remote sensor connection end of the shield wire open to avoid ground loops and 60Hz pickup. 6. Thoroughly clean and remove all flux residue in and around the pins of the TMP422 to avoid temperature offset readings as a result of leakage paths between DXP or DXN and GND, or between DXP or DXN and V+. V+ DXP Ground or V+ layer on bottom and/or top, if possible. DXN GND NOTE: Use minimum 5 mil (0.127mm) traces with 5 mil spacing. Figure 18. Suggested PCB Layer Cross-Section 0.1mF Capacitor GND PCB Via DX1 1 8 DX2 2 7 DX3 3 6 DX4 4 5 V+ TMP422 Figure 19. Suggested Bypass Capacitor Placement and Trace Shielding 24 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP422-EP PACKAGE OPTION ADDENDUM www.ti.com 6-Oct-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TMP422AMDCNTEP ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR V62/11618-01XE ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF TMP422-EP : • Catalog: TMP422 NOTE: Qualified Version Definitions: Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Oct-2011 • Catalog - TI's standard catalog product Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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