TS4851 MONO 1 W SPEAKER AND STEREO 160 mW HEADSET BTL DRIVERS WITH DIGITAL VOLUME CONTROL ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Operating from VCC = 3 V to 5.5 V Rail to rail input/output Speaker driver with 1 W output @ Vcc = 5 V, THD+N = 1%, F = 1 kHz, 8 Ω load Headset drivers with 160 mW output @ Vcc = 5 V, THD+N = 1%, F = 1 kHz, 32 Ω load Headset output is 30 mW in stereo @ Vcc = 3 V THD+N < 0.5% Max @ 20 mW into 32 Ω BTL, 50 Hz < Frequency < 20 kHz 32-step digital volume control from 34.5 dB to +12 dB +6 dB power up volume and full standby 8 different output modes Pop & click reduction circuitry Low shutdown current (< 100 nA) Thermal shutdown protection Flip-chip package 18 x 300 µm bumps PIN CONNECTIONS (top view) TS485IJT - Flip Chip DESCRIPTION The TS4851 is a low power audio amplifier that can drive either both a mono speaker or a stereo headset. To the speaker, it can deliver 400 mW (typ.) of continuous RMS output power into an 8 Ω load with a 1% THD+N value. To the headset driver, the amplifier can deliver 30 mW (typ.) per channel of continuous average power into a stereo 32 Ω bridged-tied load with 0.5% THD+N @ 3.3 V. This device features a 32-step digital volume control and 8 different output selections. The digital volume and output modes are controlled through a three-digit SPI interface bus. Pin Out (top view) R OUT< - R IN L OUT + VCC L IN APPLICATIONS PHONE IN ■ Mobile Phones BYPASS DATA NC VCC ENB SPKR OUT - SPKR OUT+ ORDER CODE L OUT - GND R OUT + GND CLK Package Part Number Temperature Range J TS4851IJT -40, +85°C • J = Flip Chip Package - only available in Tape & Reel (JT)) April 2003 Revision B 1/26 TS4851 1 Application Information for a Typical Application APPLICATION INFORMATION FOR A TYPICAL APPLICATION External component descriptions Component Functional Description Cin This is the input coupling capacitor. It blocks the DC voltage at, and couples the input signal to the amplifier’s input terminals. Cin also creates a highpass filter with the internal input impedance Zin at Fc =1/ (2πi x Zin x Cin). Cs This is the Supply Bypass capacitor. It provides power supply filtering. CB This is the Bypass pin capacitor. It provides half-supply filtering. 2/26 SPI Bus Interface 2 TS4851 SPI BUS INTERFACE 2.1 Pin descriptions Pin Functional Description DATA This is the serial data input pin. CLK This is the clock input pin. ENB This is the SPI enable pin active at high level. 2.2 Description of SPI operation The serial data bits are organized into a field containing 8 bits of data as shown in Table 1. The DATA 0 to DATA 2 bits determine the output mode of the TS4851 as shown in Table 2. The DATA 3 to DATA 7 bits determine the gain level setting as illustrated by Table 3. For each SPI transfer, the data bits are written to the DATA pin with the least significant bit (LSB) first. All serial data are sampled at the rising edge of the CLK signal. Once all the data bits have been sampled, ENB transitions from logic-high to logic low to complete the SPI sequence. All 8 bits must be received before any data latch can occur. Any excess CLK and DATA transitions will be ignored after the height rising clock edge has occurred. For any data sequence longer than 8 bits, only the first 8 bits will get loaded into the shift register and the rest of the bits will be disregarded. Table 1: Bit Allocation LSB MSB DATA MODES DATA 0 Mode 1 DATA 1 Mode 2 DATA 2 Mode 3 DATA 3 gain 1 DATA 4 gain 2 DATA 5 gain 3 DATA 6 gain 4 DATA 7 gain 5 Table 2: Output mode selection: G from -34.5 dB to +12 dB (by steps of 1.5 dB) Output Mode # DATA 2 DATA 1 DATA 0 SPKERout1 Rout Lout 0 0 0 0 SD SD SD 1 0 0 1 6dBxP SD SD 2 0 1 0 SD 0dBxP 0dBxP 3 0 1 1 Gx(R+L) SD SD 4 1 0 0 SD GxR GxL 5 1 0 1 Gx(R+L) SD SD +6dBxP 1) 6 1 1 0 SD GxR+0dBxP GxL+0dBxP 7 1 1 1 6dBxP GxR+0dBxP GxL+0dBxP SD = Shutdown Mode, P = Phone in Input, R = Rin input and L = Lin input 3/26 TS4851 SPI Bus Interface Table 3: Volume Control Settings 4/26 K : Gain (dB) DATA 7 DATA 6 DATA 5 DATA 4 DATA 3 -34.5 0 0 0 0 0 -33.0 0 0 0 0 1 -31.5 0 0 0 1 0 -30.0 0 0 0 1 1 -28.5 0 0 1 0 0 -27.0 0 0 1 0 1 -25.5 0 0 1 1 0 -24.0 0 0 1 1 1 -22.5 0 1 0 0 0 -21.0 0 1 0 0 1 -19.5 0 1 0 1 0 -18.0 0 1 0 1 1 -16.5 0 1 1 0 0 -15.0 0 1 1 0 1 -13.5 0 1 1 1 0 -12.0 0 1 1 1 1 -10.5 1 0 0 0 0 -9.0 1 0 0 0 1 -7.5 1 0 0 1 0 -6.0 1 0 0 1 1 -4.5 1 0 1 0 0 -3.0 1 0 1 0 1 -1.5 1 0 1 1 0 0.0 1 0 1 1 1 1.5 1 1 0 0 0 3.0 1 1 0 0 1 4.5 1 1 0 1 0 6 1 1 0 1 1 7.5 1 1 1 0 0 9 1 1 1 0 1 10.5 1 1 1 1 0 12 1 1 1 1 1 SPI Bus Interface TS4851 2.3 SPI Timing Diagram 5/26 TS4851 3 Absolute Maximum Ratings ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Unit 6 V Toper Supply voltage1 Operating Free Air Temperature Range -40 to + 85 °C Tstg Storage Temperature -65 to +150 °C 150 °C Tj Rthja Pd ESD ESD Maximum Junction Temperature Flip Chip Thermal Resistance Junction to Ambient2 Power Dissipation Human Body Model Machine Model Latch-up Immunity Lead Temperature (soldering, 10sec) 1) All voltages values are measured with respect to the ground pin. 2) Device is protected in case of over temperature by a thermal shutdown active @ 150°C 4 OPERATING CONDITIONS Symbol 1) 6/26 Parameter 200 °C/W Internally Limited 2 100 200 250 kV V mA °C Value Unit 3 to 5.5 V VCC Supply Voltage Vphin Maximum Phone In Input Voltage GND to VCC V VRin/VLin Maximum Rin & Lin Input Voltage GND to VCC V TSD Thermal Shut Down Temperature 150 °C Rthja Flip Chip Thermal Resistance Junction to Ambient1 90 °C/W Device is protected in case of over temperature by a thermal shutdown active @ 150°C Electrical Characteristics 5 TS4851 ELECTRICAL CHARACTERISTICS Table 4: Electrical characteristics at VCC = +5 V, GND = 0 V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Parameter Min. Typ. Max. Supply Current Output Mode 7, Vin = 0 V, no load All other output modes, Vin = 0 V, no load 8 4.5 11 6.5 Standby Current Output Mode 0 0.1 2 5 50 Unit mA µA Output Offset Voltage (differential) Vin = 0 V mV Vil “Logic low” input Voltage 0 0.4 V Vih “Logic high” input Voltage 1.4 5 V Po Output Power SPKERout, RL = 8 Ω, THD = 1%, F = 1 kHz Rout & Lout, RL = 32 Ω, THD = 0.5%, F = 1 kHz 800 80 THD + N mW 1000 120 % Total Harmonic Distortion + Noise Rout & Lout, Po = 80 mW, F = 1 kHz, RL = 32 Ω SPKERout, Po = 800 mW, F = 1 kHz, RL = 8 Ω Rout & Lout, Po = 50 mW, 20 Hz < F < 20 kHz, RL = 32 Ω SPKERout, Po = 40 mW, 20 Hz < F < 20 kHz, RL = 8 Ω 0.5 1 SNR Signal To Noise Ratio (A-Weighted) 90 PSRR1 Power Supply Rejection Ratio (Output Mode = 2)2 Vripple = 200 mV Vpp, F = 217 Hz, Input Floating Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 10 Ω 61 62 G Digital Gain Range - Rin & Lin no load 0.5 1 dB dB -34.5 Digital gain stepsize Stepsize G ≥ -22.5 dB G < -22.5 dB dB +12 1.5 dB dB -0.5 -1 Phone In Gain, no load BTL gain from Phone In to SPKERout BTL gain from Phone In to Rout & Lout +0.5 +1 dB 6 0 Zin Phone In Input Impedance 15 20 25 kΩ Zin Rin & Lin Input Impedance (all gain setting) tes Enable Stepup Time - ENB 37.5 20 50 62.5 kΩ ns teh Enable Hold Time - ENB 20 ns tel Enable Low Time - ENB 30 ns tds Data Setup Time- DATA 20 ns tdh Data Hold Time - DATA 20 ns tcs Clock Setup time - CLK 20 ns tch Clock Logic High Time - CLK 50 ns tcl Clock Logic Low Time - CLK 50 fclk Clock Frequency - CLK DC ns 10 1) All PSRR data limits are guaranted by evaluation desgin test. 2) Dynamic measurements [20 x log(rms(Vout)/rms(Vripple)]. Vripple is the superimposed sinus signal to Vcc @ F = 217 Hz MHz 7/26 TS4851 Electrical Characteristics Table 5: Electrical characteristics at VCC = +3.0V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Parameter Min. Typ. Max. Supply Current Output Mode 7, Vin = 0 V,no load All other output modes, Vin = 0 V,no load 7.5 4.5 10 6.5 Standby Current Output Mode 0 0.1 2 5 50 Unit mA µA Output Offset Voltage (differential) Vin = 0 V mV Vil “Logic low” input Voltage 0 0.4 V Vih “Logic high” input Voltage 1.4 5 V Po Output Power SPKERout, RL = 8 Ω, THD = 1%, F = 1 kHz Rout & Lout, RL = 32 Ω, THD = 0.5%, F = 1 kHz 300 20 THD + N mW 340 30 % Total Harmonic Distortion + Noise Rout & Lout, Po = 20 mW, F = 1 kHz, RL = 32 Ω SPKERout, Po = 300 mW, F = 1 kHz, RL = 8 Ω Rout & Lout, Po = 15 mW, 20 Hz < F < 20 kHz, RL = 32 Ω SPKERout, Po = 250 mW, 20 Hz < F < 20 kHz, RL = 8 Ω 0.5 1 SNR Signal To Noise Ratio (A-Weighted) 86 PSRR1 Power Supply Rejection Ratio (Output Mode = 2)2 Vripple = 200 mV Vpp, F = 217 Hz, Input Floating Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 10 Ω 61 62 G Digital Gain Range - Rin & Lin no load 0.5 1 dB dB -34.5 Digital gain stepsize Stepsize error G ≥ -22.5 dB G < -22.5 dB dB - +12 1.5 dB dB -0.5 -1 Phone In Gain, no load BTL gain from Phone In to SPKERout BTL gain from Phone In to Rout & Lout +0.5 +1 dB 6 0 15 20 25 kΩ 37.5 50 62.5 kΩ Zin Phone In Input Impedance 1 Zin Rin & Lin Input Impedance (All Gain Setting) 1 tes Enable Stepup Time - ENB 20 ns teh Enable Hold Time - ENB 20 ns tel Enable Low Time - ENB 30 ns tds Data Setup Time- DATA 20 ns tdh Data Hold Time - DATA 20 ns tcs Clock Setup time - CLK 20 ns tch Clock Logic High Time - CLK 50 ns tcl Clock Logic Low Time - CLK fclk Clock Frequency - CLK 50 DC ns 10 1) All PSRR data limits are guaranted by evaluation desgin test. 2) Dynamic measurements [20 x log(rms(Vout)/rms(Vripple)]. Vripple is the superimposed sinus signal to Vcc @ F = 217 Hz. 8/26 MHz Electrical Characteristics TS4851 Index of Graphics Description Figure Page THD + N vs. Output Power Figures 1 to 10 page 10 to page 11 THD + N vs. Frequency Figures 11 to 20 page 11 to page 13 Output Power vs. Power Supply Voltage Figures 21 to 28 page 13 to page 14 PSRR vs. Frequency Figures 29 to 38 page 14 to page 16 Frequency Response Figures 39 to 42 page 16 Signal to Noise Ratio vs. Power Supply Voltage Figures 43 to 46 page 17 Crosstalk vs. Frequency Figures 47 to 48 page 18 -3 dB Lower Cut Off Frequency vs. Input Capacitor Figures 49 to 50 page 18 Figure 51 page 18 Figures 52 to 55 page 18 to page 19 Power Derating Curves Figure 56 page 19 -3 dB Lower Cut Off Frequency vs. Gain Setting Figure 57 page 19 Current Consumption vs. Power Supply Voltage Power Dissipation vs. Output Power Note: In the graphs that follow, the abbreviations Spkout = Speaker Output, and HDout = Headphone Output are used. All measurements made with Cin = 220 nF, Cb = Cs = 1 µF except in PSRR condition where Cs = 0. 9/26 TS4851 Electrical Characteristics Figure 1: Spkout THD+N vs. output power (output modes 1, 7) RL = 4Ω Out. Mode = 1, 7 Vcc=3V BW < 125kHz F=20kHz Tamb = 25°C 10 Vcc=5V F=20kHz THD + N (%) THD + N (%) 10 Figure 4: HDout THD+N vs. output power (output mode 2) 1 1 RL = 16Ω Out. Mode = 2 BW < 125kHz Tamb = 25°C Vcc=5V F=20kHz Vcc=3V F=20kHz 0.1 Vcc=3V F=1kHz 0.1 Vcc=3V F=1kHz 1E-3 0.01 Vcc=5V F=1kHz 0.1 Output Power (W) 1 1E-3 Figure 2: Spkout THD+N vs. output power (output modes 1, 7) 10 RL = 8Ω Out. Mode = 1, 7 BW < 125kHz Tamb = 25°C 1 Vcc=3V F=20kHz Vcc=5V F=20kHz Vcc=3V F=1kHz 0.1 0.01 0.1 Output Power (W) Figure 5: HDout THD+N vs. output power (output mode 2) THD + N (%) THD + N (%) 10 Vcc=5V F=1kHz 0.01 1 RL = 32Ω Out. Mode = 2 BW < 125kHz Tamb = 25°C Vcc=5V F=20kHz Vcc=3V F=20kHz 0.1 Vcc=3V F=1kHz Vcc=5V F=1kHz Vcc=5V F=1kHz 0.01 1E-3 0.01 0.1 Output Power (W) 1 Figure 3: Spkout THD+N vs. output power (output modes 1, 7) RL = 16Ω Out. Mode = 1, 7 BW < 125kHz Tamb = 25°C 1 10 Vcc=5V F=20kHz Vcc=3V F=20kHz 0.01 Output Power (W) RL = 4Ω Out. Mode = 3 G = +12dB BW < 125kHz Tamb = 25°C 0.01 1E-3 10/26 0.01 0.1 Output Power (W) Vcc=5V F=1kHz 1 Vcc=3V F=20kHz Vcc=5V F=20kHz 1 Vcc=5V F=1kHz 0.1 Vcc=3V F=1kHz 0.1 Figure 6: Spkout THD+N vs. output power (output mode 3, G=+12dB) THD + N (%) THD + N (%) 10 1E-3 0.1 1E-3 Vcc=3V F=1kHz 0.01 0.1 Output Power (W) 1 Electrical Characteristics TS4851 Figure 7: Spkout THD+N vs. output power (output mode 3, G=+12dB) 10 RL = 8Ω Out. Mode = 3 G = +12dB BW < 125kHz Tamb = 25°C Vcc=3V F=20kHz 1 0.1 Vcc=5V F=20kHz Vcc=3V F=20kHz 1 0.1 Vcc=5V F=1kHz Vcc=3V F=1kHz 1E-3 0.01 0.1 Output Power (W) Vcc=3V F=1kHz 1 1E-3 Figure 8: Spkout THD+N vs. output power (output mode 3, G=+12dB) 10 Vcc=5V F=20kHz Vcc=3V F=20kHz THD + N (%) RL = 16Ω Out. Mode = 3 G = +12dB BW < 125kHz Tamb = 25°C 1 Vcc=3V F=1kHz Vcc=5V F=1kHz 0.01 0.1 Output Power (W) Figure 11: Spkout THD+N vs. frequency (output modes 1, 7) 10 THD + N (%) RL = 32Ω Out. Mode = 4 G = +12dB BW < 125kHz Tamb = 25°C Vcc=5V F=20kHz THD + N (%) THD + N (%) 10 Figure 10: HDout THD+N vs. output power (output mode 4, G=+12dB) RL = 4Ω Out. Mode = 1, 7 BW < 125kHz Tamb = 25°C 1 Vcc=3V P=450mW Vcc=5V P=1.1W 0.1 0.1 Vcc=5V F=1kHz 1E-3 0.01 0.1 Output Power (W) 1 Figure 9: HDout THD+N vs. output power (output mode 4, G=+12dB) RL = 16Ω Out. Mode = 4 G = +12dB BW < 125kHz Tamb = 25°C 1 10 Vcc=5V F=20kHz Vcc=3V F=20kHz 100 1000 Frequency (Hz) 10000 20k Figure 12: Spkout THD+N vs. frequency (output modes 1, 7) THD + N (%) THD + N (%) 10 0.01 20 RL = 8Ω Out. Mode = 1, 7 BW < 125kHz Tamb = 25°C 1 Vcc=3V P=350mW Vcc=5V P=0.8W 0.1 0.1 Vcc=3V F=1kHz 1E-3 0.01 0.1 Output Power (W) Vcc=5V F=1kHz 0.01 20 100 1000 Frequency (Hz) 10000 20k 11/26 TS4851 Electrical Characteristics Figure 13: Spkout THD+N vs. frequency (output modes 1, 7) Figure 16: Spkout THD+N vs.frequency (output mode 3, G = +12 dB) 10 10 RL = 16Ω Out. Mode = 1, 7 BW < 125kHz Tamb = 25°C Vcc=3V P=180mW Vcc=5V P=0.55W THD + N (%) THD + N (%) 1 RL = 4Ω Out. Mode = 3 G = +12dB BW < 125kHz Tamb = 25°C Vcc=5V P=1.1W 1 0.1 0.1 0.01 20 100 1000 Frequency (Hz) 20 10000 20k Figure 14: HDout THD+N vs. frequency (output mode 2) 100 1000 Frequency (Hz) 10000 20k Figure 17: Spkout THD+N vs. frequency (output mode 3, G = +12 dB) 10 10 RL = 8Ω Out. Mode = 3 G = +12dB BW < 125kHz Tamb = 25°C RL = 16Ω Out. Mode = 2 BW < 125kHz Tamb = 25°C THD + N (%) 1 THD + N (%) Vcc=3V P=450mW Vcc=3V P=40mW Vcc=3V P=350mW 1 0.1 Vcc=5V P=220mW 0.01 20 100 1000 Frequency (Hz) 0.1 20 10000 20k Figure 15: HDout THD+N vs. frequency (output mode 2) 100 1000 Frequency (Hz) 10000 20k Figure 18: Spkout THD+N vs. frequency (output mode 3, G = +12 dB) 10 10 RL = 32Ω Out. Mode = 2 BW < 125kHz Tamb = 25°C 1 THD + N (%) THD + N (%) Vcc=5V P=0.8W Vcc=3V P=20mW RL = 16Ω Out. Mode = 3 G = +12dB BW < 125kHz Tamb = 25°C Vcc=5V P=0.55W 1 0.1 Vcc=5V P=100mW 0.01 20 12/26 100 1000 Frequency (Hz) 10000 20k 0.1 20 Vcc=3V P=180mW 100 1000 Frequency (Hz) 10000 20k Electrical Characteristics TS4851 Figure 19: HDout THD+N vs. frequency (output mode 4, G = +12 dB) Figure 22: Speaker output power vs. power supply voltage (output mode 1, 7) 2.4 RL = 16Ω Out. Mode = 4 G = +12dB BW < 125kHz Tamb = 25°C Vcc=3V P=40mW 1 Vcc=5V P=220mW 0.1 20 Output power at 10% THD + N (W) THD + N (%) 10 100 0.4 32 Ω 3.5 Vcc=3V P=20mW 0.1 Vcc=5V P=100mW 100 F = 1kHz 300 Output Mode = 2 BW < 125kHz Tamb = 25°C 250 4.5 5.0 5.5 32 Ω 150 100 50 64 Ω 3.5 F = 1kHz 350 Output Mode = 2 BW < 125kHz 300 Tamb = 25°C Output power at 10% THD + N (mW) 400 F = 1kHz Output Mode = 1, 7 1.6 BW < 125kHz Tamb = 25°C 8Ω 1.2 16 Ω 0.8 0.4 32 Ω 3.5 4.0 4.5 Vcc (V) 5.0 5.5 4.0 4.5 Vcc (V) 5.0 5.5 Figure 24: Headphone output power vs. load resistor (output mode 2) 2.0 4Ω 16 Ω 200 0 3.0 10000 20k 1000 Frequency (Hz) Figure 21: Speaker output power vs. power supply voltage (output mode 1, 7) 0.0 3.0 4.0 350 RL = 32Ω Out. Mode = 4 G = +12dB BW < 125kHz 1 Tamb = 25°C Output power at 1% THD + N (mW) THD + N (%) 0.8 Figure 23: Headphone output power vs. load resistor (output mode 2) 10 Output power at 1% THD + N (W) 16 Ω Vcc (V) Figure 20: HDout THD+N vs. frequency (output mode 4, G = +12 dB) 0.01 20 8Ω 4Ω 1.2 0.0 3.0 10000 20k 1000 Frequency (Hz) F = 1kHz Output Mode = 1, 7 2.0 BW < 125kHz Tamb = 25°C 1.6 16 Ω 250 32 Ω 200 150 100 50 0 3.0 64 Ω 3.5 4.0 4.5 Vcc (V) 5.0 5.5 13/26 TS4851 Electrical Characteristics Figure 25: Speaker output power vs. power supply voltage (output mode 3) Figure 28: Headphone output power vs. load resistance (output mode 2) 400 F = 1kHz Output Mode = 3 1.6 BW < 125kHz Tamb = 25°C Output power at 10% THD + N (mW) Output power at 1% THD + N (W) 2.0 8Ω 4Ω 1.2 16 Ω 0.8 0.4 32 Ω 0.0 3.0 3.5 4.0 4.5 5.0 F = 1kHz 350 Output Mode = 4 BW < 125kHz 300 Tamb = 25°C 250 32 Ω 200 150 100 64 Ω 50 0 3.0 5.5 3.5 Vcc (V) Figure 26: Speaker output power vs. power supply voltage (output mode 3) 8Ω 5.0 5.5 Ouput mode 1, 7 RL = 8Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C -10 4Ω -20 PSRR (dB) Output power at 10% THD + N (W) 4.5 Vcc (V) 0 F = 1kHz Output Mode = 3 2.0 BW < 125kHz Tamb = 25°C 1.6 16 Ω 1.2 -30 -40 0.8 -50 0.4 3.5 4.0 4.5 5.0 Vcc=3V -60 32 Ω 0.0 3.0 Vcc=5V -70 5.5 100 Vcc (V) Figure 27: Headphone output power vs. load resistor (output mode 4) 100000 0 F = 1kHz 300 Output Mode = 4 BW < 125kHz Tamb = 25°C 250 Ouput mode 2 RL = 32Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C -10 16 Ω PSRR (dB) -20 200 32 Ω 150 100 -30 -40 -50 64 Ω 50 0 3.0 1000 10000 Frequency (Hz) Figure 30: HDout PSRR vs. frequency (output mode 2, input grounded) 350 Output power at 1% THD + N (mW) 4.0 Figure 29: Spkout PSRR vs. frequency (output modes 1, 7, input grounded) 2.4 14/26 16 Ω 3.5 4.0 4.5 Vcc (V) 5.0 Vcc=3V & 5V -60 5.5 -70 100 1000 10000 Frequency (Hz) 100000 Electrical Characteristics TS4851 Figure 31: Spkout PSRR vs. frequency (output mode 3, inputs grounded) Figure 34: HDout PSRR vs. frequency (output mode 4, inputs grounded) 0 -20 G=+6dB G=+12dB PSRR (dB) PSRR (dB) -10 0 Output mode 3 Vcc=+5V RL = 8Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C G=+9dB G=-12dB -30 G=0dB -40 100 1000 10000 Frequency (Hz) G=-12dB G=0dB G=-34.5dB 100 1000 10000 Frequency (Hz) 100000 Figure 35: Spkout PSRR vs. frequency (output mode 5, inputs grounded) 0 Output mode 3 Vcc=+3V RL = 8Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C G=+6dB G=+12dB G=+9dB G=-12dB -30 Output mode 5 Vcc=+5V RL = 8Ω Vripple=0.2Vpp -20 BW < 125kHz Tamb = 25°C G=+6dB -10 PSRR (dB) PSRR (dB) G=+9dB -30 100000 0 -20 G=+12dB -50 Figure 32: Spkout PSRR vs. frequency (output mode 3, inputs grounded) -10 G=+6dB -40 G=-34.5dB -50 Output mode 4 -10 Vcc=+3V RL = 32Ω Vripple=0.2Vpp -20 BW < 125kHz Tamb = 25°C G=+9dB G=-12dB G=0dB G=0dB -40 -30 G=+12dB -40 G=-34.5dB G=-34.5dB -50 100 1000 10000 Frequency (Hz) -50 100000 Figure 33: HDout PSRR vs. frequency (output mode 4, inputs grounded) 100 0 Output mode 4 Vcc=+5V RL = 32Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C Output mode 5 Vcc=+3V RL = 8Ω Vripple=0.2Vpp -20 BW < 125kHz Tamb = 25°C G=+6dB -10 G=+6dB G=+12dB PSRR (dB) PSRR (dB) -20 100000 Figure 36: Spkout PSRR vs. frequency (output mode 5, inputs grounded) 0 -10 1000 10000 Frequency (Hz) G=+9dB -30 G=-12dB -30 G=+12dB G=+9dB G=-12dB G=0dB -40 G=0dB -40 G=-34.5dB G=-34.5dB -50 100 1000 10000 Frequency (Hz) -50 100000 100 1000 10000 Frequency (Hz) 100000 15/26 TS4851 Electrical Characteristics Figure 37: HDout PSRR vs. frequency (output modes 6, 7, inputs grounded) Figure 40: HDout frequency response (output mode 2) 0 0 Output mode 6, 7 Vcc=+5V RL = 32Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C -20 G=+6dB Output level (dB) PSRR (dB) -10 G=+12dB G=+9dB -30 G=-12dB -40 Vcc=5V Vcc=3V -4 Ouput mode 2 RL = 32Ω Cin=220nF BW < 125kHz Tamb = 25°C G=0dB -6 G=-34.5dB -50 100 1000 10000 Frequency (Hz) 100000 Figure 38: HDout PSRR vs. freq., (output modes 6, 7, inputs grounded) 20 100 1000 Frequency (Hz) 12 Output mode 6, 7 Vcc=+3V RL = 32Ω Vripple=0.2Vpp BW < 125kHz Tamb = 25°C -20 10 G=+6dB Output level (dB) -10 G=+12dB G=+9dB -30 G=-12dB -40 Vcc=5V Vcc=3V 8 6 Ouput mode 3 RL = 8Ω G = +12dB Cin=220nF BW < 125kHz Tamb = 25°C 4 G=0dB 2 G=-34.5dB -50 100 1000 10000 Frequency (Hz) 0 20 100000 Figure 39: Spkout frequency response (output mode 1, 7) Vcc=3V Vcc=5V 2 Ouput mode 1, 7 RL = 8Ω Cin=220nF BW < 125kHz Tamb = 25°C 0 100 1000 Frequency (Hz) 10000 Output level (dB) 10 Output level (dB) 1000 Frequency (Hz) 10000 12 4 20 100 Figure 42: HDout frequency response (output mode 4) 6 16/26 10000 Figure 41: Spkout frequency response (output mode 3) 0 PSRR (dB) -2 Vcc=5V Vcc=3V 8 6 Ouput mode 4 RL = 32Ω G = +12dB Cin=220nF BW < 125kHz Tamb = 25°C 4 2 0 20 100 1000 Frequency (Hz) 10000 Electrical Characteristics Figure 43: Spkout SNR vs. power supply voltage, unweighted filter, BW = 20 Hz to 20 kHz ohms Figure 44: Spkout SNR vs. power supply voltage, weighted filter A, BW = 20 Hz to 20 kHz ohms TS4851 Figure 45: HDout SNR vs. power supply voltage, unweighted filter, BW = 20 Hz to 20 kHz ohms ohms Figure 46: HDout SNR vs. power supply voltage, weighted filter A, BW = 20 Hz to 20 kHz ohms 17/26 TS4851 Electrical Characteristics Figure 47: Crosstalk vs. frequency (output mode 4) Figure 50: -3 dB lower cut off frequency vs. input capacitance Ouput mode 4 Vcc = 5V RL = 32Ω G = +12dB Pout = 100mW BW < 125kHz Tamb = 25°C -20 -40 Lower -3dB Cut Off Frequency (Hz) Crosstalk Level (dB) 0 Lout -> Rout Rout -> Lout -60 -80 20 100 1000 Frequency (Hz) 10 Typical Input Impedance Minimum Input Impedance Maximum Input Impedance 1 0.1 10000 1 Input Capacitor (µF) Figure 48: Crosstalk vs. frequency (output mode 4) Figure 51: Current consumption vs. power supply voltage 10 0 Ouput mode 4 Vcc = 3V RL = 32Ω G = +12dB Pout = 20mW BW < 125kHz Tamb = 25°C -20 -40 No loads 9 Tamb = 25 C 8 Mode 7 7 Icc (mA) Crosstalk Level (dB) Rin & Lin Inputs All gain setting Tamb=25°C Rout -> Lout Lout -> Rout -60 Mode 2, 4, 6 6 5 4 3 2 -80 0 20 100 1000 Frequency (Hz) 10000 2 3 4 5 1.4 Phone In Input Tamb=25°C Power Dissipation (W) Lower -3dB Cut Off Frequency (Hz) 1 Figure 52: Power dissipation vs. output power (speaker output) 100 Typical Input Impedance Minimum Input Impedance Maximum Input Impedance 0.1 Vcc=5V 1.2 F=1kHz THD+N<1% RL=4Ω 1.0 0.8 0.6 RL=8Ω 0.4 0.2 RL=16Ω 1 Input Capacitor ( F) 18/26 0 Vcc (V) Figure 49: -3 dB lower cut off frequency vs. input capacitor 10 Mode 1, 3, 5 1 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 Output Power (W) 1.4 1.6 Electrical Characteristics TS4851 Figure 53: Power dissipation vs. output power (speaker output) Figure 56: Power derating curves 0.5 Power Dissipation (W) Lower -3dB Cut Off Frequency (Hz) 100 Vcc=3V F=1kHz 0.4 THD+N<1% RL=4Ω 0.3 0.2 RL=8Ω 0.1 RL=16Ω 0.0 0.0 0.1 0.2 0.3 0.4 Rin & Lin Inputs Input Impedance is Nominal Tamb=25°C Cin=220nF 10 Cin=1µF 1 -34.5 0.5 Flip-Chip Package Power Dissipation (W) Power Dissipation (W) Vcc=5V F=1kHz THD+N<1% 0.3 RL=16Ω RL=32Ω 0.05 0.10 0.15 0.20 Output Power (W) 0.25 1.4 1.2 Heat sink surface = 125mm 2 1.0 0.8 0.6 0.4 No Heat sink 0.2 0.0 0 25 50 75 100 125 150 Ambiant Temperature ( C) Figure 55: Power dissipation vs. output power (headphone output one channel) 120 Power Dissipation (mW) 12 Figure 57: -3 dB lower cut off frequency vs. gain setting (output modes 3, 4, 5, 6, 7) 0.4 0.0 0.00 0 Gain Setting (dB) Figure 54: Power dissipation vs. output power (headphone output, one channel) 0.1 Cin=470nF -20 Output Power (W) 0.2 Cin=100nF Vcc=3V F=1kHz 100 THD+N<1% Table 6: Output noise (all inputs grounded) Output Mode Unweighted Filter from 3V to 5V Weighted Filter (A) from 3V to 5V 1 23µVrms 20µVrms 2 20µVrms 17µVrms 3 70vVrms 60µVrms 4 53µVrms 45µVrms 5 79µVrms 67µVrms 6 60µVrms 51vVrms RL=16Ω 80 60 40 RL=32Ω 20 0 0 10 20 30 40 50 Output Power (mW) 60 70 19/26 TS4851 6 Application Information APPLICATION INFORMATION 6.1 BTL configuration principles The TS4851 integrates 3 monolithic power amplifier having BTL output. BTL (Bridge Tied Load) means that each end of the load is connected to two single-ended output amplifiers. Thus, we have: Then, the power dissipated by each amplifier is Pdiss = Psupply - Pout (W) Pdiss = 2 2 VCC π RL POUT − POUT (W ) and the maximum value is obtained when: ∂Pdiss ---------------------- = 0 ∂P OU T Single ended output 1 = Vout1 = Vout (V) Single ended output 2 = Vout2 = -Vout (V) and its value is: and Vout1 - Vout2 = 2Vout (V) Pdiss max = The output power is: Pout = ( 2 Vout RMS ) 2 (W ) RL For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single ended configuration. 6.2 Power dissipation and efficiency Note: Regarding the load we have: V O UT = V PEAK sin ωt (V) πV P E A K P O UT η = ------------------------ = ----------------------Psup ply 4V C C The maximum theoretical value is reached when Vpeak = Vcc, so: π ----- = 78.5% 4 The TS4851 has three independent power amplifiers. Each amplifier produces heat due to its power dissipation. Therefore, the maximum die temperature is the sum of each amplifier’s maximum power dissipation. It is calculated as follows: l Pdiss speaker = Power dissipation due to the and speaker power amplifier. I OU T V OU T = ----------------- (A) RL and POUT VPEAK 2 = ---------------------- (W) 2R L Then, the average current delivered by the supply voltage is: I CC AVG VPEAK = 2 -------------------- (A) πR L The power delivered by the supply voltage is: Psupply = Vcc IccAVG (W) 20/26 (W) The efficiency is the ratio between the output power and the power supply: l Voltage and current in the load are sinusoidal l Supply voltage is a pure DC source (Vcc). π2RL This maximum value is depends only on power supply voltage and load values. Hypotheses: (Vout and Iout). 2 Vcc 2 l Pdiss head = Power dissipation due to the Headphone power amplifier l Total Pdiss = Pdiss speaker + Pdiss head1 + Pdiss head2 (W) In most cases, Pdiss head1 = Pdiss head2, giving: Total P diss = Pdiss speaker + 2Pdiss head (W) TotalP diss = POUT SPEAKER POUT HEAD +2 R L HEAD R L SPEAKER − POUT SPEAKER + 2 POUT HEAD (W ) 2 2 VCC π [ ] Application Information The following graph (Figure 58) shows an example of the previous formula, with Vcc set to +5 V, Rload speaker set to 8 Ω and Rload headphone set to 16 Ω. Figure 58: Example of Total Power Dissipation vs. Speaker and Headphone Output Power TS4851 Cs has especially an influence on the THD+N in high frequency (above 7 kHz) and indirectly on the power supply disturbances. With 1 µF, you could expect similar THD+N performances like shown in the datasheet. If Cs is lower than 1 µF, THD+N increases in high frequency and disturbances on the power supply rail are less filtered. To the contrary, if Cs is higher than 1 µF, those disturbances on the power supply rail are more filtered. Cb has an influence on THD+N in lower frequency, but its value is critical on the final result of PSRR with input grounded in lower frequency: • If Cb is lower than 1 µF, THD+N increases at lower frequencies and the PSRR worsens upwards. • If Cb is higher than 1 µF, the benefit on THD+N and PSRR in the lower frequency range is small. 6.3 Low frequency response In low frequency region, the effect of Cin starts. Cin with Zin forms a high pass filter with a -3 dB cut off frequency. FCL = 1 (Hz ) 2 π Zin Cin Zin is the input impedance of the corresponding input: • 20 kΩ for Phone In IHF input • 50 kΩ for the 3 other inputs Note: For all inputs, the impedance value remains constant for all gain settings. This means that the lower cut-off frequency doesn’t change with gain setting. Note also that 20 kΩ and 50 kΩ are typical values and there are tolerances around these values (see Electrical Characteristics on page 7). In Figures 39 to 41, you could easily establish the Cin value for a -3 dB cut-off frequency required. 6.5 Startup time When the TS4851 is controlled to switch from the full standby mode (output mode 0) to another output mode, a delay is necessary to stabilize the DC bias. This delay depends on the Cb value and can be calculated by the following formulas. Typical startup time = 0.0175 x Cb (s) Max. startup time = 0.025 x Cb (s) (Cb is in µF in these formulas) These formulas assume that the Cb voltage is equal to 0 V. If the Cb voltage is not equal to 0V, the startup time will be always lower. The startup time is the delay between the negative edge of Enable input (see Description of SPI operation on page 3) and the power ON of the output amplifiers. Note: 6.4 Decoupling of the circuit Two capacitors are needed to bypass properly the TS4851, a power supply bypass capacitor Cs and a bias voltage bypass capacitor Cb. When the TS4851 is set in full standby mode, Cb is discharged through an internal resistor. The time to reach 0 V of Cb voltage could be calculated by the following formula: Tdischarge = 3 x Cb (s) Note: Cb must be in µF in this formula. 21/26 TS4851 Application Information 6.6 Pop and Click performance • The TS4851 has internal Pop and Click reduction circuitry. The performance of this circuitry is closely linked with the value of the input capacitor Cin and the bias voltage bypass capacitor Cb. The PSRR value for each frequency is: The value of Cin is due to the lower cut-off frequency value requested. The value of Cb is due to THD+N and PSRR requested always in lower frequency. The TS4851 is optimized to have a low pop and click in the typical schematic configuration (see page 2). Note: The value of Cs is not an important consideration as regards pop and click. 6.7 Notes on PSRR measurement What is the PSRR? The PSRR is the Power Supply Rejection Ratio. The PSRR of a device, is the ratio between a power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output. How we measure the PSRR? The PSSR was measured according to the schematic shown in Figure 59. Figure 59: PSRR measurement schematic Principles of operation • The DC voltage supply (Vcc) is fixed. • The AC sinusoidal ripple voltage (Vripple) is fixed. 22/26 No bypass capacitor Cs is used. RMS PSRR = 20 × Log RMS Note: ) ( Output ) ( Vripple ( dB ) The measure of the Rms voltage is not an Rms selective measure but a full range (20 Hz to 125 kHz) Rms measure. This means that the effective Rms signal + the Noise is measured. As the measurement is performed with a wideband frequency range apparatus, we have to subtract the Noise part (quadratic operation) of the measurement to obtain the real Rms signal needed to calculate the PSRR, as shown in the formula above. Package Information 7 TS4851 PACKAGE INFORMATION Flip-chip - 18 bumps: TS4851JT Pin out (top view) 7 R OUT- 6 5 3 R IN VCC L IN PHONE IN BYPASS A DATA NC VCC SPKR OUT + 2 1 L OUT + R OUT + 4 L OUT - GND ENB SPKR OUT - GND B C CLK D E Note: The solder bumps are on the underside. Marking (top view): The following markings are present on the topside of the flip-chip: l The ST logo. l The part number: A51. l A 3-digit date code: YWW. l A dot marking the location of Pin1A. A51 YWW 23/26 TS4851 Package Information TS4851 Footprint recommendation Package mechanical data 2440µm Die size: 2170µm x 2440µm ±30µm Die height (including bumps): 600µm ±30µm 2170µm Bumps diameter: 300µm ±15µm Bumps height: 250µm ±15µm 750µm 500µm Pitch: 500µm ±10µm 866µm 866µm 600µm 24/26 Daisy Chain Samples 8 TS4851 DAISY CHAIN SAMPLES A daisy chain sample is a “dummy” silicon chip that can be used to test your flip-chip soldering process and connection continuity. The daisy chain sample features paired connections between bumps, as shown in the schematic below. On your PCB layout, you should design the bump connections such that they are complementary to the above schema (meaning that different pairs of bumps are connected on the PCB side). In this way, by simply connecting an ohmmeter between pin 1A and pin 5A, you can test the continuity of your soldering process. The order code for daisy chain samples is given below. Figure 60: Daisy chain sample mechanical data 2.44 mm 7 R OUT- 6 5 3 R IN VCC L IN 2.17 mm VCC SPKR OUT + ENB SPKR OUT - BYPASS A DATA NC PHONE IN 2 1 L OUT + R OUT + 4 L OUT - GND GND B C CLK D E Order code for daisy chain samples Part Number TSDC02IJT Temperature Range -40, +85°C Package Marking J • DC2 25/26 TS4851 9 Tape & Reel Specification TAPE & REEL SPECIFICATION Figure 61: Top view of tape and reel 1 A 1 A User direction of feed Device orientation The devices are oriented in the carrier pocket with pin number 1A adjacent to the sprocket holes. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com 26/26