STMICROELECTRONICS TS4855IJT

TS4855
LOUDSPEAKER & HEADSET DRIVER
WITH VOLUME CONTROL
■
■
OPERATING FROM VCC = 3.0 V to 5.0 V
■
HEADSET: Stereo, THD+N @ 1 kHz is 0.5%
Max. @ 85 mW into 32 Ω BTL
PIN CONNECTIONS (top view)
SPEAKER: Mono, THD+N @ 1 kHz is 1%
Max @ 1 W into 8 Ω BTL
■
VOLUME CONTROL: 32-step digital
volume control
■
■
■
■
■
OUTPUT MODE: Eight different selections
TS4855IJT - Flip Chip
Ultra low pop-and-click
Low Shutdown Current (0.1 µA, typ.)
Thermal Shutdown Protection
FLIP-CHIP Package 18 X 300 µm Bumps
DESCRIPTION
The TS4855 is a complete low power audio
amplifier solution targeted at mobile phones. It
integrates, into an extremely compact flip-chip
package, an audio amplifier, a speaker driver, and
a headset driver.
The Audio Power Amplifier can deliver 1.1 W
(typ.) of continuous RMS output power into an 8 Ω
speaker with a 1% THD+N value. To the headset
driver, the amplifier can deliver 85 mW (typ.) per
channel of continuous average power into stereo
32 Ω bridged-tied load with 0.5% THD+N @ 5 V.
Pin Out (top view)
This device features a 32-step digital volume
control and 8 different output selections. The
digital volume and output modes are controlled
through a three-digit SPI interface bus.
APPLICATIONS
•
Mobile Phones
ORDER CODE
Part Number
TS4855IJT
Temperature
Range
Package
-40, +85°C
J
•
J = Flip Chip Package - only available in Tape & Reel (JT))
April 2003
1/27
TS4855
1
Application Information for a Typical Application
APPLICATION INFORMATION FOR A TYPICAL APPLICATION
External component descriptions
Component
2/27
Functional Description
Cin
This is the input coupling capacitor. It blocks the DC voltage at, and couples the input signal to the
amplifier’s input terminals. Cin also creates a highpass filter with the internal input impedance Zin at
Fc = 1 / (2π x Zin x Cin).
Cs
This is the Supply Bypass capacitor. It provides power supply filtering.
CB
This is the Bypass pin capacitor. It provides half-supply filtering.
SPI Bus Interface
2
TS4855
SPI BUS INTERFACE
2.1 Pin Descriptions
Pin
Functional Description
DATA
This is the serial data input pin
CLK
This is the clock input pin
ENB
This is the SPI enable pin active at high level
2.2 SPI Operation Description
The serial data bits are organized into a field
containing 8 bits of data as shown in Table 1. The
DATA 0 to DATA 2 bits determine the output
mode of the TS4855 as shown in Table 2. The
DATA 3 to DATA 7 bits determine the gain level
setting as illustrated by Table 3. For each SPI
transfer, the data bits are written to the DATA pin
with the least significant bit (LSB) first. All serial
data are sampled at the rising edge of the CLK
signal. Once all the data bits have been sampled,
ENB transitions from logic-high to logic low to
complete the SPI sequence. All 8 bits must be
received before any data latch can occur. Any
excess CLK and DATA transitions will be ignored
after the height rising clock edge has occurred.
For any data sequence longer than 8 bits, only the
first 8 bits will get loaded into the shift register and
the rest of the bits will be disregarded.
Table 1: Bit Allocation
LSB
MSB
DATA
MODES
DATA 0
Mode 1
DATA 1
Mode 2
DATA 2
Mode 3
DATA 3
gain 1
DATA 4
gain 2
DATA 5
gain 3
DATA 6
gain 4
DATA 7
gain 5
Table 2: Output Mode Selection
Output
Mode #
DATA 2
DATA 1
DATA 0
SPKRout
Rout
Lout
0
0
0
0
SD
SD
SD
1
0
0
1
+12dBxPIHF
SD
SD
2
0
1
0
MUTE
G1xPHS
G1xPHS
3
0
1
1
+12dBxPIHF
G1xPHS
G1xPHS
4
1
0
0
MUTE
G2xRin
G2xLin
5
1
0
1
+12dBxPIHF
G2xRin
G2xLin
6
1
1
0
MUTE
G1xPHS+
G2xRin
G1xPHS+
G2xLin
7
1
1
1
+12dBxPIHF
G1xPHS+
G2xRin
G1xPHS+
G2xLin
(SD = Shut Down Mode, PHS = Non Filtered Phone In HS, PIHF = External High Pass Filtered Phone In IHF)
3/27
TS4855
SPI Bus Interface
Table 3: Gain Control Settings
G2: Gain (dB)
G1: Gain (dB)
DATA 7
DATA 6
DATA 5
DATA 4
DATA 3
-34.5
-40.5
0
0
0
0
0
-33.0
-39.0
0
0
0
0
1
-31.5
-37.5
0
0
0
1
0
-30.0
-36.0
0
0
0
1
1
-28.5
-34.5
0
0
1
0
0
-27.0
-33.0
0
0
1
0
1
-25.5
-31.5
0
0
1
1
0
-24.0
-30.0
0
0
1
1
1
-22.5
-28.5
0
1
0
0
0
-21.0
-27.0
0
1
0
0
1
-19.5
-25.5
0
1
0
1
0
-18.0
-24.0
0
1
0
1
1
-16.5
-22.5
0
1
1
0
0
-15.0
-21.0
0
1
1
0
1
-13.5
-19.5
0
1
1
1
0
-12.0
-18.0
0
1
1
1
1
-10.5
-16.5
1
0
0
0
0
-9.0
-15.0
1
0
0
0
1
-7.5
-13.5
1
0
0
1
0
-6.0
-12.0
1
0
0
1
1
-4.5
-10.5
1
0
1
0
0
-3.0
-9.0
1
0
1
0
1
-1.5
-7.5
1
0
1
1
0
0.0
-6.0
1
0
1
1
1
1.5
-4.5
1
1
0
0
0
3.0
-3.0
1
1
0
0
1
4.5
-1.5
1
1
0
1
0
6.0
0.0
1
1
0
1
1
7.5
1.5
1
1
1
0
0
9.0
3.0
1
1
1
0
1
10.5
4.5
1
1
1
1
0
12.0
6.0
1
1
1
1
1
4/27
Absolute Maximum Ratings
TS4855
2.3 SPI Timing Diagram
3
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
1
Value
Unit
VCC
Supply voltage
6
V
Toper
Operating Free Air Temperature Range
-40 to + 85
°C
Tstg
Storage Temperature
-65 to +150
°C
150
°C
166
°C/W
Tj
Rthja
Pd
ESD
ESD
Maximum Junction Temperature
Flip Chip Thermal Resistance Junction to Ambient 2
Power Dissipation
Human Body Model 3
4
Machine Model
Latch-up Immunity
Lead Temperature (soldering, 10sec)
Internally Limited
2
kV
100
V
200
250
mA
°C
1) All voltage values are measured with respect to the ground pin.
2) Device is protected in case of over temperature by a thermal shutdown active @ 150°C typ.
3) Human body model, 100pF discharged through a 1.5 kΩ resistor into pin of device.
4) This is a minimum Value. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external
series resistor (internal resistor < 5Ω), into pin to pin of device.
5.) All PSRR data limits are guaranteed by evaluation tests.
4
OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage
Value
Unit
3 to 5
V
Maximum Phone In Input Voltage
GND to VCC
V
VRin/VLin Maximum Rin & Lin Input Voltage
GND to VCC
V
150
°C
Vphin
TSD
Thermal Shutdown Temperature
5/27
TS4855
5
Electrical Characteristics
ELECTRICAL CHARACTERISTICS
Table 4: Electrical characteristics at VCC = +5.0 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
ICC
ISTANDBY
Voo
Parameter
Min.
Typ.
Max.
Supply Current, all gain @ max settings
Output Mode 1, Vin = 0 V, no load
Output Mode 1, Vin = 0 V, loaded (8Ω)
Output Mode 2,3,4,5,6,7 Vin = 0 V, no loads
Output mode 2,3,4,5,6,7 Vin = 0 V, loaded (8Ω, 32Ω)
4.0
5.5
8.0
10
8
9
11
12
Standby Current
Output Mode 0
0.1
2
Unit
mA
µA
mV
Output Offset Voltage (differential)
Output Mode 1 to 7, Vin = 0 V, no load, Speaker Out
Output Mode 2 to 7 Vin = 0 V, no loads, Headset Out
5
5
20
40
Vil
“Logic low” input Voltage
0
0.4
V
Vih
“Logic high” input Voltage
1.4
5
V
Po
Output Power
SPKR out, RL = 8Ω, THD+N = 1%, f = 1 kHz
Rout & Lout, RL = 32Ω, THD+N = 0.5%, f = 1 kHz
800
70
mW
%
THD + N Total Harmonic Distortion + Noise
Rout & Lout, Po = 70 mW, f = 1 kHz, RL = 32Ω
SPKR out, Po = 800 mW, f = 1 kHz, RL = 8Ω
Rout & Lout, Po = 50 mW, 20 Hz < f < 20 kHz, RL = 32Ω
SPKR out, Po = 400 mW, 20 Hz < f < 20 kHz, RL = 8Ω
SNR
0.5
1
0.5
0.5
80
Signal To Noise Ratio
A-Weighted, f = 1 kHz
PSRR 5) Power Supply Rejection Ratio
SPKRout;Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Gain (BTL) = 12 dB, Output mode 1,3,5,7
Rout& Lout;Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Maximum gain setting, Output mode 2,3
Rout& Lout;Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Maximum gain setting, Output mode 4,5
Rout& Lout;Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Maximum gain setting, Output mode 6,7
1100
100
dB
dB
58
61
52
55
50
53
46
49
G2
Digital Gain Range (Rin & Lin) to R out, Lout
-34.5
12
dB
G1
Digital Gain Range (Phone In HS) to Rout, Lout
-40.5
6
dB
Digital Gain Stepsize
Stepsize Error
6/27
1.5
dB
± 0.6
dB
Electrical Characteristics
TS4855
Table 4: Electrical characteristics at VCC = +5.0 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Phone In Volume
BTL maximum GAIN from Phone In HS to R out, Lout
BTL minimum GAIN from Phone In HS to R out, Lout
5.4
-41.1
6
-40.5
6.6
-39.9
Phone In Volume
BTL maximum gain from Rin, Lin to Rout, Lout
BTL minimum gain from Rin, Lin to Rout, Lout
11.4
-35.1
12
-34.5
12.6
-33.9
11.4
12
12.6
dB
16
20
24
kΩ
42.5
50
57.5
kΩ
Phone In Volume
BTL gain from Phone In IHF to SPKR out
Unit
dB
dB
Zin
Phone In IHF Input Impedance
Zin
Phone In HS, Rin & Lin Input Impedance, All Gain setting
tes
Enable Step up Time - ENB
20
ns
teh
Enable Hold Time - ENB
20
ns
tel
Enable Low Time - ENB
30
ns
tds
Data Setup Time- DATA
20
ns
tdh
Data Hold Time - DATA
20
ns
tcs
Clock Setup time - CLK
20
ns
tch
Clock Logic High Time - CLK
50
ns
tcl
Clock Logic Low Time - CLK
50
ns
fclk
Clock Frequency - CLK
DC
10
MHz
Table 5: Electrical characteristics at VCC = +3.0 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
ICC
ISTANDBY
Voo
Parameter
Min.
Typ.
Max.
Supply Current, all gain @ max settings
Output Mode 1, Vin = 0 V, no load
Output Mode 1, Vin = 0 V, loaded (8Ω)
Output Mode 2,3,4,5,6,7 Vin = 0 V, no loads
Output mode 2,3,4,5,6,7 Vin = 0 V, loaded (8Ω, 32Ω)
3.5
4.5
7.5
9
7
8
10
11
Standby Current
Output Mode 0
0.1
2
5
5
20
40
Unit
mA
µA
Output Offset Voltage (differential)
Output Mode 1 to 7, Vin = 0 V, no load, Speaker Out
Output Mode 2 to 7 Vin = 0 V, no loads, Headset Out
mV
Vil
“Logic low” input Voltage
0
0.4
V
Vih
“Logic high” input Voltage
1.4
3
V
7/27
TS4855
Electrical Characteristics
Table 5: Electrical characteristics at VCC = +3.0 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
Po
Parameter
Output Power
SPKRout, RL = 8Ω, THD = 1%, f = 1 kHz
Rout & Lout, RL = 32Ω, THD = 0.5%, f = 1 kHz
Min.
Typ.
300
20
340
25
%
0.5
1
0.5
0.5
Signal To Noise Ratio
A-Weighted, f = 1 kHz
PSRR 5) Power Supply Rejection Ratio
SPKRout,Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Gain (BTL) = 12 dB, Output Mode 1,3,5,7
Rout & Lout Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Maximum gain setting, Output Mode 2,3
Rout & Lout Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Maximum gain setting, Output Mode 4,5
Rout & Lout Vripple = 200 mV Vpp, F = 217 Hz, Input Terminated 50Ω
Maximum gain setting, Output Mode 6,7
Unit
mW
THD + N Total Harmonic Distortion + Noise
Rout & Lout, Po = 20 mW, f = 1 kHz, RL = 32Ω
SPKRout, Po = 300 mW, f = 1 kHz, RL = 8Ω
Rout & Lout, Po = 15 mW, 20 Hz < f < 20 kHz, RL = 32Ω
SPKRout, Po = 250 mW, 20 Hz < f < 20 kHz, RL = 8Ω
SNR
Max.
80
dB
dB
58
61
52
55
49
52
45
48
G2
Digital Gain Range - Rin & Lin to Rout ,Lout
-34.5
12
dB
G1
Digital Gain Range - Phone In HS to Rout ,Lout
-40.5
6
dB
Digital Gain stepsize
Stepsize Error
1.5
dB
± 0.6
dB
Phone In Volume
BTL maximum GAIN from Phone In HS to Rout, Lout
BTL minimum GAIN from Phone In HS to Rout, Lout
5.4
-41.1
6
-40.5
6.6
-39.9
Phone In Volume
BTL maximum gain from Rin, Lin to Rout, Lout
BTL minimum gain from Rin, Lin to Rout, Lout
11.4
-35.1
12
-34.5
12.6
-33.9
Phone In Volume
BTL gain from Phone In IHF to SPKRout
11.4
12
12.6
16
20
24
kΩ
42.5
50
57.5
kΩ
dB
dB
dB
Zin
Phone In IHF Input Impedance, all gains setting
Zin
Phone In HS, Rin & Lin Input Impedance, all gains setting
tes
Enable Step up Time - ENB
20
ns
teh
Enable Hold Time - ENB
20
ns
tel
Enable Low Time - ENB
30
ns
8/27
Electrical Characteristics
TS4855
Table 5: Electrical characteristics at VCC = +3.0 V, GND = 0 V, Tamb = 25°C
(unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
tds
Data Setup Time- DATA
20
ns
tdh
Data Hold Time - DATA
20
ns
tcs
Clock Setup time - CLK
20
ns
tch
Clock Logic High Time - CLK
50
ns
tcl
Clock Logic Low Time - CLK
50
ns
fclk
Clock Frequency - CLK
DC
10
MHz
Index of Graphics
Description
Figure
Page
THD + N vs. Output Power
Figures 1 to 11
page 10 to page 11
THD + N vs. Frequency
Figures 12 to 18
page 11 to page 12
Output Power vs. Power Supply Voltage
Figures 19 to 22
page 13
Output Power vs. Load Resistor
Figures 23 to 26
page 13 to page 14
PSRR vs. Frequency
Figures 27 to 34
page 14 to page 15
Figure 35
page 15
Frequency Response
Figures 36 to 38
page 15 to page 16
-3 dB Lower Cut Off Frequency vs. Input Capacitor
Figures 39 to 40
page 16
-3 dB Lower Cut Off Frequency vs. Gain Setting
Figure 39
page 16
Power Derating Curves
Figure 42
page 16
Signal to Noise Ratio vs. Power Supply Voltage
Figures 43 to 50
page 17 to page 18
Current Consumption vs. Power Supply Voltage
Figure 51
page 18
Figures 52 to 55
page 18 to page 19
Mute Attenuation vs. Frequency
Power Dissipation vs. Output Power
Note:
In the graphs that follow, the abbreviations Spkout = Speaker Output, and HDout = Headphone Output are
used.
9/27
TS4855
Electrical Characteristics
Figure 1: Spkout THD+N vs. output power
(Output modes 1, 3, 5, 7)
10
RL = 4Ω
BW < 125kHz
Tamb = 25°C
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
THD + N (%)
THD + N (%)
10
1
0.1
Vcc=3V
F=1kHz
1E-3
0.01
0.1
Output Power (W)
THD + N (%)
RL = 8Ω
BW < 125kHz
Tamb = 25°C
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
1
1
Vcc=3V
F=1kHz
1E-3
Vcc=5V
F=20kHz
THD + N (%)
1
Vcc=5V
F=1kHz
0.01
0.1
Output Power (W)
Figure 5: HDout THD+N vs. output power
(Output modes 2, 3 G=+3dB)
10
Vcc=3V
F=20kHz
RL = 16Ω
BW < 125kHz
Tamb = 25°C
0.1
Vcc=5V
F=1kHz
Figure 2: Spkout THD+N vs. output power
(Output modes 1, 3, 5, 7)
10
Figure 4: HDout THD+N vs. output power
(Output modes 2, 3 G=+6dB)
RL = 16Ω
BW < 125kHz
Tamb = 25°C
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
1
0.1
Vcc=3V
F=1kHz
0.01
1E-3
0.01
Vcc=5V
F=1kHz
0.1
Output Power (W)
0.1
1
1E-3
Figure 3: Spkout THD+N vs. output power
(Output modes 1, 3, 5, 7)
10
RL = 16Ω
BW < 125kHz
Tamb = 25°C
1
Vcc=3V
F=20kHz
Vcc=5V
F=20kHz
Vcc=5V
F=1kHz
0.01
0.1
Output Power (W)
Figure 6: HDout THD+N vs. output power
(Output modes 2, 3 G=+6dB)
THD + N (%)
THD + N (%)
10
Vcc=3V
F=1kHz
RL = 32Ω
BW < 125kHz
Tamb = 25°C
1
Vcc=3V
F=20kHz
Vcc=5V
F=20kHz
0.1
Vcc=3V
F=1kHz
0.01
1E-3
10/27
0.01
0.1
Output Power (W)
0.1
Vcc=5V
F=1kHz
1
1E-3
Vcc=3V
F=1kHz
0.01
0.1
Output Power (W)
Vcc=5V
F=1kHz
Electrical Characteristics
TS4855
Figure 7: HDout THD+N vs. output power
(Output modes 2, 3 G=+3dB)
10
RL = 32Ω
BW < 125kHz
Tamb = 25°C
Vcc=5V
F=20kHz
THD + N (%)
THD + N (%)
10
Vcc=3V
F=20kHz
1
0.1
Vcc=3V
F=1kHz
1E-3
Vcc=5V
F=1kHz
Vcc=3V
F=1kHz
Vcc=5V
F=1kHz
0.01
0.1
Output Power (W)
Figure 11: HDout THD+N vs. output power
(Output modes 4, 5 G=+6dB)
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
1
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
1E-3
THD + N (%)
THD + N (%)
1
10
RL = 16Ω
BW < 125kHz
Tamb = 25°C
RL = 32Ω
BW < 125kHz
Tamb = 25°C
0.1
0.01
0.1
Output Power (W)
Figure 8: HDout THD+N vs. output power
(Output modes 4, 5 G=+12dB)
10
Figure 10: HDout THD+N vs. output power
(Output modes 4, 5 G=+12dB)
RL = 32Ω
BW < 125kHz
Tamb = 25°C
1
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
0.1
Vcc=3V
F=1kHz
0.01
1E-3
Vcc=5V
F=1kHz
Vcc=5V
F=20kHz
Vcc=3V
F=20kHz
THD + N (%)
THD + N (%)
1
Vcc=5V
F=1kHz
0.01
0.1
Output Power (W)
Figure 12: HDout THD+N vs. frequency
(Output modes 1, 3, 5, 7)
10
RL = 16Ω
BW < 125kHz
Tamb = 25°C
Vcc=3V
F=1kHz
1E-3
0.01
0.1
Output Power (W)
Figure 9: HDout THD+N vs. output power
(Output modes 4, 5 G=+6dB)
10
0.1
RL = 4Ω
BW < 125kHz
Tamb = 25°C
1
Vcc=5V
P=1W
Vcc=3V
P=450mW
0.1
Vcc=3V
F=1kHz
0.01
1E-3
0.01
0.1
Output Power (W)
Vcc=5V
F=1kHz
0.1
100
1000
Frequency (Hz)
10000
11/27
TS4855
Electrical Characteristics
Figure 13: Spkout THD+N vs. frequency
(Output modes 1, 3, 5, 7)
10
RL = 8Ω
BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
10
Figure 16: HDout THD+N vs. Frequency
(Output modes 2, 3 G=+6dB)
1
Vcc=5V
P=800mW
Vcc=3V
P=250mW
100
1000
Frequency (Hz)
RL = 32Ω
G=+6dB
BW < 125kHz
Tamb = 25°C
Vcc=3V, P=25mW
Vcc=5V, P=75mW
1
0.1
10000
Figure 14: Spout THD+N vs. frequency
(Output modes 1, 3, 5, 7)
10
RL = 16Ω
BW < 125kHz
Tamb = 25°C
1
Vcc=5V
P=500mW
Vcc=3V
P=180mW
100
1000
Frequency (Hz)
RL = 16Ω
G=+12dB
BW < 125kHz
Tamb = 25°C
1
Vcc=3V
P=50mW
0.1
100
1000
Frequency (Hz)
10000
Figure 15: HDout THD+N vs. frequency
(Output modes 2, 3 G=+6dB)
THD + N (%)
10
0.1
12/27
1000
Frequency (Hz)
10000
Figure 18: HDout THD+N vs. frequency
(Output modes 4, 5 G=+12dB)
RL = 32Ω
G=+12dB
BW < 125kHz
Tamb = 25°C
Vcc=3V, P=50mW
Vcc=5V, P=150mW
100
100
Vcc=5V
P=150mW
10
RL = 16Ω
G=+6dB
BW < 125kHz
Tamb = 25°C
1
0.1
1000
Frequency (Hz)
10000
THD + N (%)
0.01
10000
Figure 17: HDout THD+N vs. frequency
(Output modes 4, 5 G=+12dB)
THD + N (%)
THD + N (%)
10
0.1
1
0.1
Vcc=3V
P=25mW
100
Vcc=5V
P=75mW
1000
Frequency (Hz)
10000
Electrical Characteristics
TS4855
Figure 22: Headphone output power vs. power
supply voltage (Output modes 2, 3, 4, 5, 6, 7)
2.0
450
F = 1kHz
1.8 BW < 125kHz
1.6 Tamb = 25°C
F = 1kHz
400 BW < 125kHz
Tamb = 25°C
350
Output power at 10% THD + N (W)
Output power at 1% THD + N (W)
Figure 19: Speaker output power vs. power
supply voltage (Output modes 1, 3, 5, 7)
8Ω
4Ω
1.4
1.2
1.0
0.8
0.6
0.4
16 Ω
0.2
0.0
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
150
32 Ω
100
50
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
2.0
2.2 F = 1kHz
BW < 125kHz
2.0 Tamb = 25°C
1.8
1.8
8Ω
THD+N=10%
1.6
4Ω
Output power (W)
Output power at 10% THD + N (W)
200
Figure 23: Speaker output power vs. load
resistance (Output modes 1, 3, 5, 7)
2.4
1.6
1.4
1.2
1.0
0.8
1.4
Vcc = 5V
F = 1kHz
BW < 125kHz
Tamb = 25°C
1.2
1.0
0.8
THD+N=1%
0.6
0.6
0.4
16 Ω
0.4
0.2
0.2
0.0
2.5
3.0
3.5
4.0
Vcc (V)
4.5
5.0
0.0
5.5
Figure 21: Headphone output power vs. power
supply voltage (Output modes 2, 3, 4, 5, 6, 7)
350
0.7
F = 1kHz
300 BW < 125kHz
Tamb = 25°C
0.6
16 Ω
250
200
150
32 Ω
100
6
8
10
12
Load Resistance (Ohm)
14
16
THD+N=10%
0.5
Vcc = 3V
F = 1kHz
BW < 125kHz
Tamb = 25°C
0.4
0.3
THD+N=1%
0.2
0.1
50
0
2.5
4
Figure 24: Speaker output power vs. load
resistance (Output modes 1, 3, 5, 7)
Output power (W)
Output power at 1% THD + N (W)
250
0
2.5
5.5
Figure 20: Speaker output power vs. power
supply voltage (Output modes 1, 3, 5, 7)
16 Ω
300
0.0
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
4
6
8
10
12
Load Resistance (ohm)
14
16
13/27
TS4855
Electrical Characteristics
Figure 25: Headphone output power vs. load
resistance (Output modes 2, 3, 4, 5, 6, 7)
Figure 28: Spkout PSRR vs. frequency
(Output modes 2, 4, 6 input grounded)
350
0
300
-10
THD+N=10%
-20
PSRR (dB)
Output power (mW)
250
200
150
THD+N=1%
100
Vcc = 5V
F = 1kHz
BW < 125kHz
Tamb = 25°C
50
0
16
-30
-40
-50
-60
24
28
32
36
40
Load Resistance (Ohm)
44
48
Figure 26: Headphone output power vs. load
resistance (Output modes 2, 3, 4, 5, 6, 7)
80
-20
PSRR (dB)
Output power (mW)
1000
10000
Frequency (Hz)
100000
-10
THD+N=10%
60
THD+N=1%
40
Vcc = 3V
F = 1kHz
BW < 125kHz
Tamb = 25°C
20
-30
24
28
32
36
40
Load Resistance (Ohm)
44
G=-6dB
G=-40.5dB
G=0dB
G=+6dB
-40
G=+3dB
G=-18dB
-60
20
Output mode 2, 3
Vcc=+5V
RL = 32Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
-50
48
Figure 27: Spkout PSRR vs. frequency
(Output modes 1, 3, 5, 7 input grounded)
100
1000
10000
Frequency (Hz)
100000
Figure 30: HDout PSRR vs. frequency
(Output modes 2, 3 input grounded)
0
-10
-20
-30
-40
-50
-20
PSRR (dB)
Ouput mode 1, 3, 5, 7
RL = 8Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
-10
PSRR (dB)
100
Figure 29: HDout PSRR vs. frequency
(Output modes 2, 3 input grounded)
100
0
16
Vcc=3V & 5V
-70
-80
20
Ouput mode 2, 4, 6
RL = 8Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
-30
Output mode 2, 3
Vcc=+3V
RL = 32Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
G=-6dB
G=-40.5dB
G=0dB
G=+6dB
-40
Vcc=3V & 5V
-50
G=+3dB
-60
G=-18dB
-70
14/27
100
1000
10000
Frequency (Hz)
100000
-60
100
1000
10000
Frequency (Hz)
100000
Electrical Characteristics
TS4855
Figure 31: HDout PSRR vs. frequency
(Output modes 4, 5 inputs grounded)
Figure 34: HDout PSRR vs. frequency
(Output modes 6, 7 inputs grounded)
0
PSRR (dB)
-20
-10
G=0dB
G=-34.5dB
PSRR (dB)
-10
0
Output mode 4, 5
Vcc=+5V
RL = 32Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
G=+9dB
-30
G=+12dB
-20
Output mode 6, 7
Vcc=+3V
RL = 32Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
G1=-6dB
G2=0dB
G1=-40.5dB
G2=-34.5dB
G1=+6dB
G2=+12dB
-30
-40
G1=+3dB
G2=+9dB
G1=+3dB
G2=+6dB
-40
G=-12dB
-50
G1=-18dB
G2=-12dB
G=+6dB
-60
100
1000
10000
Frequency (Hz)
-50
100000
Figure 32: HDout PSRR vs. frequency
(Output modes 4, 5 inputs grounded)
100000
0
-30
Ouput mode 2, 4, 6
RL = 8Ω
VinPIHF=1Vrms
BW < 125kHz
Tamb = 25°C
-10
Output mode 4, 5
Vcc=+3V
RL = 32Ω
Vripple=0.2Vpp
BW < 125kHz
Tamb = 25°C
G=0dB
G=-34.5dB
G=+12dB
G=+9dB
-40
G=+6dB
Mute attenuation (dB)
PSRR (dB)
-20
1000
10000
Frequency (Hz)
Figure 35: Spkout mute attenuation vs.
frequency (Output modes 2, 4, 6)
0
-10
100
-20
-30
-40
-50
-60
-70
Vcc=3V
Vcc=5V
-80
G=-12dB
-50
100
1000
10000
Frequency (Hz)
100000
Figure 33: HDout PSRR vs. frequency
(Output modes 6, 7 inputs grounded)
-30
1000
Frequency (Hz)
10000
Figure 36: Spkout frequency response
(Output modes 1, 3, 5, 7)
G1=-6dB
Output mode 6, 7
G2=0dB
Vcc=+5V
RL = 32Ω
G1=-40.5dB
Vripple=0.2Vpp
G2=-34.5dB
BW < 125kHz
Tamb = 25°C
G1=+6dB
G2=+12dB
G1=+3dB
G2=+9dB
-40
10
G1=+3dB
G2=+6dB
100
1000
10000
Frequency (Hz)
8
Vcc=3V
Vcc=5V
6
Ouput mode 1, 3, 5, 7
RL = 8Ω
Cin=220nF
VinPIHF=0.2Vrms
BW < 125kHz
Tamb = 25°C
4
2
G1=-18dB
G2=-12dB
-50
Output level (dB)
PSRR (dB)
-20
100
12
0
-10
-90
-100
100000
0
20
100
1000
Frequency (Hz)
10000
15/27
TS4855
Electrical Characteristics
Figure 37: HDout frequency response
(Output modes 2, 3 G=+6dB)
Figure 40: HDout -3dB lower cut-off frequency vs.
input capacitor (Output modes 2, 3, 4, 5, 6, 7)
6
Output level (dB)
5
Vcc=5V
Vcc=3V
4
3
Ouput mode 2, 3
RL = 32Ω
Cin=220nF
VinPHS=0.2Vrms
G=+6dB
BW < 125kHz
Tamb = 25°C
2
1
0
20
100
1000
Frequency (Hz)
Lower -3dB Cut Off Frequency (Hz)
40
Figure 38: HDout frequency response
(Output modes 4, 5 G=+12dB)
Vcc=3V
8
6
Ouput mode 4, 5
RL = 32Ω
Cin=220nF
VinR/L=0.2Vrms
G=+12dB
BW < 125kHz
Tamb = 25°C
4
0
20
100
1000
Frequency (Hz)
Lower -3dB Cut Off Frequency (Hz)
Output level (dB)
Vcc=5V
2
Maximum Input
Impedance
10
0.2
0.3
0.4
0.5
0.6
0.7
Input Capacitor ( F)
0.8
10000
0.9
1.0
Minimum Input
Impedance
60
Maximum Input
Impedance
40
20
0.2
0.3
Cin=220nF
10
Cin=1µF
Cin=470nF
-20
-36
0
-6
12
6
0.4
0.5
0.6
0.7
Input Capacitor ( F)
0.8
0.9
1.0
Figure 42: Power derating curves
Flip-Chip Package Power Dissipation (W)
Phone In IHF Input
Tamb=25°C
Typical Input
Impedance
Cin=100nF
Gain Setting (dB)
100
80
Phone In Hs / Rin & Lin Inputs
Tamb=25°C
1
-34.5
-40.5
Figure 39: Spkout -3dB lower cut off freq. vs.
input capacitor (Output modes 1, 3, 5, 7)
Lower -3dB Cut Off Frequency (Hz)
20
100
10
16/27
Minimum Input
Impedance
Figure 41: HDout -3dB lower cut-off freq. vs.
gain setting (Output modes 2, 3, 4, 5, 6, 7)
12
0
0.1
30
0
0.1
10000
Phone In HS Input
Rin & Lin Inputs
All gain setting
Tamb=25°C
Typical Input
Impedance
1.4
1.2
2
Heat sink surface = 125mm
1.0
0.8
0.6
0.4
No Heat sink
0.2
0.0
0
25
50
75
100
Ambiant Temperature ( C)
125
150
Electrical Characteristics
TS4855
Figure 43: Spkout SNR vs. power supply voltage,
unweighted filter, BW = 20 Hz to 20 kHz
Figure 46: HDout SNR vs. power supply
voltage, weighted filter A, BW=20Hz to 20kHz
110
100
Vcc = 3V
Vcc = 5V
RL=8Ω
Unweighted filter (20Hz to 20kHz)
THD + N < 0.7%
Tamb = 25°C
108
106
102
96
94
SNR (dB)
SNR (dB)
104
100
98
90
88
86
94
84
92
82
1
2
3
4
5
Output Mode
6
80
7
Figure 44: Spkout SNR vs. power supply voltage,
weighted filter A, BW = 20 Hz to 20 kHz
1
2
3
4
5
Output Mode
6
7
Figure 47: HDout SNR vs. Power supply
voltage, unweighted filter, BW=20Hz to 20kHz
100
110
106
104
102
Vcc = 3V
Vcc = 5V
RL = 32Ω
94 G=+12dB
Unweighted filter
92
(20Hz to 20kHz)
90 THD + N < 0.7%
Tamb = 25°C
88
98
96
SNR (dB)
Vcc = 3V
Vcc = 5V
RL=8Ω
Weighted filter A (20Hz to 20kHz)
THD + N < 0.7%
Tamb = 25°C
108
SNR (dB)
92
96
90
Vcc = 3V
Vcc = 5V
RL = 32Ω
G=+6dB
Weighted filter A (20Hz to 20kHz)
THD + N < 0.7%
Tamb = 25°C
98
86
100
84
98
96
82
80
1
2
3
4
5
Output Mode
6
7
Figure 45: HDout SNR vs. power supply voltage,
unweighted filter, BW= 20 Hz to 20 kHz
3
4
5
Output Mode
6
7
100
96
94
92
90
88
98
Vcc = 3V
Vcc = 5V
RL = 32Ω
94 G=+12dB
Weighted filter A
92
(20Hz to 20kHz)
90 THD + N < 0.7%
Tamb = 25°C
88
96
SNR (dB)
Vcc = 3V
Vcc = 5V
RL = 32Ω
G=+6dB
Unweighted filter (20Hz to 20kHz)
THD + N < 0.7%
Tamb = 25°C
98
SNR (dB)
2
Figure 48: HDout SNR vs. power supply voltage,
weighted filter A, BW = 20 Hz to 20 kHz
100
86
86
84
84
82
82
80
1
80
1
2
3
4
5
Output Mode
6
7
1
2
3
4
5
Output Mode
6
7
17/27
TS4855
Electrical Characteristics
Figure 49: HDout SNR vs. power supply voltage,
unweighted filter, BW = 20 Hz to 20 kHz)
Figure 52: Power dissipation vs. output
power: speaker output
1.4
100
96
94
SNR (dB)
92
90
Vcc = 3V
Vcc = 5V
RL = 32Ω
G=+6dB and +12dB
Unweighted filter (20Hz to 20kHz)
THD + N < 0.7%
Tamb = 25°C
Power Dissipation (W)
98
88
86
84
1
2
3
4
5
Output Mode
6
0.2
0.4
Vcc=3V
F=1kHz
0.4 THD+N<1%
Vcc = 3V
Vcc = 5V
RL = 32Ω
G=+6dB and +12dB
Weighted filter A (20Hz to 20kHz)
THD + N < 0.7%
Tamb = 25°C
86
84
1
2
3
4
5
Output Mode
6
7
RL=8Ω
0.1
4
3
Output mode 1
RL=8Ω
18/27
2.0
0.3
0.4
0.5
Figure 54: Power dissipation vs. output power.
headphone output one channel
Power Dissipation (W)
Icc (mA)
Output mode 2 to 7
RL=8Ω and 2x32Ω
5
1
0.2
0.4
Output mode 2 to 7
no loads
2
0.1
Output Power (W)
Tamb = 25°C
7
0
1.5
RL=4Ω
RL=16Ω
8
6
1.6
0.2
0.0
0.0
Figure 51: Current consumption vs. power
supply voltage
9
1.4
0.3
82
10
0.8
1.0
1.2
Output Power (W)
0.5
88
80
0.6
Figure 53: Power dissipation vs. output
power: speaker output
Power Dissipation (W)
SNR (dB)
90
RL=8Ω
0.4
7
100
92
0.6
RL=16Ω
Figure 50: HDout SNR vs. power supply voltage,
weighted filter A, BW = 20 Hz to 20 kHz)
94
0.8
0.0
0.0
80
96
RL=4Ω
1.0
0.2
82
98
Vcc=5V
1.2 F=1kHz
THD+N<1%
2.5
3.0
3.5
Vcc (V)
Vcc=5V
F=1kHz
THD+N<1%
0.3
RL=16Ω
0.2
0.1
RL=32Ω
Output mode 1
no load
4.0
4.5
5.0
0.0
0.00
0.05
0.10
0.15
0.20
Output Power (W)
0.25
Electrical Characteristics
TS4855
Figure 55: Power dissipation vs. output power.
headphone output one channel
Power Dissipation (mW)
120
Vcc=3V
F=1kHz
100 THD+N<1%
RL=16Ω
80
60
40
RL=32Ω
20
0
0
10
20
30
40
50
Output Power (mW)
60
70
19/27
TS4855
6
Application Information
APPLICATION INFORMATION
6.1 BTL Configuration Principle
The TS4855 integrates 3 monolithic power
amplifiers having BTL output. BTL (Bridge Tied
Load) means that each end of the load is
connected to two single-ended output amplifiers.
Thus, we have:
Then, the power dissipated by each amplifier is
Pdiss = Psupply - Pout (W)
Pdiss =
2 2 VCC
π RL
POUT − POUT
(W )
and the maximum value is obtained when:
∂Pdiss
---------------------- = 0
∂P OU T
Single ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
and its value is:
and
Pdiss max =
Vout1 - Vout2 = 2Vout (V)
The output power is:
Note:
( 2 Vout RMS ) 2
Pout =
(W )
RL
For the same power supply voltage, the output
power in BTL configuration is 4 times higher than
the output power in single-ended configuration.
6.2 Power dissipation and efficiency
Voltage and current in the load are sinusoidal
(Vout and Iout).
•
Supply voltage is a pure DC source (Vcc).
Regarding the load we have:
V O UT = V PEAK sin ωt (V)
and
V OU T
I OU T = ----------------- (A)
RL
and
VPEAK 2
P O U T = ---------------------- (W)
2R L
Therefore, the average current delivered by the
supply voltage is:
I CC
AVG
VPEAK
= 2 -------------------- (A)
πR L
The power delivered by the supply voltage is:
Psupply = Vcc IccAVG (W)
20/27
π2RL
(W)
This maximum value is only depending on
power supply voltage and load values.
The efficiency is the ratio between the output
power and the power supply
P O UT
πV P E A K
η = ------------------------ = ----------------------Psup ply
4V C C
The maximum theoretical value is reached when
Vpeak = Vcc, so
Hypotheses:
•
2 Vcc 2
π
----- = 78.5%
4
The TS4855 has 3 independent power amplifiers
and each amplifier produces heat due to its power
dissipation. Therefore, the maximum die
temperature is the sum of the each amplifier’s
maximum power dissipation. It is calculated as
follows:
Pdiss speaker = Power dissipation
speaker power amplifier.
Pdiss head = Power dissipation
headphone’s power amplifier.
due
due
to
to
the
each
Total Pdiss = Pdiss speaker + Pdiss head1 + Pdiss head2 (W)
In most cases, Pdiss head1 = Pdiss head 2, giving:
Total Pdiss = P diss speaker + 2Pdiss head (W)
TotalP diss =
 POUT SPEAKER
POUT HEAD
+2

R L HEAD
 R L SPEAKER
− POUT SPEAKER + 2 POUT HEAD
(W )
2 2 VCC
π
[
]



Application Information
TS4855
The following graph shows an example of the
previous formula, with Vcc set to +5 V,
Rload speaker set to 8 Ω, and Rload headphone se to
16 Ω.
Figure 56: Example of total power dissipation
vs. speaker and headphone output power
Cs has especially an influence on the THD+N in
high frequency (above 7 kHz) and indirectly on
the power supply disturbances.
With 1 µF, you could expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 1 µF, THD+N increases in high
frequency and disturbances on the power supply
rail are less filtered.
1.2
Cb has an influence on THD+N in lower
frequency, but its value is critical on the final result
of PSRR with input grounded in lower frequency:
1.0
0.8
0.6
Vcc=5V
THD+N<1%
Tamb=25°C
0.4
0.2
0.0
0.0
0.2
0.4
0.6
0.8
1.0
Speaker Ouput Power (W)
1.2
0
250
200
150
100
50
H
ea
d
Po ph
w on
er e
(m Ou
W tpu
)
t
Total Power Dissipation (W)
To the contrary, if Cs is higher than 1 µF, those
disturbances on the power supply rail are more
filtered.
6.3 Low frequency response
In low frequency region, the effect of Cin starts.
Cin with Zin forms a high pass filter with a -3 dB
cut off frequency.
FCL
1
=
(Hz )
2 π Zin Cin
Zin is the input impedance of the corresponding
input:
•
20 kΩ for Phone In IHF input
•
50 kΩ for the 3 other inputs
Note:
For all inputs, the impedance value remains
constant for all gain settings. This means that
the lower cut-off frequency doesn’t change with
gain setting. Note also that 20 kΩ and 50 kΩ are
typical values and there are tolerances around
these values (see Electrical Characteristics on
page 6).
In Figures 39 to 41, you could easily establish the
Cin value for a -3 dB cut-off frequency required.
•
If Cb is lower than 1 µF, THD+N increases at
lower frequencies and the PSRR worsens
upwards.
•
If Cb is higher than 1 µF, the benefit on
THD+N and PSRR in the lower frequency
range is small.
6.5 Startup time
When the TS4855 is controlled to switch from the
full standby mode (output mode 0) to another
output mode, a delay is necessary to stabilize the
DC bias. This delay depends on the Cb value and
can be calculated by the following formulas.
Typical startup time = 0.0175 x Cb (s)
Max. startup time = 0.025 x Cb (s)
(Cb is in µF in these formulas)
These formulas assume that the Cb voltage is
equal to 0 V. If the Cb voltage is not equal to 0V,
the startup time will be always lower.
The startup time is the delay between the
negative edge of Enable input (see SPI Operation
Description on page 3) and the power ON of the
output amplifiers.
Note:
6.4 Decoupling of the circuit
Two capacitors are needed to bypass properly the
TS4855, a power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
When the TS4855 is set in full standby mode,
Cb is discharged through an internal resistor.
The time to reach 0 V of Cb voltage could be
calculated by the following formula:
Tdischarge = 3 x Cb (s)
Note:
Cb must be in µF in this formula.
21/27
TS4855
6.6 Pop and Click performance
The TS4855 has internal Pop and Click reduction
circuitry. The performance of this circuitry is
closely linked with the value of the input capacitor
Cin and the bias voltage bypass capacitor Cb.
The value of Cin is due to the lower cut-off
frequency value requested. The value of Cb is
due to THD+N and PSRR requested always in
lower frequency.
The TS4855 is optimized to have a low pop and
click in the typical schematic configuration (see
page 2).
Note:
The value of Cs is not an important
consideration as regards pop and click.
6.7 Notes on PSRR measurement
What is the PSRR?
The PSRR is the Power Supply Rejection Ratio.
The PSRR of a device, is the ratio between a
power supply disturbance and the result on the
output. We can say that the PSRR is the ability of
a device to minimize the impact of power supply
disturbances to the output.
How we measure the PSRR?
The PSSR was measured according to the
schematic shown in Figure 57.
Figure 57: PSRR measurement schematic
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Application Information
Principles of operation
•
The DC voltage supply (Vcc) is fixed.
•
The AC sinusoidal ripple voltage (Vripple) is
fixed.
•
No bypass capacitor Cs is used.
The PSRR value for each frequency is:
 RMS
PSRR = 20 × Log 
 RMS
Note:



) 
( Output )
( Vripple
( dB )
The measure of the Rms voltage is not an Rms
selective measure but a full range (20 Hz to
125 kHz) Rms measure. This means that the
effective Rms signal + the Noise is measured.
As the measurement is performed with a wideband frequency range apparatus, we have to
subtract the Noise part (quadratic operation) of
the measurement to obtain the real Rms signal
needed to calculate the PSRR, as shown in the
formula above.
Application Information
TS4855
Figure 58: TS4855 Footprint Recommendation
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TS4855
7
Package Information
PACKAGE INFORMATION
Flip-chip package—18 bumps: TS4855IJT
Marking (on top view)
■ ST LOGO
■ Part number: A55
■ Three digit Datecode: YWW
■ The dot is for marking the bump1A
Package mechanical data
2440µm
2170µm
750µm
500µm
866µm
866µm
600µm
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❑
❑
❑
❑
❑
Die size: 2440µm x 2170µm ±30µm
Die height (including bumps): 600µm ±30µm
Bumps diameter: 300µm ±15µm
Bumps height: 250µm ±15µm
Pitch: 500µm ±10µm
Package Information
TS4855
Pin out (top view)
7
R
OUT-
6
5
3
R
IN
VDD
L
IN
PHONE
IN HS
VDD
BYPASS
A
DATA
PHONE
IN IHF
SPKR
OUT -
2
1
L
OUT +
R
OUT +
4
L
OUT -
GND
ENB
SPKR
OUT +
GND
B
C
CLK
D
E
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TS4855
Package Information
Daisy chain mechanical data
All drawings dimensions are in millimeters
2.44 mm
7
R
OUT-
6
5
R
IN
VDD
L
IN
VDD
SPKR
OUT -
BYPASS
A
DATA
PHONE
IN IHF
PHONE
IN HS
2
1
L
OUT +
R
OUT +
4
3
L
OUT -
GND
ENB
SPKR
OUT +
GND
B
2.17 mm
C
CLK
D
E
Remarks
Daisy chain sample is featuring pin connection two by two. The schematic above is illustrating the way
connecting pins each others. This sample is used for testing continuity on board. PCB needs to be
designed on the opposite way, where pin connections are not done on daisy chain samples. By that way,
just connecting a Ohmmeter between pin 1A and pin 5A, the soldering process continuity can be tested.
Order code
Part
Number
Temperature
Range
Package
TSDC02IJT
-40, +85°C
•
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Marking
J
DC2
Tape & Reel Specification
8
TS4855
TAPE & REEL SPECIFICATION
Figure 59: Top view of tape & reel
1
A
1
A
User direction of feed
Device orientation
The devices are oriented in the carrier pocket with bump number A1 adjacent to the sprocket holes.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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