STMICROELECTRONICS TS4975

TS4975
Stereo Headphone Drive Amplifier with
Digital Volume Control via I2C Bus
■
Operating from VCC = 2.5V to 5.5V
■
I²C bus control interface
■
40mW output power @ Vcc=3.3V, THD=1%,
F=1kHz, with 16Ω load
■
Ultra-low consumption in stdby mode: 0.6 µA
■
Digital volume control range from 18dB to
-34dB
■
14-step digital volume control
■
9 different output mode selections
■
Pop & click noise reduction circuitry
■
Flip-chip package 12 x 300µm bumps (leadfree)
TS4975EIJT - Flip Chip
Pin Out (top view)
Description
The TS4975 is a stereo audio headphone driver
capable of delivering up to 102mW per channel of
continuous average power into a 16Ω singleended load with 1% THD+N from a 5V power
supply. The overall gain of these headphone
drivers is controlled digitally by volume control
registers programmed via the I²C interface,
minimizing the number of external components
needed. This device can also easily be driven by
an MCU to select the output modes, through the
I²C bus interface.
A phantom ground configuration allows one to
avoid using bulky capacitors on the outputs of the
headphone amplifiers.
OUT1
PHG1
PHG2
IN1
VCC
GND
IN2
SCL
SDA
ADD
BYPASS
OUT2
It has also an internal thermal shutdown
protection mechanism.
Applications
■
Mobile phones (cellular / cordless)
PDAs
Laptop/notebook computers
■
Portable audio devices
■
■
The TS4975 is packaged into a 1.8mm X 2.3mm
Flip Chip package, ideally suited for spaceconscious portable applications.
Order Codes
Part Number
TS4975EIJT
July 2005
Temperature Range
Package
Packaging
Marking
-40, +85°C
Flip-chip
Tape & Reel
A75
Rev 2
1/33
www.st.com
33
Absolute Maximum Ratings
1
TS4975
Absolute Maximum Ratings
Table 1.
Key parameters and their absolute maximum ratings
Symbol
Value
Unit
6
V
Input Voltage (2)
GND to VCC
V
Toper
Operating Free Air Temperature Range
-40 to + 85
°C
Tstg
Storage Temperature
-65 to +150
°C
Maximum Junction Temperature
150
°C
Thermal Resistance Junction to Ambient (3)
200
°C/W
VCC
Vi
Tj
Rthja
Pd
Parameter
Supply voltage (1)
Internally Limited(4)
Power Dissipation
ESD
Susceptibility - Human Body Model(5)
ESD
Latch-up
2
kV
Susceptibility - Machine Model (min. Value)
200
V
Latch-up Immunity
200
mA
Lead Temperature (soldering, 10sec)
260
°C
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed VCC + 0.3V / GND - 0.3V
3. Device is protected in case of over temperature by a thermal shutdown active @ 150°C.
4. Exceeding the power derating curves during a long period, may involve abnormal operating condition.
5. Human body model, 100pF discharged through a 1.5kOhm resistor, into pin to Vcc device.
Table 2.
Operating conditions
Symbol
Value
Unit
VCC
Supply Voltage
2.5 to 5.5v
V
RL
Load Resistor
>16
Ω
CL
Load Capacitor
RL = 16 to 100Ω,
RL > 100Ω,
400
100
pF
-40 to +85
°C
90
°C/W
TOP
RTHJA
2/33
Parameter
Operating Free Air Temperature Range
Flip Chip Thermal resistance Junction to Ambient
TS4975
Typical Application Schematics
Figure 1 shows typical application schematics for the TS4975 in single-ended output
configuration and in phantom ground output configuration.
Typical application schematics for two possible configurations
Single-ended output configuration
+
Cb
1µF
Cs
1µF
B2
A1
+
Vcc
Vcc
Bypass
Bias
IN1
Pre-Amplifier
IN1
OUT1 Amplifier
A2
RL = 16/32 Ohms
Cout1
Cin1
IN1
OUT1
+
+
A3
330nF
220µF
1k
PHG1 Amplifier
PHG1
B3
Mode
Select
PHG2 Amplifier
PHG2
IN2
Pre-Amplifier
IN2
C3
OUT2 Amplifier
D2
RL = 16/32 Ohms
Cout2
Cin2
IN2
OUT2
+
+
D3
330nF
220µF
1k
Volume control
SDA
SCL
B1
TS4975
C1
ADD
D1
C2
GND
I2C
ADD
SCL
SDA
Phantom ground output configuration
+
+
Vcc
Cs
1µF
Vcc
A1
B2
Cb
1µF
Bypass
Bias
IN1
Pre-Amplifier
IN1
OUT1 Amplifier
RL = 16/32 Ohms
Cin1
A2
IN1
OUT1
A3
+
330nF
PHG1 Amplifier
PHG1
B3
Mode
Select
PHG2 Amplifier
PHG2
IN2
Pre-Amplifier
C3
RL = 16/32 Ohms
OUT2 Amplifier
Cin2
D2
IN2
OUT2
D3
+
330nF
Volume control
ADD
SCL
SDA
B1
C1
I2C
D1
IN2
GND
Figure 1.
C2
2
Typical Application Schematics
TS4975
ADD
SCL
SDA
3/33
Electrical Characteristics
3
Electrical Characteristics
Table 3.
Electrical characteristics for the I²C interface
Symbol
Parameter
Value
Unit
VIL
Maximum Low level Input Voltage on pin SDA, SCL,
VADD
0.3 VCC
V
VIH
Minimum High Level Input Voltage on pin SDA, SCL,
VADD
0.7 VCC
V
SCL Maximum clock Frequency
400
kHz
Max Low Level Output Voltage, SDA pin,
Isink = 3mA
0.4
V
Input current on SDA, SCL.
From 0.1Vcc to 0.9Vcc
10
µA
FSCL
Vol
Ii
Table 4.
4/33
TS4975
Output noise (all inputs grounded)
Unweighted Filter
from Vcc=2.5V to 5V
Weighted Filter (A)
from Vcc=2.5V to 5V
SE, G=+2dB
34µVrms
23µVrms
SE, G=+18dB
67µVrms
45µVrms
PHG, G=+2dB
34µVrms
23µVrms
PHG, G=+18dB
67µVrms
45µVrms
TS4975
Table 5.
Electrical Characteristics
VCC = +2.5 V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTANDBY
Parameter
Supply Current
No input signal, no load, Single Ended, Mode 1-4
No input signal, no load, Single Ended, Mode 5-8
No input signal, no load, Phantom Ground, Mode 1-4
No input signal, no load, Phantom Ground, Mode 5-8
Standby Current (SCL and SDA at VCC level)
No input signal
Voo
Output Offset Voltage
No input signal, RL = 32Ω, Phantom Ground
Po
Output Power
THD+N = 1% Max, f = 1kHz, RL = 16Ω, Single Ended
THD+N = 1% Max, f = 1kHz, RL = 32Ω, Single Ended
THD+N = 1% Max, f = 1kHz, RL = 16Ω, Phantom Ground
THD+N = 1% Max, f = 1kHz, RL = 32Ω, Phantom Ground
THD + N
PSRR
Crosstalk
Min.
15
11
15
11
Total Harmonic Distortion + Noise, Av = 2dB
RL=32Ω, Po=10 mW, 20Hz < F < 20kHz, Single Ended
RL=16Ω, Po=15 mW, 20Hz < F < 20kHz, Single Ended
RL=32Ω, Po=10 mW, 20Hz < F < 20kHz, Phantom Ground
RL=16Ω, Po=15 mW, 20Hz < F < 20kHz, Phantom Ground
Typ.
Max.
3
2
4.6
3.6
4.2
2.8
6.5
5.3
0.6
2
µA
5
50
mV
21
13
21
13
103
75
ONoise
Output Noise voltage, A-Weighted, Av=2dB
Single Ended
Phantom Ground
23
23
G
Digital Gain Range In1 & In2 to Out1 & Out2
-34
Digital Gain Stepsize
In1 & In2 Input Impedance, All Gain setting
Twu
Wake up time, Cb=1µF
Tws
Standby time
dB
69
69
88
88
Zin
dB
60
Channel Separation, RL = 32Ω, Av = 2 dB with Single Ended
F = 1kHZ, Po=10mW
F = 20Hz to 20kHz, Po=10mW
Channel Separation, RL = 32Ω, Av = 2 dB with Phantom Ground
F = 1kHZ, Po=10mW
F = 20Hz to 20kHz, Po=10mW
Gain error tolerance
%
60
Signal To Noise Ratio, A-Weighted, Av=2dB, RL=32Ω,
Po=12mW
Single Ended
Phantom Ground
SNR
mA
mW
0.3
0.3
0.3
0.3
Power Supply Rejection Ratio(1)
F = 217Hz, RL = 16Ω, Av = 2 dB
Vripple = 200mVpp, Input Grounded, Cb = 1µF, Single Ended
Output referenced to Phantom Ground
F = 217Hz, RL = 16Ω, Av = 2 dB
Vripple = 200mVpp, Input Grounded, Cb = 1µF, Single Ended
Output referenced to Ground
Unit
dB
µVrms
+18
4
-1
25.5
dB
dB
+1
dB
30
34.5
kΩ
110
180
ms
1
µs
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ F = 217Hz
5/33
Electrical Characteristics
Table 6.
VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTANDBY
TS4975
Parameter
Supply Current
No input signal, no load, Single Ended, Mode 1-4
No input signal, no load, Single Ended, Mode 5-8
No input signal, no load, Phantom Ground, Mode 1-4
No input signal, no load, Phantom Ground, Mode 5-8
Standby Current (SCL and SDA at VCC level)
No input signal
Voo
Output Offset Voltage
No input signal, RL = 32Ω, Phantom Ground
Po
Output Power
THD+N = 1% Max, f = 1kHz, RL = 16Ω, Single Ended
THD+N = 1% Max, f = 1kHz, RL = 32Ω, Single Ended
THD+N = 1% Max, f = 1kHz, RL = 16Ω, Phantom Ground
THD+N = 1% Max, f = 1kHz, RL = 32Ω, Phantom Ground
THD + N
Total Harmonic Distortion + Noise, Av = 2dB
RL=32Ω, Po=20 mW, 20Hz < F < 20kHz, Single Ended
RL=16Ω, Po=30 mW, 20Hz < F < 20kHz, Single Ended
RL=32Ω, Po=20 mW, 20Hz < F < 20kHz, Phantom Ground
RL=16Ω, Po=30 mW, 20Hz < F < 20kHz, Phantom Ground
PSRR
Min.
34
24
34
24
Typ.
Max.
3
2
4.6
3.6
4.2
2.8
6.5
5.3
0.6
2
µA
5
50
mV
40
26
40
26
%
61
dB
61
Channel Separation, RL = 32Ω, Av = 2 dB with Single Ended
F = 1kHZ, Po=20mW
F = 20Hz to 20kHz, Po=20mW
Crosstalk
Channel Separation, RL = 32Ω, Av = 2 dB with Phantom Ground
F = 1kHZ, Po=20mW
F = 20Hz to 20kHz, Po=20mW
103
75
dB
69
69
SNR
Signal To Noise Ratio, A-Weighted, Av=2dB, RL=32Ω,
Po=25mW
Single Ended
Phantom Ground
90
90
Noise
Output Noise voltage, A-Weighted, Av=2dB
Single Ended
Phantom Ground
23
23
G
Digital Gain Range In1 & In2 to Out1 & Out2
-34
Digital Gain Stepsize
Gain error tolerance
dB
µVrms
+18
4
dB
+1
dB
34.5
kΩ
Wake up time, Cb=1µF
90
156
ms
Standby time
1
In1 & In2 Input Impedance, All Gain setting
Twu
Tws
-1
dB
30
Zin
25.5
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ F = 217Hz
6/33
mA
mW
0.3
0.3
0.3
0.3
Power Supply Rejection Ratio(1)
F = 217Hz, RL = 16Ω, Av = 2 dB
Vripple = 200mVpp, Input Grounded, Cb = 1µF, Single Ended
Output referenced to Phantom Ground
F = 217Hz, RL = 16Ω, Av = 2 dB
Vripple = 200mVpp, Input Grounded, Cb = 1µF, Single Ended
Output referenced to Ground
Unit
µs
TS4975
Table 7.
Electrical Characteristics
VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTANDBY
Parameter
Supply Current
No input signal, no load, Single Ended, Mode 1-4
No input signal, no load, Single Ended, Mode 5-8
No input signal, no load, Phantom Ground, Mode 1-4
No input signal, no load, Phantom Ground, Mode 5-8
Standby Current (SCL and SDA at VCC level)
No input signal
Voo
Output Offset Voltage
No input signal, RL = 32Ω, Phantom Ground
Po
Output Power
THD+N = 1% Max, f = 1kHz, RL = 16Ω, Single Ended
THD+N = 1% Max, f = 1kHz, RL = 32Ω, Single Ended
THD+N = 1% Max, f = 1kHz, RL = 16Ω, Phantom Ground
THD+N = 1% Max, f = 1kHz, RL = 32Ω, Phantom Ground
THD + N
PSRR
Crosstalk
Min.
92
59
92
59
Total Harmonic Distortion + Noise, Av = 2dB
RL=32Ω, Po=50 mW, 20Hz < F < 20kHz, Single Ended
RL=16Ω, Po=80 mW, 20Hz < F < 20kHz, Single Ended
RL=32Ω, Po=50 mW, 20Hz < F < 20kHz, Phantom Ground
RL=16Ω, Po=80 mW, 20Hz < F < 20kHz, Phantom Ground
Typ.
Max.
3
2
4.6
3.6
4.2
2.8
6.5
5.3
0.6
2
µA
5
50
mV
102
64
98
63
dB
63
Channel Separation, RL = 32Ω, Av = 2 dB with Single Ended
F = 1kHZ, Po=50mW
F = 20Hz to 20kHz, Po=50mW
Channel Separation, RL = 32Ω, Av = 2 dB with Phantom Ground
F = 1kHZ, Po=50mW
F = 20Hz to 20kHz, Po=50mW
103
75
dB
69
69
95
95
ONoise
Output Noise voltage, A-Weighted, Av=2dB
Single Ended
Phantom Ground
23
23
G
Digital Gain Range In1 & In2 to Out1 & Out2
-34
Digital Gain Stepsize
Gain error tolerance
%
63
Signal To Noise Ratio, A-Weighted, Av=2dB, RL=32Ω,
Po=62mW
Single Ended
Phantom Ground
SNR
mA
mW
0.3
0.3
0.3
0.3
Power Supply Rejection Ratio(1)
F = 217Hz, RL = 16Ω, Av = 2 dB
Vripple = 200mVpp, Input Grounded, Cb = 1µF, Single Ended
Output referenced to Phantom Ground
F = 217Hz, RL = 16Ω, Av = 2 dB
Vripple = 200mVpp, Input Grounded, Cb = 1µF, Single Ended
Output referenced to Ground
Unit
dB
µVrms
+18
4
-1
25.5
dB
dB
+1
dB
30
34.5
kΩ
144
ms
Zin
In1 & In2 Input Impedance, All Gain setting
Twu
Wake up time, Cb=1µF
80
Tws
Standby time
1
µs
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ F = 217Hz
7/33
Electrical Characteristics
Figure 2.
TS4975
THD+N versus output power
Figure 3.
10
10
RL = 8 Ω
Out. mode 1 - 8
SE, G = +18dB
1 BW < 125kHz
Tamb = 25°C
Vcc=2.5V
F=20kHz
Vcc=2.5V
F=1kHz
THD + N (%)
THD + N (%)
RL = 8 Ω
Out. mode 1 - 8
SE, G = +2dB
1 BW < 125kHz
Tamb = 25°C
0.1
0.01
Vcc=3.3V
F=1kHz
THD+N versus output power
Vcc=3.3V
F=20kHz
1E-3
1E-3
Vcc=5V
F=20kHz
0.01
Vcc=3.3V
F=1kHz
Vcc=2.5V
F=1kHz
0.01
Output power (W)
Figure 4.
Figure 5.
10
Vcc=2.5V
F=1kHz
THD + N (%)
THD + N (%)
RL = 16Ω
Out. mode 1 - 8
SE, G = +18dB
1 BW < 125kHz
Tamb = 25°C
Vcc=2.5V
F=20kHz
Vcc=3.3V
F=20kHz
Vcc=3.3V
F=1kHz
THD+N versus output power
10
0.1
0.01
1E-3
1E-3
Vcc=5V
F=20kHz
0.01
0.01
Vcc=5V
F=1kHz
Vcc=2.5V
F=20kHz
THD+N versus output power
0.01
Figure 7.
Vcc=3.3V
F=20kHz
Vcc=3.3V
F=1kHz
0.01
THD + N (%)
THD + N (%)
Vcc=5V
F=20kHz
Output power (W)
8/33
0.1
THD+N versus output power
RL = 32Ω
Out. mode 1 - 8
SE, G = +18dB
1 BW < 125kHz
Tamb = 25°C
Vcc=2.5V
F=20kHz
0.1
1E-3
1E-3
Vcc=5V
F=1kHz
10
RL = 32Ω
Out. mode 1 - 8
SE, G = +2dB
1 BW < 125kHz
Tamb = 25°C
Vcc=2.5V
F=1kHz
Vcc=5V
F=20kHz
Output power (W)
10
0.01
Vcc=2.5V
F=1kHz
Vcc=3.3V
F=1kHz
1E-3
1E-3
0.1
Vcc=3.3V
F=20kHz
0.1
Output power (W)
Figure 6.
0.1
Output power (W)
THD+N versus output power
RL = 16Ω
Out. mode 1 - 8
SE, G = +2dB
1 BW < 125kHz
Tamb = 25°C
Vcc=5V
F=1kHz
Vcc=5V
F=20kHz
1E-3
1E-3
0.1
Vcc=2.5V
F=20kHz
0.1
0.01
Vcc=5V
F=1kHz
Vcc=3.3V
F=20kHz
0.1
0.01
Vcc=5V
F=1kHz
0.1
Vcc=2.5V
F=20kHz
1E-3
1E-3
Vcc=5V
F=20kHz
Vcc=2.5V
F=1kHz
Vcc=3.3V
F=20kHz
Vcc=3.3V
F=1kHz
0.01
Output power (W)
Vcc=5V
F=1kHz
0.1
TS4975
Figure 8.
Electrical Characteristics
THD+N versus output power
Figure 9.
10
10
Vcc=2.5V
F=20kHz
Vcc=2.5V
F=1kHz
0.1
0.01
Vcc=3.3V
F=1kHz
Vcc=3.3V
F=20kHz
1E-3
1E-3
Vcc=2.5V
F=20kHz
Vcc=5V
F=20kHz
0.01
Vcc=5V
F=1kHz
0.1
0.1
Vcc=2.5V
F=1kHz
1
Vcc=2.5V
F=1kHz
THD + N (%)
THD + N (%)
Vcc=3.3V
F=20kHz
Vcc=2.5V
F=20kHz
Vcc=3.3V
F=20kHz
Vcc=5V
F=20kHz
0.01
0.1
0.01
Vcc=5V
F=1kHz
Vcc=2.5V
F=20kHz
0.01
Figure 13. THD+N versus output power
10
RL = 32Ω
Out. mode 1 - 8
PHG, G = +2dB
1 BW < 125kHz
Tamb = 25°C
Vcc=2.5V
F=20kHz
1
0.1
Vcc=5V
F=20kHz
Vcc=3.3V
F=20kHz
Vcc=3.3V
F=1kHz
0.01
Output power (W)
THD + N (%)
THD + N (%)
0.1
Output power (W)
10
1E-3
1E-3
Vcc=5V
F=1kHz
Vcc=5V
F=20kHz
1E-3
1E-3
0.1
Figure 12. THD+N versus output power
Vcc=2.5V
F=1kHz
Vcc=3.3V
F=1kHz
RL = 16Ω
Out. mode 1 - 8
PHG, G = +18dB
BW < 125kHz
Tamb = 25 °C
Output power (W)
0.01
0.1
10
0.1
1E-3
1E-3
0.01
Figure 11. THD+N versus output power
10
Vcc=3.3V
F=1kHz
Vcc=5V
F=1kHz
Vcc=5V
F=20kHz
Output power (W)
Figure 10. THD+N versus output power
0.01
Vcc=3.3V
F=1kHz
RL = 8 Ω
0.01 Out. mode 1 - 8
SE, G = +18dB
BW < 125kHz
Tamb = 25°C
1E-3
1E-3
Output power (W)
RL = 16Ω
Out. mode 1 - 8
PHG, G = +2dB
1 BW < 125kHz
Tamb = 25 °C
Vcc=3.3V
F=20kHz
1
Vcc=2.5V
F=1kHz
THD + N (%)
THD + N (%)
RL = 8 Ω
Out. mode 1 - 8
PHG, G = +2dB
1 BW < 125kHz
Tamb = 25°C
THD+N versus output power
RL = 32 Ω
Out. mode 1 - 8
PHG, G = +18dB
BW < 125kHz
Tamb = 25°C
0.1
Vcc=2.5V
0.01 F=1kHz
Vcc=5V
F=1kHz
0.1
Vcc=2.5V
F=20kHz
1E-3
1E-3
Vcc=5V
F=20kHz
Vcc=3.3V
F=20kHz
Vcc=3.3V
F=1kHz
0.01
Vcc=5V
F=1kHz
0.1
Output power (W)
9/33
Electrical Characteristics
TS4975
Figure 14. THD+N versus frequency
Figure 15. THD+N versus frequency
10
RL = 8 Ω
Output mode 1 - 8
Single Ended
G = +2dB
1 BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=20mW
Vcc=3.3V
P=40mW
Vcc=5V
P=110mW
THD + N (%)
THD + N (%)
10
0.1
0.01
RL = 8Ω
Output mode 1 - 8
Single Ended
G = +18dB
1 BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=20mW
100
1000
0.01
10000
100
Vcc=3.3V
P=30mW
Vcc=5V
P=80mW
THD + N (%)
THD + N (%)
10
RL = 16 Ω
Output mode 1 - 8
Single Ended
G = +2dB
BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=15mW
0.1
1
RL = 16Ω
Output mode 1 - 8
Single Ended
G = +18dB
BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=15mW
100
1000
0.01
10000
100
1000
10000
Figure 19. THD+N versus frequency
10
RL = 32Ω
Output mode 1 - 8
Single Ended
G = +2dB
BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=10mW
Vcc=3.3V
P=20mW
Vcc=5V
P=50mW
0.1
THD + N (%)
10
THD + N (%)
Vcc=5V
P=80mW
Frequency (Hz)
Figure 18. THD+N versus frequency
1
RL = 32 Ω
Output mode 1 - 8
Single Ended
G = +18dB
BW < 125kHz
Tamb = 25°C
Vcc=2.5V
P=10mW
Vcc=3.3V
P=20mW
Vcc=5V
P=50mW
0.1
100
1000
Frequency (Hz)
10/33
Vcc=3.3V
P=30mW
0.1
Frequency (Hz)
0.01
10000
Figure 17. THD+N versus frequency
10
1
1000
Frequency (Hz)
Figure 16. THD+N versus frequency
0.01
Vcc=5V
P=110mW
0.1
Frequency (Hz)
1
Vcc=3.3V
P=40mW
10000
0.01
100
1000
Frequency (Hz)
10000
TS4975
Electrical Characteristics
Figure 20. THD+N versus frequency
Figure 21. THD+N versus frequency
10
RL = 8Ω
Output mode 1 - 8
Phantom Ground
G = +2dB
1 BW < 125kHz
Tamb = 25°C
Vcc=2.5V
P=20mW
Vcc=3.3V
P=40mW
Vcc=5V
P=110mW
THD + N (%)
THD + N (%)
10
0.1
RL = 8Ω
Output mode 1 - 8
Phantom Ground
G = +18dB
1 BW < 125kHz
Tamb = 25°C
Vcc=3.3V
P=40mW
Vcc=2.5V
P=20mW
0.1
Vcc=5V
P=110mW
0.01
100
1000
0.01
10000
100
Frequency (Hz)
Figure 22. THD+N versus frequency
Vcc=3.3V
P=30mW
Vcc=5V
P=80mW
THD + N (%)
THD + N (%)
10
RL = 16Ω
Output mode 1 - 8
Phantom Ground
G = +2dB
BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=15mW
0.1
0.01
1
RL = 16 Ω
Output mode 1 - 8
Phantom Ground
G = +18dB
BW < 125kHz
Tamb = 25°C
Vcc=2.5V
P=15mW
100
1000
0.01
10000
100
1000
10000
Figure 25. THD+N versus frequency
10
RL = 32 Ω
Output mode 1 - 8
Phantom Ground
G = +2dB
BW < 125kHz
Tamb = 25°C
Vcc=2.5V
P=10mW
Vcc=3.3V
P=20mW
Vcc=5V
P=50mW
0.1
THD + N (%)
10
THD + N (%)
Vcc=5V
P=80mW
Frequency (Hz)
Figure 24. THD+N versus frequency
0.01
Vcc=3.3V
P=30mW
0.1
Frequency (Hz)
1
10000
Figure 23. THD+N versus frequency
10
1
1000
Frequency (Hz)
1
0.1
100
1000
Frequency (Hz)
10000
0.01
RL = 32 Ω
Output mode 1 - 8
Phantom Ground
G = +18dB
BW < 125kHz
Tamb = 25 °C
Vcc=2.5V
P=10mW
100
Vcc=3.3V
P=20mW
1000
Vcc=5V
P=50mW
10000
Frequency (Hz)
11/33
Electrical Characteristics
TS4975
Figure 26. Output power versus power supply Figure 27. Output power versus power supply
voltage
voltage
220
F = 1kHz
160 Output mode 1 - 8
Single Ended
140
BW < 125 kHz
120 Tamb = 25°C
Output power at 10% THD + N (mW)
Output power at 1% THD + N (mW)
180
8Ω
16 Ω
100
32 Ω
80
60
40
20
64Ω
0
2.5
3.0
3.5
4.0
4.5
5.0
F = 1kHz
Output mode 1 - 8
180 Single Ended
160 BW < 125 kHz
Tamb = 25°C
140
200
120
16 Ω
32 Ω
100
80
60
40
20
0
2.5
5.5
8Ω
64 Ω
3.0
3.5
Vcc (V)
4.0
4.5
5.0
5.5
Vcc (V)
Figure 28. Output power versus power supply Figure 29. Output power versus power supply
voltage
voltage
160
140
120
220
F = 1kHz
Output mode 1 - 8
Phantom Ground
BW < 125 kHz
Tamb = 25°C
100
8Ω
16 Ω
32Ω
80
60
40
20
0
2.5
64Ω
3.0
3.5
4.0
Vcc (V)
12/33
Output power at 10% THD + N (mW)
Output power at 1% THD + N (mW)
180
4.5
5.0
5.5
F = 1kHz
Output mode 1 - 8
180 Phantom Ground
160 BW < 125 kHz
Tamb = 25°C
140
200
120
8Ω
16Ω
32 Ω
100
80
60
40
20
0
2.5
64 Ω
3.0
3.5
4.0
Vcc (V)
4.5
5.0
5.5
TS4975
Electrical Characteristics
Figure 30. PSSR versus frequency
Figure 31. PSSR versus frequency
0
0
Vcc = 2.5V
RL ≥ 16Ω
Output mode 1 - 8
SE, Inp. grounded
Vripple = 200mVpp
-20
PSRR (dB)
-30
-10
-20
-30
G=+18dB
PSRR (dB)
-10
-40
G=+10dB G=+2dB
-50
-60
-70
Vcc = 2.5V
RL ≥ 16Ω
Output mode 1 - 8
PHG, Inp. grounded
Vripple = 200mVpp
-40
G=+10dB
-50
-60
-70
-80
-80
G=-34dB
G=-10dB
-90
G=-2dB
-90
G=-2dB
-100
20
100
1000
-100
20
10000
100
Frequency (Hz)
10000
0
Vcc = 3.3V
RL ≥ 16 Ω
Output mode 1 - 8
SE, Inp. grounded
Vripple = 200mVpp
-30
-10
-20
-30
G=+18dB
PSRR (dB)
-20
PSRR (dB)
1000
G=-34dB
Figure 33. PSSR versus frequency
0
-10
-40
G=+10dB
-50
G=+2dB
-60
-70
Vcc = 3.3V
RL ≥ 16 Ω
Output mode 1 - 8
PHG, Inp. grounded
Vripple = 200mVpp
-40
G=+18dB
G=+10dB G=+2dB
-50
-60
-70
-80
G=-10dB
-90
100
1000
G=-2dB
-90
G=-34dB
G=-2dB
-100
20
-100
20
10000
100
Frequency (Hz)
-30
-10
-20
-30
G=+18dB
-40
G=+10dB G=+2dB
-50
-60
-70
-80
Vcc = 5V
RL ≥ 16 Ω
Output mode 1 - 8
PHG, Inp. grounded
Vripple = 200mVpp
G=+18dB
-40
G=+10dB
-50
G=+2dB
-60
-70
-80
G=-10dB
-90
-100
20
10000
0
Vcc = 5V
RL ≥ 16Ω
Output mode 1 - 8
SE, Inp. grounded
Vripple = 200mVpp
PSRR (dB)
-20
1000
G=-34dB
Figure 35. PSSR versus frequency
0
-10
G=-10dB
Frequency (Hz)
Figure 34. PSSR versus frequency
PSRR (dB)
G=-10dB
Frequency (Hz)
Figure 32. PSSR versus frequency
-80
G=+18dB
G=+2dB
G=-34dB
G=-2dB
100
1000
Frequency (Hz)
10000
G=-2dB
-90
-100
20
100
G=-10dB
1000
G=-34dB
10000
Frequency (Hz)
13/33
Electrical Characteristics
TS4975
Figure 36. Crosstalk versus frequency
Figure 37. Crosstalk versus frequency
0
Vcc = 2.5V
Output mode 1
-20 Single Ended
G = +2dB
-40 Tamb = 25°C
-10
RL=16 Ω
Po=15mW
-60
RL=32Ω
Po=10mW
-80
Crosstalk Level (dB)
Crosstalk Level (dB)
0
-100
-120
-20
Vcc = 2.5V
Output mode 1
Phantom Ground
G = +2dB
Tamb = 25 °C
-30
-40
-60
-70
100
1000
-80
10000
100
Frequency (Hz)
0
-10
RL=16 Ω
Po=30mW
RL=32Ω
Po=20mW
Crosstalk Level (dB)
Crosstalk Level (dB)
Vcc = 3.3V
Output mode 1
-20 Single Ended
G = +2dB
-40 Tamb = 25°C
-80
-100
-20
Vcc = 3.3V
Output mode 1
Phantom Ground
G = +2dB
Tamb = 25 °C
-30
-40
-60
-70
100
1000
-80
10000
100
0
-10
RL=16 Ω
Po=80mW
RL=32Ω
Po=50mW
-100
Crosstalk Level (dB)
Crosstalk Level (dB)
Vcc = 5V
Output mode 1
-20 Single Ended
G = +2dB
-40 Tamb = 25°C
-80
10000
Figure 41. Crosstalk versus frequency
0
-60
1000
Frequency (Hz)
Figure 40. Crosstalk versus frequency
-20
Vcc = 5V
Output mode 1
Phantom Ground
G = +2dB
Tamb = 25 °C
-30
-40
RL=16 Ω
Po=80mW
RL=32Ω
Po=50mW
-50
-60
-70
100
1000
Frequency (Hz)
14/33
RL=16 Ω
Po=30mW
RL=32Ω
Po=20mW
-50
Frequency (Hz)
-120
10000
Figure 39. Crosstalk versus frequency
0
-60
1000
Frequency (Hz)
Figure 38. Crosstalk versus frequency
-120
RL=16 Ω
Po=15mW
RL=32Ω
Po=10mW
-50
10000
-80
100
1000
Frequency (Hz)
10000
TS4975
Electrical Characteristics
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
RL = 32Ω
RL = 16Ω
Out. mode 1 - 8
SE, G = +2dB
Unweighted filter (20Hz to 20kHz)
THD+N < 0.5%
Tamb = 25°C
2.5
3.3
Figure 43. SNR versus power supply voltage
SNR (dB)
SNR (dB)
Figure 42. SNR versus power supply voltage
5
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
RL = 32Ω
RL = 16Ω
Out. mode 1 - 8
SE, G = +2dB
Weighted filter type A
THD+N < 0.5%
Tamb = 25 °C
2.5
Vcc (V)
RL = 32 Ω
RL = 16 Ω
Out. mode 1 - 8
SE, G = +18dB
Unweighted filter (20Hz to 20kHz)
THD+N < 0.5%
Tamb = 25 °C
2.5
3.3
5
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
RL = 32 Ω
RL = 16 Ω
Out. mode 1 - 8
SE, G = +18dB
Weighted filter type A
THD+N < 0.5%
Tamb = 25 °C
2.5
Vcc (V)
3.3
Vcc (V)
5
Figure 47. SNR versus power supply voltage
SNR (dB)
SNR (dB)
RL = 32Ω
RL = 16Ω
Out. mode 1 - 8
PHG, G = +2dB
Unweighted filter (20Hz to 20kHz)
THD+N < 0.5%
Tamb = 25°C
2.5
3.3
Vcc (V)
Figure 46. SNR versus power supply voltage
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
5
Figure 45. SNR versus power supply voltage
SNR (dB)
SNR (dB)
Figure 44. SNR versus power supply voltage
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
3.3
Vcc (V)
5
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
RL = 32Ω
RL = 16Ω
Out. mode 1 - 8
PHG, G = +2dB
Weighted filter type A
THD+N < 0.5%
Tamb = 25°C
2.5
3.3
5
Vcc (V)
15/33
Electrical Characteristics
TS4975
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
RL = 32 Ω
RL = 16 Ω
Out. mode 1 - 8
PHG, G = +18dB
Unweighted filter (20Hz to 20kHz)
THD+N < 0.5%
Tamb = 25 °C
2.5
Figure 49. SNR versus power supply voltage
SNR (dB)
SNR (dB)
Figure 48. SNR versus power supply voltage
3.3
5
110
108
106
104
102
100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
RL = 32 Ω
RL = 16 Ω
Out. mode 1 - 8
PHG, G = +18dB
Weighted filter type A
THD+N < 0.5%
Tamb = 25 °C
2.5
3.3
Vcc (V)
Figure 50. Frequency response
Figure 51. Current consumption versus power
supply voltage
20
6
No loads
Tamb = 25 °C
18
Vcc = 5V, 3.3V, 2.5V
G = +18dB
10
8
Vcc = 5V, 3.3V, 2.5V
G = +2dB
6
4
PHG, Out. mode 5, 6, 7, 8
4
Output mode 1 - 8
RL = 32, 16 Ω
Cin = 330nF
SE, PHG
BW < 125kHz
Tamb = 25°C
12
Icc (mA)
14
Output level (dB)
PHG, Out. Mode 1, 2, 3, 4
5
16
3
Reset state
2
SE, Out. mode 1, 2, 3, 4
1
SE, Out. mode 5, 6, 7, 8
2
0
5
Vcc (V)
20
100
1000
0
10000
0
1
2
Frequency (Hz)
3
4
5
Vcc (V)
Figure 52. 3dB lower cut off frequency versus Figure 53. 3dB lower cut off frequency versus
input capacitance
output capacitance
Minimum Input
Impedance
10
Typical Input
Impedance
Maximum Input
Impedance
0.1
1
Input Capacitor Cin (µF)
16/33
100
All gain setting
Tamb=25 °C
Low -3 dB Cut Off frequency (Hz)
Low -3dB Cut Off Frequency (Hz)
100
All gain setting
Tamb = 25 °C
10
RL=16Ω
RL=32Ω
1
100
1000
Output capacitor Cout (µF)
TS4975
Electrical Characteristics
Figure 54. Power dissipation versus output
power (one channel
Figure 55. Power dissipation versus output
power (one channel
70
120
50
Power Dissipation (mW)
Power Dissipation (mW)
Vcc = 2.5V
F = 1kHz
60
THD+N < 1%
RL=16Ω , PHG
RL=32Ω , PHG
40
30
RL=16 Ω , SE
20
RL=32Ω , SE
10
Vcc = 3.3V
110 F = 1kHz
100 THD+N < 1%
90
80
RL=16 Ω , PHG
70
RL=32Ω , PHG
60
RL=16Ω , SE
50
40
30
RL=32 Ω , SE
20
10
0
0
5
10
15
20
0
25
0
5
10
Output Power (mW)
RL=16 Ω , SE
RL=32 Ω , SE
50
60
70
Output Power (mW)
25
30
35
40
45
80
90 100 110
Figure 57. Power derating curves
Flip-Chip Package Power Dissipation (W)
Power Dissipation (mW)
RL=16 Ω , PHG
RL=32 Ω , PHG
40
20
Output Power (mW)
Figure 56. Power dissipation versus output
power (one channel
280
Vcc = 5V
260
F = 1kHz
240
THD+N < 1%
220
200
180
160
140
120
100
80
60
40
20
0
0 10 20 30
15
1.4
1.2
Heat sink surface = 125mm
2
1.0
0.8
0.6
0.4
No Heat sink
0.2
0.0
0
25
50
75
100
Ambiant Temperature (°C)
125
150
17/33
Application Information
4
TS4975
Application Information
The TS4975 integrates 2 monolithic power amplifiers. The amplifier output can be configured
as either SE (single-ended) capacitively-coupled output or PHG (phantom ground) output.
Figure 1 on page 3 shows schemas of these two configurations.
In a SE configuration an output capacitor, Cout, on each output is needed. This output coupling
capacitor blocks the Vcc/2 voltage (to which the output amplifier is biased) and couples the
audio signal to the load.
In a PHG configuration, internal buffers are connected to PHG1 and PHG2 pins biased to the
Vcc/2 voltage, and output amplifiers are also biased to the Vcc/2 voltage. Therefore, no output
capacitors are needed. The advantage of the PHG configuration is fewer external components
compared with a SE configuration. However, note that the device has higher power dissipation
(see Power dissipation and efficiency on page 22).
This chapter gives information on how to configure the TS4975 in application.
4.1
I²C bus interface
Table 8 summarizes the pin descriptions for the I²C bus interface.
Table 8.
I²C bus interface pin descriptions
Pin
4.1.1
Functional Description
SDA
This is the serial data input pin
SCL
This is the clock input pin
ADD
User-setable portion of device’s I2C address
I²C bus operation
The TS4975 uses a serial bus, which conforms to the I²C protocol, to control the chip’s
functions with two wires: Clock and Data. The Clock line is uni-directional. The Data line is bidirectional (open-collector) with an external chip pull-up resistor (typically 10 kOhm). The
maximum clock frequency specified by the I²C standard is 400kHz.
Table 9.
Device slave address
A6
A5
A4
A3
A2
A1
A0
Rw
1
1
0
0
1
1
A0
X
The host MCU can write into the TS4975 control registers and read from the control registers.
The slave address of the TS4975 for writing is CC or CE hex. In order to write data into the
TS4975, after the “start” message, the MCU must send the following data:
18/33
●
send the I²C address slave byte with a low level for the R/W bit
●
send the data
TS4975
Application Information
Figure 58. I²C write operation
SLAVE ADDRESS
SDA
S
1
1
0
0
1
1 A0
CONTROL REGISTERS
A
0
D7 D6 D5 D4 D3 D2 D1 D0 A
Volume Control
settings
Start condition
Output
Mode settings
R/W
Acknowledge
from Slave
Phantom Ground
settings
P
Stop condition
Acknowledge
from Slave
All bytes are sent with MSB bit first. The transfer of written data ends with a “stop” message.
When transmitting several data, the data can be written with no need to repeat the “start”
message and slave address.
The slave address of the TS4975 for reading is CD or CF hex. In order to read data from the
TS4975, after the “start” message, the MCU must send and receive the following data:
●
send the I²C address slave byte with a high level for the R/W bit
●
receive the data (control register value)
All bytes are read with MSB bit first. The transfer of read data is ended with “stop” message.
When transmitting several data, the data can be read with no need to repeat the “start”
message and slave address. In this case the value of control register is read repeatedly.
When thermo shutdown or pop and click reduction is active, specific value is read from the
TS4975 (See 4: Application Information on page 18).
Table 10.
Ouput mode selection: G from -34 dB to + 18dB (by steps of 4dB)(1)
Output Mode #
Headphone Output 1
Headphone Output 2
0
SD
SD
1
G x In1
G x In2
2
G x In2
G x In1
3
G x In1
G x In1
4
G x In2
G x In2
5
SD
G x In1
6
SD
G x In2
7
G x In1
SD
8
G x In2
SD
1. SD = Shutdown Mode
In1 = Audio Input 1
In2= Audio Input2
G = Gain from Audio Input 1and Input 2 to Output1 and Output2
19/33
Application Information
4.1.2
TS4975
Gain Register Operation
The gain of the TS4975 ranges from -34dB to +18 dB. At Power-up, both the right and left
channels are set in Stand-by mode.
Table 11.
Gain settings truth table
G: Gain (dB) #
D7
(MSB)
D6
D5
D4
-34
0
0
0
1
-30
0
0
1
0
-26
0
0
1
1
-22
0
1
0
0
-18
0
1
0
1
-14
0
1
1
0
-10
0
1
1
1
-6
1
0
0
0
-2
1
0
0
1
+2
1
0
1
0
+6
1
0
1
1
+10
1
1
0
0
+14
1
1
0
1
+18
1
1
1
0
Table 12.
20/33
Output mode settings truth table
D3: PHG
on / off
D2
D1
D0
COMMENTS
0
X
X
X
PHG off
1
x
x
x
PHG on
x
0
0
0
MODE 1
X
0
0
1
MODE 2
X
0
1
0
MODE 3
X
0
1
1
MODE4
X
1
0
0
MODE 5
X
1
0
1
MODE 6
X
1
1
0
MODE 7
X
1
1
1
MODE 8
TS4975
Application Information
Table 13.
Stand-by mode I²C condition
D7
(MSB)
0
Table 14.
4.1.3
D6
D5
D4
D3
D2
D1
D0
0
0
0
X
X
X
X
I²C control byte states
D7
(MSB)
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
x
X
X
X
Undefined State
Acknowledge
The number of data bytes transferred between the start and the stop conditions from the CPU
master to the TS4975 slave is not limited. Each byte of eight bits is followed by one
acknowledge bit.
The TS4975 which is addressed, generates an acknowledge after the reception of each byte
that has been clocked out.
21/33
Application Information
4.2
TS4975
Power dissipation and efficiency
Hypotheses:
●
Voltage and current in the load are sinusoidal (Vout and Iout).
●
Supply voltage is a pure DC source (Vcc).
Regarding the load we have:
VOUT = V PEAK sin ωt ( V )
and
V OUT
I OUT = -------------- ( A )
RL
and
2
V PEAK
P OUT = ----------------- ( A )
2RL
Single-ended configuration:
The average current delivered by the supply voltage is:
π
V PEAK
1 V PEAK
Icc AVG = ------ ∫ ----------------- sin ( t ) dt = ----------------- ( A )
RL
πR L
2π
0
Figure 59. Current delivered by supply voltage in single-ended model
The power delivered by supply voltage is:
Psupply = V CC ICC
AVG
(W)
So, the power dissipation by each amplifier is
P diss = P supply – P OUT ( W )
2V CC
P diss = ------------------- P OUT – POUT ( W )
π RL
and the maximum value is obtained when:
∂Pdiss
= 0
∂ P OUT
22/33
TS4975
Application Information
and its value is:
2
P diss
Note:
MAX
V CC
= ------------(W)
2
π RL
This maximum value depends only on power supply voltage and load values.
The efficiency is the ratio between the output power and the power supply:
πV PEAK
P OUT
η = ------------------- = --------------------Psupply
2VCC
The maximum theoretical value is reached when Vpeak = Vcc/2, so
π
η = --- = 78.5%
4
Phantom ground configuration:
The average current delivered by the supply voltage is:
π
Icc AVG
2V PEAK
1 V PEAK
= --- ∫ ----------------- sin ( t ) dt = --------------------- ( A )
RL
πR L
π
0
Figure 60. Current delivered by supply voltage in phantom ground mode
The power delivered by supply voltage is:
Psupply = V CC ICC
AVG
(W)
Then, the power dissipation by each amplifier is
2 2V CC
P diss = ---------------------- P OUT – POUT ( W )
π RL
and the maximum value is obtained when:
∂Pdiss
= 0
∂ P OUT
and its value is:
2
P diss
Note:
MAX
2V CC
= --------------(W)
2
π RL
This maximum value depends only on power supply voltage and load values.
23/33
Application Information
TS4975
The efficiency is the ratio between the output power and the power supply:
P OUT
πV PEAK
η = ------------------- = --------------------Psupply
4VCC
The maximum theoretical value is reached when Vpeak = Vcc/2, so
π
η = --- = 39.25%
8
The TS4975 is stereo amplifier so it has two independent power amplifiers. Each amplifier
produces heat due to its power dissipation. Therefore the maximum die temperature is the sum
of each amplifier’s maximum power dissipation. It is calculated as follows:
●
Pdiss 1 = Power dissipation due to the first channel power amplifier.
●
Pdiss 2 = Power dissipation due to the second channel power amplifier.
●
Total Pdiss = Pdiss 1 + Pdiss 2 (W)
In most cases, Pdiss 1 = Pdiss 2, giving:
TotalPdiss = 2Pdiss1
Single ended configuration:
2 2V CC
TotalPdiss = ---------------------- P OUT – 2P OUT ( W )
π RL
Phantom ground configuration:
4 2V CC
TotalPdiss = ---------------------- P OUT – 2P OUT ( W )
π RL
4.3
Low frequency response
Input capacitor Cin
The input coupling capacitor blocks the DC part of the input signal at the amplifier input. In the
low-frequency region, Cin starts to have an effect. Cin with Zin forms a first-order, high-pass
filter with -3 dB cut-off frequency.
1
F CL = ------------------------ ( Hz )
2πZin C in
Zin is the input impedance of the corresponding input (30 kΩ for In1 & In2).
Note:
For all inputs, the impedance value remains for all gain settings. This means that the lower cutoff frequency doesn’t change with gain setting. Note also that 30 kΩ is a typical value and there
is tolerance around this value (see 3: Electrical Characteristics on page 4).
In Figure 50 you could easily establish the Cin value for a -3dB cut-off frequency required.
24/33
TS4975
Application Information
Output capacitor Cout
In single-ended mode the external output coupling capacitors Cout are needed. This coupling
capacitor Cout with the output load RL also forms a first-order high-pass filter with -3 dB cut off
frequency.
1
FCL = -------------------------- ( Hz )
2πR L C out
See Figure 51 to establish the Cout value for a -3dB cut-off frequency required.
These two first-order filters form a second-order high-pass filter. The -3 dB cut-off frequency of
these two filters should be the same, so the following formula should be respected:
1
1
------------------------ ≅ -------------------------2πZ in C in 2πR L C out
4.4
Decoupling of the circuit
Two capacitors are needed to properly bypass the TS4975 — a power supply capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has a strong influence on the THD+N in high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 1 µF, you could expect similar THD+N performances like shown in the datasheet.
If Cs is lower than 1 µF, THD+N increases in high frequency and disturbances on power supply
rail are less filtered.
To the contrary, if Cs is higher than 1 µF, those disturbances an the power supply rail are more
filtered.
Cb has an influence on THD+N in lower frequency, but its value is critical on the final result of
PSRR with input grounded in lower frequency:
●
If Cb is lower than 1 µF, THD+N increases at lower frequencies and the PSRR worsens
upwards.
●
If Cb is higher than 1 µF, the benefit on THD+N and PSRR in the lower frequency range is
small.
The value of Cb also has an influence on startup time.
4.5
Power-on reset
When power is applied to Vdd, an internal Power On Reset holds the TS4975 in a reset state
until the supply voltage reaches its nominal value.
The Power On Reset has a typical threshold of 1.75V.
25/33
Application Information
4.6
TS4975
Notes on PSRR measurement
What is PSRR?
The PSRR is the Power Supply Rejection Ratio. The PSRR of a device is the ratio between a
power supply disturbance and the result on the output. In other words, the PSRR is the ability of
a device to minimize the impact of power supply disturbance to the output.
How we measure the PSRR?
The PSRR was measured according to the schematic shown in Figure 61.
Figure 61. PSRR measurement schematic
Principles of operation
●
The DC voltage supply (Vcc) is fixed
●
The AC sinusoidal ripple voltage (Vripple) is fixed
●
No bypasss capacitor Cs is used
The PSRR value for each frequency is calculated as:
RMS ( Output )
PSRR = 20Log --------------------------------- ( dB )
RMS ( Vripple )
RMS is a rms selective measurement.
26/33
TS4975
4.7
Application Information
Startup time
When the TS4975 is controlled to switch to full standby (output mode 0) to another output
mode, a delay is necessary to stabilize the DC bias.This length of this delay depends on the Cb
and Vcc values. A typical value can be calculated by following formula:
V CC
t wu = C b × ------------------------- × 50000 + 0.008 ( s )
V CC – 1.2
This formula assumes that Cb voltage is equal to 0 V. If the Cb voltage is not equal 0 V, the
startup time will be always lower.
In Figure 50 you could easily establish typical startup time for given supply voltage and bypass
capacitor Cb.
Figure 62. Typical startup time versus bypass capacitance
400
350
Startup time (ms)
300
Vcc=2.5V
250
200
Vcc=3.3V
150
100
Vcc=5V
50
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
4.0
Bypass capacitor Cb (µF)
4.8
Pop and click performance
The TS4975 has internal pop and click reduction circuitry which eliminates the output
transients, for example during switch-on or switch-off phases, during a switch from an output
mode to another or during change in volume. The performance of this circuitry is closely linked
to the values of the input capacitor Cin, the output capacitor Cout (for Single-Ended
configuration) and the bias voltage bypass capacitor Cb.
The value of Cin and Cout is determined by the the lower cut-off frequency value requested.
The value of Cb will affect the THD+N and PSRR values in lower frequencies.
The TS4975 is optimized to have a low pop and click in the typical schematic configuration (
see Figure 1 on page 3 SE and PHG configurations).
27/33
Application Information
TS4975
During the device start-up period when the pop and click reduction is active, the value FX hex
(1111xxxx bin) can be read from the internal device registry.
Once the device is fully operational and the pop and click is inactive, the last value of control
register can be read.
4.9
Thermo shutdown
The TS4975 device has internal protection in case of over temperature by thermal shutdown.
Thermal shutdown is active when the device reaches temperature 150°C.
When thermo shutdown protection is active, value FX hex (1111xxxx bin) can be read from the
internal device registry.
When thermo shutdown protection state disappears, the last value of control register can be
read.
4.10
Demoboard
A demoboard for the TS4975 is available.
For more information about this demoboard, please refer to Application Note AN2151, which
can be found on www.st.com.
Figure 60 shows the schematic of the demoboard. Figure 61, Figure 62 and Figure 64 show
the component locations, top layer and bottom layer respectively.
28/33
TS4975
Application Information
Figure 63. Demoboard schematic
Vcc1
Vcc1
+
+
Cn1
C2
1µF
U1
Cn6
Vcc
2
14
C1
1µF
Bypass
R1
1k
1
2
3
Bias
IN1
Pre-Amplifier
OUT1 Amplifier
C3
C10
1
IN1
OUT1
+
13
+
330nF
220µF
JP1
1
2
3
4
PHG1 Amplifier
PHG1
12
Mode
Select
1 J1
2
3
PHONEJACK STEREO
PHG2 Amplifier
PHG2
IN2
Pre-Amplifier
10
OUT2 Amplifier
C11
P2
Cn7
HEADER 4
1
2
3
P1
IN1
C4
IN2
6
IN2
OUT2
+
9
+
330nF
Volume control
ADD
SCL
SDA
3
4
Vcc1
5
I2C
GND
8
1
2
3
220µF
R2
1k
Cn8
TS4975
JP2
R3
10k
4
3
2
1
Cn2
Cn4
I2C BUS
Cn3
Vcc1
HEADER 4
SCL SDA
SDA
SDA
Vcc1
R4
10k
R5
10k
SCL
SDA
SCL
Vcc2
Vcc1
R6
360R
U2B
3
Vcc2
Vcc2
R7
10K
15
KP1040
+
GND2
GND2
GND2
TXD
13
8
DTR
11
10
GND
GND2
C7
0.1µF
+
C6
0.1µF
+
GND2
+
RS232
C8
0.1µF
1
3
4
5
2
6
14
T1IN
T2IN
C1+
C1C2+
C2V+
V-
U3
R1OUT
R2OUT
T1OUT
T2OUT
12
9
14
7
13
KP1040
R9
360R
U2C
5
12
6
11
KP1040
ST232
+
C9
0.1µF
R1IN
R2IN
16
1
6
2
7
3
8
4
9
5
Vcc
2
CON1
C5
1µF
GND
16
4
Vcc2
Cn5
15
R8
180R
U2A
1
Vcc2
Vcc2
GND2
GND2
Figure 64. Bottom layer
29/33
Application Information
Figure 65. Top layer
30/33
TS4975
Figure 66. Componens location
TS4975
Package Mechanical Data
Figure 67. TS4975 Footprint Recommendation
500µm
75µm min.
100µm max.
500µm
500µm
Φ=250µm
Track
Φ=400µm typ.
150µm min.
Φ=340µm min.
500µm
5
Package Mechanical Data
Non Solder mask opening
Pad in Cu 18µm with Flash NiAu (2-6µm, 0.2µm max.)
Figure 68. Pin out (top view)
3
OUT1
PHG1
PHG2
OUT2
2
IN1
VCC
GND
IN2
1
BYPASS
SCL
SDA
ADD
C
D
A
B
Figure 69. Marking (top view)
■
Logo: ST
■
Part Number: A75
■
Date Code: YWW
■
The Dot is for marking pin A1
●
E Lead Free symbol
E
A75
YW W
31/33
Package Mechanical Data
TS4975
Figure 70. Flip-chip - 12 bumps
2300µm
1800µm
500µm
■
Die size: 2.3mm x 1.8mm ± 30µm
■
Die height (including bumps): 600µm
■
Bumps diameter: 315µm ±50µm
■
Bump diameter before reflew: 300µm ±10µm
■
Bumps height: 250µm ±40µm
■
Die height: 350µm ±20µm
500µm
600µm
Figure 71. Tape & reel specification (top view)
1.5
4
1
1
A
Die size Y + 70µm
A
8
Die size X + 70µm
4
All dimensions are in mm
User direction of feed
32/33
TS4975
6
Revision History
Revision History
Date
Revision
Changes
November-2004
1
Initial release.
July 2005
2
Product in full production
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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