STMICROELECTRONICS TS4872IJT

TS4872
RAIL TO RAIL INPUT/OUTPUT
1W AUDIO POWER AMPLIFIER WITH STANDBY MODE
■ OPERATING FROM VCC = 2.2V to 5.5V
PIN CONNECTIONS (Top View)
■ RAIL TO RAIL INPUT/OUTPUT
■ 1W OUTPUT POWER @ Vcc=5V, THD=1%,
f=1kHz, with 8Ω Load
TS4872IJT - FLIP CHIP
■ ULTRA LOW CONSUMPTION IN STANDBY
MODE (10nA)
7
■ 75dB PSRR @ 217Hz @ 5 & 2.6V
+
■ ULTRA LOW POP & CLICK
Vin
■ ULTRA LOW DISTORTION (0.05%)
8
6
5
Vcc
STDBY
Vout1
Vout2
■ UNITY GAIN STABLE
■ 8 X170µm BUMPS FLIP CHIP PACKAGE
Vin
GND
1
2
4
BYPASS
3
DESCRIPTION
The TS4872 is an Audio Power Amplifier capable
of delivering 1W of continuous RMS Ouput Power
into 8Ω load @ 5V.
This Audio Amplifier is exhibiting 0.1% distortion
level (THD) from a 5V supply for a Pout = 250mW
RMS. An external standby mode control reduces
the supply current to less than 10nA. An internal
shutdown protection is provided.
The TS4872 has been designed for high quality
audio applications such as mobile phones and to
minimize the number of external components.
TYPICAL APPLICATION SCHEMATIC
The unity-gain stable amplifier can be configured
by external gain setting resistors.
Cfeed
Rfeed
APPLICATIONS
Audio
Input
■ PDAs
Rin
Cin
■ Laptop/Notebook computers
■ Portable Audio Devices
-40, +85°C
7
VinVin+
-
Vout1 8
+
RL
8 Ohms
3
Bypass
5
Standby
Av=-1
+
Vout2
4
Rstb
Package
Marking
J
●
Bias
GND
TS4872IJT
1
Vcc
ORDER CODE
Temperature
Range
Cs
Vcc
■ Mobile Phones (Cellular / Cordless)
Part
Number
Vcc
6
Cb
TS4872
2
YW4872
J = Flip Chip Package - only available in Tape & Reel (JT)
October 2002
1/29
TS4872
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Vi
Parameter
Supply voltage
Input Voltage
1)
2)
Value
Unit
6
V
GND to VCC
V
°C
Toper
Operating Free Air Temperature Range
-40 to + 85
Tstg
Storage Temperature
-65 to +150
°C
150
°C
200
°C/W
Tj
Maximum Junction Temperature
Flip Chip Thermal Resistance Junction to Ambient 3)
Pd
Power Dissipation
ESD
Human Body Model
ESD
Machine Model
Latch-up Latch-up Immunity
Lead Temperature (soldering, 10sec)
Rthja
Internally Limited
2
200
Class A
250
kV
V
°C
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed VCC + 0.3V / G ND - 0.3V
3. Device is protected in case of over temperature by a thermal shutdown active @ 150°C
OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
VICM
Common Mode Input Voltage Range
VCC from 2.6V to 5V
VCC < 2.6V
VSTB
Standby Voltage Input :
Device ON
Device OFF
RL
Rthja
Flip Chip Thermal Resistance Junction to Ambient
2/29
Unit
2.2 to 5.5
V
GND to VCC
VCC / 2
GND ≤ VSTB ≤ 0.5V
VCC - 0.5V ≤ VSTB ≤ VCC
Load Resistor
1. With Heat Sink Surface = 125mm 2
Value
1)
V
4 - 32
Ω
95
°C/W
TS4872
ELECTRICAL CHARACTERISTICS
VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply Current
No input signal, no load
6
8
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
1
W
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio 2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
75
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
ICC
ISTANDBY
THD + N
PSRR
Parameter
Min.
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified) 3)
Symbol
ICC
ISTANDBY
Parameter
Min.
Typ.
Max.
Unit
Supply Current
No input signal, no load
5.5
8
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
1000
nA
5
20
mV
Voo
Output Offset Voltage
No input signal, RL = 8Ω
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
450
mW
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio 2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩs, Vripple = 100mV rms
68
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
THD + N
PSRR
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
3 All electrical values are made by correlation between 2.6v and 5v measurements
3/29
TS4872
ELECTRICAL CHARACTERISTICS
VCC = 2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply Current
No input signal, no load
5.5
8
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
260
mW
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio 2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
75
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
ICC
ISTANDBY
THD + N
PSRR
Parameter
Min.
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
VCC = 2.2V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
Supply Current
No input signal, no load
4.5
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
2
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
180
mW
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio 2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 100mVpp
75
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
ICC
ISTANDBY
THD + N
PSRR
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
4/29
TS4872
Components
Functional Description
Rin
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also
forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Cin
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
Rfeed
Feed back resistor which sets the closed loop gain in conjunction with Rin
Cs
Supply Bypass capacitor which provides power supply filtering
Cb
Bypass pin capacitor which provides half supply filtering
Cfeed
Rstb
Gv
Low pass filter capacitor allowing to cut the high frequency
(low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
Pull-up resistor which fixes the right supply level on the standby pin
Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)
REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF.
2. External resistors are not needed for having better stability when supply @ Vcc down to 3V. By the
way, the quiescent current remains the same.
3. The standby response time is about 1µs.
5/29
TS4872
Fig. 1 : Open Loop Frequency Response
Fig. 2 : Open Loop Frequency Response
0
-60
40
-80
-100
-120
-140
-60
-80
Phase
-100
20
-120
-140
0
-160
-160
-180
-20
-180
-20
-200
-40
0.3
1
10
100
1000
-200
-220
10000
-40
0.3
1
10
Frequency (kHz)
Fig. 3 : Open Loop Frequency Response
60
Vcc = 3.3V
RL = 8Ω
Tamb = 25°C
-60
-100
-120
20
-140
-160
0
Phase (Deg)
Gain (dB)
Phase
Gain
60
-40
-80
40
0
80
-20
Gain (dB)
Gain
Vcc = 3.3V
ZL = 8Ω + 560pF
Tamb = 25°C
Phase
10
100
1000
Frequency (kHz)
10000
-140
-160
-180
-200
-20
-220
-40
0.3
-240
Fig. 5 : Open Loop Frequency Response
Gain
60
Vcc = 2.6V
RL = 8Ω
Tamb = 25°C
60
-40
-60
-120
20
-140
-160
0
10000
Vcc = 2.6V
ZL = 8Ω + 560pF
Tamb = 25°C
Phase
-200
6/29
1
10
100
1000
Frequency (kHz)
10000
-240
-40
-60
-120
-140
-160
0
-180
-200
-20
-220
-220
-40
0.3
-20
-100
20
-180
-20
-240
-80
40
Gain (dB)
-100
100
1000
Frequency (kHz)
0
Gain
Phase (Deg)
Gain (dB)
Phase
10
80
-20
-80
40
1
Fig. 6 : Open Loop Frequency Response
0
80
-60
-120
0
-200
1
-40
-100
20
-220
-40
0.3
-20
-80
40
-180
-20
-220
10000
Fig. 4 : Open Loop Frequency Response
0
80
100
1000
Frequency (kHz)
Phase (Deg)
0
-40
-40
0.3
1
10
100
1000
Frequency (kHz)
10000
-240
Phase (Deg)
20
-20
Vcc = 5V
ZL = 8Ω + 560pF
Tamb = 25°C
Phase (Deg)
Gain
-40
Phase
Gain (dB)
60
Gain (dB)
40
0
-20
Vcc = 5V
RL = 8Ω
Tamb = 25°C
Gain
Phase (Deg)
60
TS4872
Phase
60
100
-100
80
-120
60
Gain (dB)
Gain
-140
40
-160
20
0
-20
-40
0.3
-180
1
10
-140
-160
-180
-20
-220
-40
0.3
10000
-120
20
-200
100
1000
Frequency (kHz)
-100
Phase
40
0
Vcc = 5V
CL = 560pF
Tamb = 25°C
-80
Gain
Gain (dB)
80
-80
Phase (Deg)
100
Fig. 8 : Open Loop Frequency Response
-200
Vcc = 3.3V
CL = 560pF
Tamb = 25°C
1
10
Phase (Deg)
Fig. 7 : Open Loop Frequency Response
-220
100
1000
Frequency (kHz)
10000
-240
Fig. 9 : Open Loop Frequency Response
100
-80
80
-100
Phase
Gain (dB)
Gain
-140
40
-160
20
-180
0
-20
-40
0.3
-200
Vcc = 2.6V
CL = 560pF
Tamb = 25°C
1
10
Phase (Deg)
-120
60
-220
100
1000
Frequency (kHz)
10000
-240
7/29
TS4872
Fig. 10 : Power Supply Rejection Ratio (PSRR)
vs Power Supply
Fig. 11 : Power Supply Rejection Ratio (PSRR)
vs Feedback Capacitor
-10
-30
-50
-20
-30
PSRR (dB)
PSRR (dB)
-40
Rfeed = 22kΩ
Cb = 1µF & 0.1µF
Input = floating
RL = 8Ω
Tamb = 25°C
Vcc=3.3V
Ripple=100mVrms
-60
Vcc=5V
Ripple=200mVrms
-40
-50
Vcc = 5V
Cb = 1µF & 0.1µF
Rfeed = 22kΩ
Rfeed = 22kΩ
Vripple = 200mVms
Input = floating
RL = 8Ω
Tamb = 25°C
Cfeed=0
Cfeed=150pF
Cfeed=330pF
-60
-70
-70
Vcc=2.6V
Ripple=200mVrms
-80
10
100
1000
10000
Frequency (Hz)
-80
10
100000
Fig. 12 : Power Supply Rejection Ratio (PSRR)
vs Bypass Capacitor
-10
Cb=10µF
PSRR (dB)
-30
1000
10000
Frequency (Hz)
Cin=1µF
-40
Cb=47µF
-50
100000
Vcc = 5 & 2.6V
Rfeed = 22k, Rin = 22k
Cb = 1µF
Rg = 100Ω, RL = 8Ω
Tamb = 25°C
Cin=330nF
-20
PSRR (dB)
-20
Vcc = 5 & 2.6V
Rfeed = 22k
Rin = 22k, Cin = 1µF
Rg = 100Ω, RL = 8Ω
Tamb = 25°C
100
Fig. 13 : Power Supply Rejection Ratio (PSRR)
vs Input Capacitor
-10
Cb=1µF
Cfeed=680pF
Cin=220nF
-30
-40
Cin=100nF
-60
-50
-70
Cin=22nF
Cb=100µF
-80
10
100
1000
10000
100000
Fig. 14 : Power Supply Rejection Ratio (PSRR)
vs Feedback Resistor
-10
PSRR (dB)
-30
-40
-50
Vcc = 5V
Cb = 1µF & 0.1µF
Vripple = 200mVrms
Input = floating
RL = 8Ω
Tamb = 25°C
Rfeed=110kΩ
Rfeed=47kΩ
Rfeed=22kΩ
-60
-70
Rfeed=10kΩ
-80
10
8/29
100
100
1000
Frequency (Hz)
Frequency (Hz)
-20
-60
10
1000
10000
Frequency (Hz)
100000
10000
100000
TS4872
Fig. 15 : Pout @ THD + N = 1% vs Supply
Voltage vs RL
Fig. 16 : Pout @ THD + N = 10% vs Supply
Voltage vs RL
1.2
1.0
2.0
8Ω
Gv = 2 & 10
Cb = 1µF
F = 1kHz
BW < 125kHz
Tamb = 25°C
Output power @ 10% THD + N (W)
Output power @ 1% THD + N (W)
1.4
6Ω
4Ω
0.8
16Ω
0.6
0.4
0.2
32Ω
0.0
2.5
3.0
3.5
4.0
4.5
Gv = 2 & 10
Cb = 1µF
F = 1kHz
BW < 125kHz
Tamb = 25°C
1.8
1.6
1.4
4Ω
1.2
1.0
16Ω
0.8
0.6
0.4
0.2
32Ω
0.0
2.5
5.0
8Ω
3.0
3.5
4.5
5.0
Fig. 18 : Power Dissipation vs Pout
1.4
0.6
Vcc=5V
1.2 F=1kHz
THD+N<1%
Vcc=3.3V
F=1kHz
0.5 THD+N<1%
RL=4Ω
Power Dissipation (W)
Power Dissipation (W)
Fig. 17 : Power Dissipation vs Pout
1.0
0.8
0.6
RL=8Ω
0.4
RL=4Ω
0.4
0.3
0.2
RL=8Ω
0.1
0.2
RL=16Ω
0.0
0.0
0.2
0.4
0.6
0.8
RL=16Ω
1.0
1.2
0.0
0.0
1.4
0.2
Output Power (W)
Flip-Chip Package Power Dissipation (W)
Vcc=2.6V
F=1kHz
THD+N<1%
RL=4Ω
0.25
0.20
0.15
RL=8Ω
0.10
0.05
0.00
0.0
RL=16Ω
0.1
0.2
Output Power (W)
0.6
0.8
Fig. 20 : Power Derating Curves
0.40
0.30
0.4
Output Power (W)
Fig. 19 : Power Dissipation vs Pout
Power Dissipation (W)
4.0
Vcc (V)
Vcc (V)
0.35
6Ω
0.3
0.4
1.4
Heat sink surface = 125mm
(See demoboard)
1.2
2
1.0
0.8
0.6
0.4
No Heat sink
0.2
0.0
0
25
50
75
100
125
150
Ambiant Temperature ( C)
9/29
TS4872
Fig. 21 : THD + N vs Output Power
Fig. 22 : THD + N vs Output Power
10
Rl = 4Ω, Vcc = 5V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz, Tamb = 25°C
20kHz
0.1
20kHz
1
THD + N (%)
THD + N (%)
1
10
Rl = 4Ω
Vcc = 5V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
0.01
1E-3
0.01
0.1
Output Power (W)
0.01
1E-3
1
Fig. 23 : THD + N vs Output Power
20Hz
1kHz
0.01
0.1
Output Power (W)
1
0.01
1E-3
0.01
0.1
Output Power (W)
1
Fig. 26 : THD + N vs Output Power
10
10
THD + N (%)
Rl = 4Ω, Vcc = 2.6V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
0.1
1
0.1
20Hz
0.01
1E-3
20kHz
1kHz
Fig. 25 : THD + N vs Output Power
1
Rl = 4Ω, Vcc = 3.3V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
0.01
1E-3
1
THD + N (%)
THD + N (%)
0.1
THD + N (%)
1
10
Rl = 4Ω, Vcc = 3.3V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
10/29
0.01
0.1
Output Power (W)
Fig. 24 : THD + N vs Output Power
10
1
1kHz
1kHz
20Hz
1kHz
0.01
Output Power (W)
Rl = 4Ω, Vcc = 2.6V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
20kHz
1kHz
0.1
0.01
1E-3
0.01
Output Power (W)
0.1
TS4872
Fig. 27 : THD + N vs Output Power
Fig. 28 : THD + N vs Output Power
10
10
THD + N (%)
1
20kHz
0.1
20kHz
20Hz
1kHz
20Hz
0.01
0.1
Output Power (W)
0.01
1E-3
1
Fig. 29 : THD + N vs Output Power
1kHz
0.01
0.1
Output Power (W)
1
Fig. 30 : THD + N vs Output Power
10
10
Rl = 8Ω, Vcc = 3.3V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
1
THD + N (%)
THD + N (%)
Rl = 8Ω
Vcc = 5V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
0.01
1E-3
1
1
THD + N (%)
Rl = 8Ω
Vcc = 5V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
Rl = 8Ω, Vcc = 3.3V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20kHz
1kHz
1kHz
0.01
1E-3
0.01
0.1
Output Power (W)
1
Fig. 31 : THD + N vs Output Power
0.01
1E-3
10
Rl = 8Ω, Vcc = 2.6V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
THD + N (%)
THD + N (%)
1
Fig. 32 : THD + N vs Output Power
10
1
0.01
0.1
Output Power (W)
20kHz
1
Rl = 8Ω, Vcc = 2.6V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20kHz
1kHz
1kHz
0.01
1E-3
0.01
Output Power (W)
0.1
0.01
1E-3
0.01
Output Power (W)
0.1
11/29
TS4872
Fig. 33 : THD + N vs Output Power
Fig. 34 : THD + N vs Output Power
10
10
THD + N (%)
1
Rl = 8Ω, Vcc = 5V, Gv = 10
Cb = 0.1µF, Cin = 1µF
BW < 125kHz, Tamb = 25°C
1
THD + N (%)
Rl = 8Ω
Vcc = 5V
Gv = 2
Cb = 0.1µF, Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20Hz
0.1
20kHz
20kHz
0.01
1E-3
0.01
0.1
Output Power (W)
0.01
1E-3
1
Fig. 35 : THD + N vs Output Power
1
10
Rl = 8Ω, Vcc = 3.3V
Gv = 2
Cb = 0.1µF, Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
Rl = 8Ω, Vcc = 3.3V, Gv = 10
Cb = 0.1µF, Cin = 1µF
BW < 125kHz, Tamb = 25°C
1
THD + N (%)
THD + N (%)
0.01
0.1
Output Power (W)
Fig. 36 : THD + N vs Output Power
10
1
1kHz
1kHz
20kHz
20Hz
20kHz
0.1
1kHz
1kHz
0.01
1E-3
0.01
0.1
Output Power (W)
1
Fig. 37 : THD + N vs Output Power
0.01
1E-3
10
Rl = 8Ω, Vcc = 2.6V, Gv = 10
Cb = 0.1µF, Cin = 1µF
BW < 125kHz, Tamb = 25°C
Rl = 8Ω, Vcc = 2.6V
Gv = 2
Cb = 0.1µF, Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
THD + N (%)
THD + N (%)
1
Fig. 38 : THD + N vs Output Power
10
1
0.01
0.1
Output Power (W)
20kHz
1
20kHz
20Hz
0.01
Output Power (W)
0.1
0.1
1kHz
1kHz
0.01
1E-3
12/29
0.01
Output Power (W)
0.1
0.01
1E-3
TS4872
Fig. 39 : THD + N vs Output Power
Fig. 40 : THD + N vs Output Power
10
10
0.1
20Hz
20kHz
Rl = 16Ω, Vcc = 5V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
1
THD + N (%)
THD + N (%)
1
Rl = 16Ω, Vcc = 5V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
0.1
20Hz
0.01
1kHz
1kHz
1E-3
0.01
0.1
Output Power (W)
1
Fig. 41 : THD + N vs Output Power
0.01
1E-3
10
Rl = 16Ω, Vcc = 3.3V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
1
Fig. 42 : THD + N vs Output Power
10
1
0.01
0.1
Output Power (W)
0.1
20Hz
20kHz
Rl = 16Ω
Vcc = 3.3V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
1
20Hz
0.1
20kHz
0.01
1kHz
1kHz
0.01
1E-3
0.01
Output Power (W)
0.1
1E-3
Fig. 43 : THD + N vs Output Power
10
Rl = 16Ω
Vcc = 2.6V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
THD + N (%)
THD + N (%)
0.1
Fig. 44 : THD + N vs Output Power
10
1
0.01
Output Power (W)
Rl = 16Ω
Vcc = 2.6V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
1
20Hz
0.1
20kHz
20kHz
0.01
1E-3
1kHz
1kHz
0.01
Output Power (W)
0.1
0.01
1E-3
0.01
Output Power (W)
0.1
13/29
TS4872
Fig. 45 : THD + N vs Frequency
RL = 4Ω, Vcc = 5V
Gv = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1
Pout = 1.2W
Pout = 1.2W
THD + N (%)
THD + N (%)
1
Fig. 46 : THD + N vs Frequency
0.1
0.1
Pout = 600mW
0.01
20
100
1000
Frequency (Hz)
Fig. 47 : THD + N vs Frequency
100
1000
Frequency (Hz)
10000
Fig. 48 : THD + N vs Frequency
RL = 4Ω, Vcc = 3.3V
Gv = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
RL = 4Ω, Vcc = 3.3V
Gv = 10
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1
Pout = 540mW
THD + N (%)
THD + N (%)
1
0.01
20
10000
Pout = 600mW
RL = 4Ω, Vcc = 5V
Gv = 10
Cb = 1µF
BW < 125kHz
Tamb = 25°C
Pout = 540mW
0.1
0.1
Pout = 270mW
Pout = 270mW
0.01
20
100
1000
Frequency (Hz)
Fig. 49 : THD + N vs Frequency
RL = 4Ω, Vcc = 2.6V
Gv = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1000
Frequency (Hz)
10000
RL = 4Ω, Vcc = 2.6V
Gv = 10
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1
Pout = 240 & 120mW
0.1
100
Fig. 50 : THD + N vs Frequency
THD + N (%)
THD + N (%)
1
0.01
20
10000
0.1
Pout = 240 & 120mW
0.01
20
14/29
100
1000
Frequency (Hz)
10000
0.01
20
100
1000
Frequency (Hz)
10000
TS4872
Fig. 51 : THD + N vs Frequency
Fig. 52 : THD + N vs Frequency
1
1
THD + N (%)
Cb = 0.1µF
0.1
0.1
Cb = 1µF
Cb = 1µF
100
1000
Frequency (Hz)
10000
Fig. 53 : THD + N vs Frequency
THD + N (%)
0.1
100
1000
Frequency (Hz)
RL = 8Ω, Vcc = 5V
Gv = 10
Pout = 450mW
BW < 125kHz
Tamb = 25°C
0.1
0.01
20
10000
100
1000
Frequency (Hz)
10000
Fig. 56 : THD + N vs Frequency
1
1
RL = 8Ω, Vcc = 3.3V
Gv = 2
Pout = 400mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 0.1µF
THD + N (%)
Cb = 0.1µF
THD + N (%)
10000
Cb = 1µF
Fig. 55 : THD + N vs Frequency
Cb = 1µF
0.01
20
100
1000
Frequency (Hz)
Cb = 0.1µF
1
Cb = 1µF
0.01
20
100
Fig. 54 : THD + N vs Frequency
RL = 8Ω, Vcc = 5V
Gv = 10
Pout = 900mW
BW < 125kHz
Tamb = 25°C
Cb = 0.1µF
1
0.01
20
THD + N (%)
0.01
20
RL = 8Ω
Vcc = 5V
Gv = 2
Pout = 450mW
BW < 125kHz
Tamb = 25°C
Cb = 0.1µF
THD + N (%)
RL = 8Ω
Vcc = 5V
Gv = 2
Pout = 900mW
BW < 125kHz
Tamb = 25°C
RL = 8Ω, Vcc = 3.3V
Gv = 2
Pout = 200mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
1000
Frequency (Hz)
10000
0.01
20
100
1000
Frequency (Hz)
10000
15/29
TS4872
Cb = 0.1µF
THD + N (%)
1
Fig. 58 : THD + N vs Frequency
RL = 8Ω, Vcc = 3.3V
Gv = 10
Pout = 400mW
BW < 125kHz
Tamb = 25°C
0.1
100
Cb = 1µF
1000
Frequency (Hz)
0.01
20
10000
Fig. 59 : THD + N vs Frequency
THD + N (%)
THD + N (%)
RL = 8Ω, Vcc = 2.6V
Gv = 2
Pout = 220mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 0.1µF
RL = 8Ω, Vcc = 2.6V
Gv = 10
Pout = 110mW
BW < 125kHz
Tamb = 25°C
Cb = 1µF
1000
Frequency (Hz)
Cb = 0.1µF
1
0.01
20
10000
RL = 8Ω, Vcc = 2.6V
Gv = 10
Pout = 220mW
BW < 125kHz
Tamb = 25°C
0.1
1
1000
Frequency (Hz)
10000
Cb = 0.1µF
RL = 8Ω, Vcc = 2.6V
Gv = 10
Pout = 110mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
100
100
Fig. 62 : THD + N vs Frequency
THD + N (%)
100
Fig. 61 : THD + N vs Frequency
THD + N (%)
10000
0.1
Cb = 1µF
16/29
1000
Frequency (Hz)
1
Cb = 0.1µF
0.01
20
100
Fig. 60 : THD + N vs Frequency
1
0.01
20
RL = 8Ω, Vcc = 3.3V
Gv = 10
Pout = 200mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
0.01
20
Cb = 0.1µF
1
THD + N (%)
Fig. 57 : THD + N vs Frequency
Cb = 1µF
1000
Frequency (Hz)
10000
0.01
20
100
1000
Frequency (Hz)
10000
TS4872
Fig. 63 : THD + N vs Frequency
Fig. 64 : THD + N vs Frequency
0.1
RL = 16Ω, Vcc = 5V
Gv = 10, Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
Pout = 310mW
0.01
Pout = 620mW
1E-3
20
100
1000
Frequency (Hz)
Pout = 620mW
0.01
20
10000
10000
RL = 16Ω, Vcc = 3.3V
Gv = 10, Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.01
Pout = 270mW
100
Pout = 270mW
0.1
Pout = 135mW
RL = 16Ω, Vcc = 3.3V
Gv = 2, Cb = 1µF
BW < 125kHz
Tamb = 25°C
1000
Frequency (Hz)
0.01
20
10000
100
1000
Frequency (Hz)
10000
Fig. 68 : THD + N vs Frequency
Fig. 67 : THD + N vs Frequency
0.1
1
RL = 16Ω, Vcc = 2.6V
Gv = 10, Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Pout = 80mW
THD + N (%)
1000
Frequency (Hz)
1
Pout = 135mW
0.01
Pout = 160mW
1E-3
20
100
Fig. 66 : THD + N vs Frequency
0.1
THD + N (%)
Pout = 310mW
RL = 16Ω, Vcc = 5V
Gv = 2, Cb = 1µF
BW < 125kHz
Tamb = 25°C
Fig. 65 : THD + N vs Frequency
1E-3
20
0.1
100
0.1
RL = 16Ω, Vcc = 2.6V
Gv = 2, Cb = 1µF
BW < 125kHz
Tamb = 25°C
1000
Frequency (Hz)
10000
Pout = 160mW
Pout = 80mW
0.01
20
100
1000
Frequency (Hz)
10000
17/29
TS4872
Fig. 69 : Signal to Noise Ratio vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
Fig. 70 : Signal to Noise Ratio Vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
100
90
90
80
RL=4Ω
RL=8Ω
RL=16Ω
SNR (dB)
SNR (dB)
80
70
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
60
50
2.5
RL=8Ω
3.0
3.5
4.0
4.5
RL=16Ω
70
RL=4Ω
Gv = 10
Cb = Cin = 1µF
THD+N < 0.7%
Tamb = 25°C
60
50
2.5
5.0
3.0
3.5
4.0
4.5
5.0
Vcc (V)
Vcc (V)
Fig. 71 : Signal to Noise Ratio vs Power Supply
with Weighted Filter type A
Fig. 72 : Signal to Noise Ratio vs Power Supply
with Weighted Filter Type A
110
100
100
90
RL=4Ω
RL=8Ω
RL=16Ω
SNR (dB)
SNR (dB)
90
80
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
70
60
2.5
3.0
3.5
4.0
4.5
RL=8Ω
RL=16Ω
80
RL=4Ω
Gv = 10
Cb = Cin = 1µF
THD+N < 0.7%
Tamb = 25°C
70
60
2.5
5.0
3.0
3.5
Fig. 73 : Frequency Response Gain vs Cin, &
Cfeed
7
5
6
Cfeed = 680pF
-15
-20
-25
10
18/29
Cin = 470nF
Icc (mA)
Gain (dB)
-10
Cfeed = 2.2nF
Vstandby = 0V
Tamb = 25°C
4
3
2
Cin = 22nF
Cin = 82nF
5.0
5
Cfeed = 330pF
-5
4.5
Fig. 74 : Current Consumption vs Power
Supply Voltage
10
0
4.0
Vcc (V)
Vcc (V)
Rin = Rfeed = 22kΩ
Tamb = 25°C
1
0
100
1000
Frequency (Hz)
10000
0
1
2
3
Vcc (V)
4
5
TS4872
Fig. 76 : Current Consumption vs Standby
Voltage @ Vcc = 3.3V
Fig. 75 : Current Consumption vs Standby
Voltage @ Vcc = 5V
6
7
Vcc = 5V
Tamb = 25°C
6
5
4
Icc (mA)
Icc (mA)
Vcc = 3.3V
Tamb = 25°C
5
4
3
3
2
2
1
1
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.0
5.0
0.5
1.0
Vstandby (V)
2.0
2.5
3.0
Fig. 78 : Clipping Voltage vs Power Supply
Voltage and Load Resistor
Fig. 77 : Current Consumption vs Standby
Voltage @ Vcc = 2.6V
1.0
6
0.9
Vout1 & Vout2
Clipping Voltage Low side (V)
Vcc = 2.6V
Tamb = 25°C
5
4
Icc (mA)
1.5
Vstandby (V)
3
2
1
0
0.0
0.7
0.6
1.0
1.5
Vstandby (V)
2.0
2.5
RL = 4Ω
0.5
RL = 8Ω
0.4
0.3
0.2
0.1
0.0
2.5
0.5
Tamb = 25°C
0.8
RL = 16Ω
3.0
3.5
4.0
4.5
5.0
Power supply Voltage (V)
Fig. 79 : Clipping Voltage vs Power Supply
Voltage and Load Resistor
1.0
Vout1 & Vout2
Clipping Voltage High side (V)
0.9
Tamb = 25°C
0.8
0.7
0.6
0.5
RL = 4Ω
RL = 8Ω
0.4
0.3
0.2
0.1
0.0
2.5
RL = 16Ω
3.0
3.5
4.0
4.5
5.0
Power supply Voltage (V)
19/29
TS4872
APPLICATION INFORMATION
Fig. 80 : Demoboard Schematic
Vcc
S1
Vcc
C1
R2
S2
GND
C2
R1
Vcc
Neg. input
J1
C6 +
100µ
Neg. input
J2
6
C3
C5
R4
C4
1
R5
7
Vin-
S6
Vin+
-
Vout1 8
+
C9
+
470µ
S5
Positive Input mode
Pos input
J3
J4
3
Bypass
5
Standby
Av=-1
+
S8
Standby
+
+
C12
1u
GND
S4
Vout2
4
C10
+
470µ
Bias
R7
100k
GND
Vcc
OUT1
S3
GND
S7
R6
Pos input
C8
100n
TS4872
2
C11
1u
Fig. 81 : Flip Chip Demoboard Components
Side
20/29
U1
Vcc
R3
C7
100n
Fig. 82 : Flip Chip Demoboard Top Layer
TS4872
Fig. 83 : Flip Chip Demoboard Bottom Layer
The differential output voltage is
Rfee d
Vout2 – Vo ut1 = 2Vin -------------------- (V)
Rin
The differential gain named gain (Gv) for more
convenient usage is :
Vout2 – Vou t1
Rfee d
Gv = --------------------------------------- = 2 -------------------Vin
Rin
Remark : Vout2 is in phase with Vin and Vout1 is
180 phased with Vin. It means that the positive
terminal of the loudspeaker should be connected
to Vout2 and the negative to Vout1.
■ Low and high frequency response
In low frequency region, the effect of Cin starts.
Cin with Rin forms a high pass filter with a -3dB cut
off frequency
■ BTL Configuration Principle
The TS4872 is a monolithic power amplifier with a
BTL output type. BTL (Bridge Tied Load) means
that each end of the load is connected to two
single ended output amplifiers. Thus, we have :
Single ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
1
F C L = -------------------------------- ( Hz )
2 π R in Cin
In high frequency region, you can limit the
bandwidth by adding a capacitor (Cfeed) in parallel
on Rfeed. Its form a low pass filter with a -3dB cut
off frequency
1
F C H = ----------------------------------------------- ( Hz )
2π Rfe ed Cfeed
And Vout1 - Vout2 = 2Vout (V)
■ Power dissipation and efficiency
The output power is :
Hypothesis :
Pout =
( 2 Vout RMS ) 2
(W )
RL
For the same power supply voltage, the output
power in BTL configuration is four times higher
than the output power in single ended
configuration.
• Voltage and current in the load are sinusoidal
(Vout and Iout)
• Supply voltage is a pure DC source (Vcc)
Regarding the load we have :
V O UT = V PEAK sin ωt (V)
■ Gain In Typical Application Schematic (cf.
page 1)
and
V OU T
I OU T = ----------------- (A)
RL
In flat region (no effect of Cin), the output voltage
of the first stage is :
R fe ed
Vout1 = – Vin -------------------- (V)
Rin
For the second stage : Vout2 = -Vout1 (V)
and
VPEAK 2
P O U T = ---------------------- (W)
2 RL
21/29
TS4872
Then, the average current delivered by the supply
voltage is:
I CC
AVG
VPEAK
= 2 -------------------- (A)
πR L
Then, the power dissipated by the amplifier is
Pdiss = Psupply - Pout (W)
2 2 Vcc
P di ss = ---------------------- P OU T – P O UT (W)
π RL
and the maximum value is obtained when:
∂Pdiss
---------------------- = 0
∂P OU T
and its value is:
Cb has an influence on THD+N in lower frequency,
but its function is critical on the final result of PSRR
with input grounded in lower frequency.
If Cb is lower than 1µF, THD+N increase in lower
frequency (see THD+N vs frequency curves) and
the PSRR worsens up
If Cb is higher than 1µF, the benefit on THD+N in
lower frequency is small but the benefit on PSRR
is substantial (see PSRR vs. Cb curve : fig.12)
Note that Cin has a non-negligible effect on PSRR
in lower frequency. Lower is its value, higher is the
PSRR (see fig. 13).
■ Pop and Click performance
Pdiss max =
2 Vcc
2
π2RL
(W)
Remark : This maximum value is only depending
on power supply voltage and load values.
The efficiency is the ratio between the output
power and the power supply
πV P E A K
P O UT
η = ------------------------ = ----------------------Psup ply
4V C C
The maximum theoretical value is reached when
Vpeak = Vcc, so
π
----- = 78.5%
4
■ Decoupling of the circuit
Two capacitors are needed to bypass properly the
TS4872. A power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has especially an influence on the THD+N in
high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 100µF, you can expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 100µF, in high frequency
increases, THD+N and disturbances on the power
supply rail are less filtered.
To the contrary, if Cs is higher than 100µF, those
disturbances on the power supply rail are more
22/29
filtered.
Pop and Click performance is intimately linked with
the size of the input capacitor Cin and the bias
voltage bypass capacitor Cb.
Size of Cin is due to the lower cut off frequency
and PSRR value request and size of Cb is due to
THD+N and PSRR request always in lower
frequency.
Moreover, Cb determines the speed at which the
amplifier turns ON. The slower the speed is , the
softer turns ON noise.
The charge time of Cb is directly proportional to
the internal generator resistance 50kΩ.
Then, the charging time constant for Cb is
τb = 50kΩxCb (s)
As Cb is directly connected to the non-inverting
input (pin 3 & 7) and if we want to minimize, in
amplitude and duration, the output spike on Vout1
(pin 8), Cin must be charged faster than Cb. The
charge time constant of Cin is
τin = (Rin+Rfeed)xCin (s)
Thus we have the relation
τin << τb (s)
The respect of this relation permits to minimize the
pop and click noise.
Remark : Minimize Cin and Cb has a benefit on
pop and click phenomena but also on cost and
size of the application.
TS4872
Example : your target for the -3dB cut off
frequency is 100 Hz. With Rin=Rfeed=22 kΩ,
Cin=72nF (in fact 82nF or 100nF).
With Cb=1µF, if you choose the one of the latest
two values of Cin, the pop and click phenomena at
power supply ON or standby function ON/OFF will
be very small
50 kΩx1µF >> 44kΩx100nF (50ms >> 4.4ms).
Increase Cin value increases the pop and click
phenomena to an unpleasant sound at power
supply ON and standby function ON/OFF.
Why Cs is not important in pop and click
consideration ?
Hypothesis :
• Cs = 100µF
• Supply voltage = 5V
• Supply voltage internal resistor = 0.1Ω
• Supply current of the amplifier Icc = 6mA
First of all, we must calculate the minimum power
supply voltage to obtain 0.5W into 8Ω. With curves
in fig. 15, we can read 3.5V.
Thus, the power supply voltage value min. will be
3.5V.
Following
equation
the
maximum
Pdiss max =
power
2 Vcc 2
π2RL
dissipation
(W)
with 3.5V we have Pdissmax=0.31W.
Referring to power derating curves (fig. 20), with
0.31W the maximum ambient temperature will be
100°C. This last value could be higher if you follow
the example layout shown on the demoboard
(better dissipation).
The gain of the amplifier in flat region will be
At power ON of the supply, the supply capacitor is
charged through the internal power supply
resistor. So, to reach 5V you need about five to ten
times the charging time constant of Cs (τs =
0.1xCs (s)).
Then, this time equal 50µs to 100µs << τb in the
majority of application.
At power OFF of the supply, Cs is discharged by a
constant current Icc. The discharge time from 5V
to 0V of Cs is
t D i s ch C s
5Cs
= -------------- = 83 ms
Icc
Now, we must consider the discharge time of Cb.
At power OFF or standby ON, Cb is discharged by
a 100kΩ resistor. So the discharge time is about
τb Disch ≈ 3xCbx100kΩ (s).
In the majority of application, Cb=1µF, then
τbDisch≈300ms >> tdischCs.
■ Power amplifier design examples
Given :
•
•
•
•
•
•
Load impedance : 8Ω
Output power @ 1% THD+N : 0.5W
Input impedance : 10kΩ min.
Input voltage peak to peak : 1Vpp
Bandwidth frequency : 20Hz to 20kHz (0, -3dB)
Ambient temperature max = 50°C
V OUTP P 2 2 R L P OUT
G V = --------------------- = ------------------------------------ = 5.65
VINPP
VINPP
We have Rin > 10kΩ. Let's take Rin = 10kΩ, then
Rfeed = 28.25kΩ. We could use for Rfeed = 30kΩ
in normalized value and the gain will be Gv = 6.
In lower frequency we want 20 Hz (-3dB cut off
frequency). Then
1
C IN = ------------------------------ = 795nF
2π RinF C L
So, we could use for Cin a 1µF capacitor value that
gives 16Hz.
In Higher frequency we want 20kHz (-3dB cut off
frequency). The Gain Bandwidth Product of the
TS4872 is 2MHz typical and doesn't change when
the amplifier delivers power into the load.
The first amplifier has a gain of
Rfee d
----------------- = 3
R in
and the theoretical value of the -3dB cut-off higher
frequency is 2MHz/3 = 660kHz.
We can keep this value or limit the bandwidth by
adding a capacitor Cfeed, in parallel on Rfeed.
23/29
TS4872
Then
1
C FE E D = --------------------------------------- = 265pF
2π R F E E D F C H
So, we could use for Cfeed a 220pF capacitor
value that gives 24kHz.
Application n°2 : 20Hz to 20kHz bandwidth and
20dB gain BTL power amplifier.
Components :
Designator
Part Type
R1
110k / 0.125W
R4
22k / 0.125W
R6
Short Cicuit
R7
330k / 0.125W
C5
470nF
C6
100µF
In the following tables, you could find three another
examples with values required for the demoboard.
C7
100nF
C9
Short Circuit
Remark : components with (*) marking are
optional.
C10
Short Circuit
C12
1 µF
Application n°1 : 20Hz to 20kHz bandwidth and
6dB gain BTL power amplifier.
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
S8
2 pts connector 2.54mm
pitch
J1
SMB Plug
U1
TS4872IJ
Now, we can calculate the value of Cb with the
formula τb = 50kΩxCb >> τin = (Rin+Rfeed)xCin
which permits to reduce the pop and click effects.
Then Cb >> 0.8µF.
We can choose for Cb a normalized value of 2.2µF
that gives good results in THD+N and PSRR.
Components :
Designator
Part Type
R1
22k / 0.125W
R4
22k / 0.125W
R6
Short Cicuit
Application n°3 : 50Hz to 10kHz bandwidth and
10dB gain BTL power amplifier.
R7
330k / 0.125W
Components :
C5
470nF
C6
100µF
R1
33k / 0.125W
C7
100nF
R2
Short Circuit
C9
Short Circuit
R4
22k / 0.125W
C10
Short Circuit
R6
Short Cicuit
C12
1 µF
R7
330k / 0.125W
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
C2
470pF
C5
150nF
S8
2 pts connector 2.54mm
pitch
C6
100µF
J1
SMB plug
C7
100nF
U1
TS4872IJ
C9
Short Circuit
24/29
Designator
Part Type
TS4872
Designator
Part Type
Designator
Part Type
C10
Short Circuit
C6
100µF
C12
1µF
C7
100nF
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
C9
Short Circuit
C10
Short Circuit
S8
2 pts connector 2.54mm
pitch
C12
1µF
J1
SMB Plug
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
U1
TS4872IJ
S8
2 pts connector 2.54mm
pitch
J1, J3
SMB Plug
U1
TS4872IJ
Application n°4 : Differential inputs BTL power
amplifier.
In this configuration, we need to place these
components : R1, R4, R5, R6, R7, C4, C5, C12.
We have also : R4 = R5, R1 = R6, C4 = C5.
The gain of the amplifier is :
G V D I FF
R1
= 2 -------- (Pos. Input - Neg.Input)
R4
■ Note on how to use the PSRR curves
(page 8)
We have finished a design and we have chosen
the components :
■ Rin=Rfeed=22kΩ
For a 20Hz to 20kHz bandwidth and 6dB gain BTL
power amplifier you could follow the bill of material
below.
■ Cin=100nF
Components :
Now, on fig. 13, we can see the PSRR (input
grounded) vs frequency curves. At 217Hz we have
a PSRR value of -36dB.
In reality we want a value about -70dB. So, we
need a gain of 34dB !
Now, on fig. 12 we can see the effect of Cb on the
PSRR (input grounded) vs. frequency. With
Cb=100µF, we can reach the -70dB value.
The process to obtain the final curve (Cb=100µF,
Cin=100nF, Rin=Rfeed=22kΩ) is a simple transfer
point by point on each frequency of the curve on
fig. 13 to the curve on fig. 12.
The measurement results is shown on figure 84.
Designator
Part Type
R1
22k / 0.125W
R4
22k / 0.125W
R5
22k / 0.125W
R6
22k / 0.125W
R7
330k / 0.125W
C4
470nF
C5
470nF
■ Cb=1µF
25/29
TS4872
Fig. 85 : PSRR measurement schematic
Fig. 84 : PSRR changes with Cb
6
Vripple
Vcc
Cin=100nF
Cb=1µF
Vcc
1
Rin
-50
7
VinVin+
-
Vout1 8
Cin
-60
10
Rg
100 Ohms
100
1000
10000
100000
Frequency (Hz)
■ Note on PSRR measurement
What is the PSRR ?
The PSRR is the Power Supply Rejection Ratio.
It’s a kind of SVR in a determined frequency
range. The PSRR of a device, is the ratio between
a power supply disturbance and the result on the
output.
We can say that the PSRR is the ability of a device
to minimize the impact of power supply
disturbances to the output.
How we measure the PSRR ?
For PSRR measurement schematic see figure 85
26/29
RL
Cin=100nF
Cb=100µF
-70
Vs-
+
3
Bypass
5
Standby
Av=-1
+
Cb
Vout2
4
Vs+
Bias
GND
PSRR (dB)
-40
Rfeed
Vcc = 5 & 2.6V
Rfeed = 22k, Rin = 22k
Rg = 100Ω, RL = 8Ω
Tamb = 25°C
-30
TS4872
2
■ Principle of operation
• We fixed the DC voltage supply (Vcc)
• We fixed the AC sinusoidal ripple voltage
(Vripple)
• No bypass capacitor Cs is used
The PSRR value for each frequency is :
PSRR ( d B ) = 20 x Log 10
R ms ( V r i p pl e )
--------------------------------------------Rms ( Vs + - Vs - )
Remark : The measure of the Rms voltage is not a
Rms selective measure but a full range (2 Hz to
125 kHz) Rms measure. It means that we
measure the effective Rms signal + the noise.
TS4872
TOP VIEW OF THE DAISY CHAIN MECHANICAL DATA ( all drawings dimensions are in millimeters )
7
+
Vin
8
6
5
Vcc
STDBY
Vout1
Vout2
Vin
GND
1
2
4
1.52
BYPASS
3
3.02
REMARKS
Daisy chain sample is featuring pins connection two by two. The schematic above is illustrating the way
connecting pins each other. This sample is used for testing continuity on board. PCB needs to be designed
on the opposite way, where pin connections are not done on daisy chain samples. By that way, just
connecting an Ohmeter between pin 8 and pin 1, the soldering process continuity can be tested.
ORDER CODE
Part Number
TSDC4872IJT
Temperature
Range
-40, +85°C
Package
Marking
J
•
DC01
27/29
TS4872
TAPE & REEL SPECIFICATION ( top view )
User direction of feed
7
6
XXX4872
8
1
2
3
7
6
5
XXX4872
8
1
28/29
5
2
3
4
4
TS4872
PIN OUT (top view)
MARKING (top view)
7
+
Vin
8
6
5
Vcc
STDBY
Vout1
Vout2
Vin
GND
1
2
4
BYPASS
3
■ Balls are underneath
■ Y : Year
■ W : Week with two digits
■ Example : 1254872
PACKAGE MECHANICAL DATA
FLIP CHIP - 8 BUMPS
■
■
■
■
■
Die size : (3.02mm±10%) x (1.52mm ±10%)
Die height (including bumps) : 540µm ±50µm
Bump height : 140µm ±15µm (i.e. bump diameter of 185µm ±15µm)
Silicon thickness : 400µm±25µm
Pitch: 500µm ±10µm and 750µm±10µm
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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