STMICROELECTRONICS TS4972IJT

TS4972
1.2W AUDIO POWER AMPLIFIER
WITH STANDBY MODE ACTIVE HIGH
■ OPERATING FROM VCC = 2.5V to 5.5V
■ RAIL TO RAIL OUTPUT
■ 1.2W OUTPUT POWER @ Vcc=5V, THD=1%,
PIN CONNECTIONS (Top View)
F=1kHz, with 8Ω Load
TS4972JT - FLIP CHIP
■ ULTRA LOW CONSUMPTION IN STANDBY
MODE (10nA)
■ 75dB PSRR @ 217Hz from 2.5 to 5V
■ LOW POP & CLICK
■ ULTRA LOW DISTORTION (0.05%)
■ UNITY GAIN STABLE
■ FLIP CHIP PACKAGE 8 x 300µm bumps
7
+
Vin
8
6
5
Vcc
Stdby
Vout2
Vout1
DESCRIPTION
Vin
Gnd
Bypass
1
2
3
The TS4972 is an Audio Power Amplifier capable
of delivering 1.6W of continuous RMS ouput power into a 4Ω load @ 5V.
4
This Audio Amplifier is exhibiting 0.1% distortion
level (THD) from a 5V supply for a Pout = 250mW
RMS. An external standby mode control reduces
the supply current to less than 10nA. An internal
shutdown protection is provided.
The TS4972 has been designed for high quality
audio applications such as mobile phones and to
minimize the number of external components.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
TYPICAL APPLICATION SCHEMATIC
APPLICATIONS
■ Mobile Phones (Cellular / Cordless)
■ PDAs
■ Laptop/Notebook computers
■ Portable Audio Devices
Cfeed
Rfeed
VCC
Cs
6
VCC
Audio
Input
Rin
1
Vin-
-
7
Vin+
+
Vout 1
Cin
8
RL
8 Ohms
ORDER CODE
Part
Number
Temperature
Range
TS4972IJT
-40, +85°C
-
Package
Marking
J
•
VCC
AV = -1
3
Bypass
5
Standby
Vout 2
4
+
Rstb
Bias
4972
GND
Cb
TS4972
2
J = Flip Chip Package - only available in Tape & Reel (JT))
January 2003
1/28
TS4972
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Vi
Parameter
Supply voltage
Input Voltage
1)
2)
Unit
6
V
GND to VCC
V
°C
Toper
Operating Free Air Temperature Range
-40 to + 85
Tstg
Storage Temperature
Tj
Rthja
Pd
-65 to +150
°C
Maximum Junction Temperature
150
°C
Thermal Resistance Junction to Ambient 3)
200
°C/W
4)
Power Dissipation
Internally Limited
2
200
Class A
250
ESD
Human Body Model
ESD
Machine Model
Latch-up Latch-up Immunity
Lead Temperature (soldering, 10sec)
1.
2.
3.
4.
Value
kV
V
°C
All voltages values are measured with respect to the ground pin.
The magnitude of input signal must never exceed VCC + 0.3V / G ND - 0.3V
Device is protected in case of over temperature by a thermal shutdown active @ 150°C.
Exceeding the power derating curves during a long period, involves abnormal operating condition.
OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
VICM
Common Mode Input Voltage Range
VSTB
Standby Voltage Input :
Device ON
Device OFF
RL
Rthja
Load Resistor
Thermal Resistance Junction to Ambient
1. With Heat Sink Surface = 125mm 2
2/28
1)
Value
Unit
2.5 to 5.5
V
GND to VCC - 1.2V
V
GND ≤ VSTB ≤ 0.5V
VCC - 0.5V ≤ VSTB ≤ VCC
V
4 - 32
Ω
90
°C/W
TS4972
ELECTRICAL CHARACTERISTICS
VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply Current
No input signal, no load
6
8
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
1.2
W
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
75
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
ICC
ISTANDBY
THD + N
PSRR
Parameter
Min.
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz
VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)3)
Symbol
Typ.
Max.
Unit
Supply Current
No input signal, no load
5.5
8
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
500
mW
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
75
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
ICC
ISTANDBY
THD + N
PSRR
Parameter
Min.
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz
3. All electrical values are made by correlation between 2.6V and 5V measurements
3/28
TS4972
ELECTRICAL CHARACTERISTICS
VCC = 2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Typ.
Max.
Unit
Supply Current
No input signal, no load
5.5
8
mA
Standby Current 1)
No input signal, Vstdby = Vcc, RL = 8Ω
10
1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
5
20
mV
Po
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
300
mW
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
0.1
%
Power Supply Rejection Ratio2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
75
dB
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
70
Degrees
GM
Gain Margin
RL = 8Ω, CL = 500pF
20
dB
GBP
Gain Bandwidth Product
RL = 8Ω
2
MHz
ICC
ISTANDBY
THD + N
PSRR
Parameter
Min.
1. Standby mode is actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to Vcc @ f = 217Hz
Components
Functional Description
Rin
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also
forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Cin
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
Rfeed
Feed back resistor which sets the closed loop gain in conjunction with Rin
Cs
Supply Bypass capacitor which provides power supply filtering
Cb
Bypass pin capacitor which provides half supply filtering
Cfeed
Rstb
Gv
Low pass filter capacitor allowing to cut the high frequency
(low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
Pull-up resistor which fixes the right supply level on the standby pin
Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)
REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF.
2. External resistors are not needed for having better stability when supply @ Vcc down to 3V. By the way,
the quiescent current remains the same.
3. The standby response time is about 1µs.
4/28
TS4972
Fig. 1 : Open Loop Frequency Response
Fig. 2 : Open Loop Frequency Response
0
-60
40
-80
-100
20
-120
-140
0
Vcc = 5V
ZL = 8Ω + 560pF
Tamb = 25°C
-120
-140
0
-160
-180
-20
-200
1
10
100
1000
10000
-200
-220
-40
0.3
1
10
Frequency (kHz)
Fig. 3 : Open Loop Frequency Response
Vcc = 33V
RL = 8Ω
Tamb = 25°C
-100
-120
20
-140
-160
0
Gain
-60
Phase (Deg)
Gain (dB)
Phase
Vcc = 3.3V
ZL = 8Ω + 560pF
Tamb = 25°C
Phase
10
100
1000
Frequency (kHz)
10000
-140
-160
-180
-200
-20
-220
-40
0.3
-240
Fig. 5 : Open Loop Frequency Response
80
Gain
60
60
-40
-60
20
-120
-140
0
-160
10000
Vcc = 2.6V
ZL = 8Ω + 560pF
Tamb = 25°C
40
Gain (dB)
-100
100
1000
Frequency (kHz)
-200
1
10
100
1000
Frequency (kHz)
10000
-240
-40
-60
-100
20
-120
-140
0
-160
-180
-20
-200
-220
-220
-40
0.3
-20
-80
Phase
-180
-20
-240
0
Gain
-80
Phase
10
80
-20
Phase (Deg)
Gain (dB)
40
1
Fig. 6 : Open Loop Frequency Response
0
Vcc = 2.6V
RL = 8Ω
Tamb = 25°C
-60
-120
0
-200
1
-40
-100
20
-220
-40
0.3
-20
-80
40
-180
-20
-220
0
60
-40
-80
40
10000
80
-20
Gain (dB)
Gain
60
100
1000
Frequency (kHz)
Fig. 4 : Open Loop Frequency Response
0
80
-60
-100
20
-180
-40
0.3
-40
-80
Phase
-160
-20
-20
Phase (Deg)
Phase
Gain
-40
Phase (Deg)
60
Phase (Deg)
Gain (dB)
40
0
-20
Gain (dB)
Vcc = 5V
RL = 8Ω
Tamb = 25°C
Gain
Phase (Deg)
60
-40
0.3
1
10
100
1000
Frequency (kHz)
10000
-240
5/28
TS4972
Phase
60
100
-100
80
-120
60
Gain (dB)
Gain
-140
40
-160
20
0
-20
-40
0.3
-180
1
10
100
-40
0.3
-80
80
-100
Phase
Gain (dB)
Gain
-140
40
-160
20
-180
0
-40
0.3
6/28
-200
Vcc = 2.6V
CL = 560pF
Tamb = 25°C
1
10
-220
100
1000
Frequency (kHz)
10000
-240
Phase (Deg)
-120
60
-20
-180
-220
Fig. 9 : Open Loop Frequency Response
-140
-160
-20
10000
-120
20
-200
100
1000
Frequency (kHz)
-100
Phase
40
0
Vcc = 5V
CL = 560pF
Tamb = 25°C
-80
Gain
Gain (dB)
80
-80
Phase (Deg)
100
Fig. 8 : Open Loop Frequency Response
-200
Vcc = 3.3V
CL = 560pF
Tamb = 25°C
1
10
-220
100
1000
Frequency (kHz)
10000
-240
Phase (Deg)
Fig. 7 : Open Loop Frequency Response
TS4972
Fig. 10 : Power Supply Rejection Ratio (PSRR)
vs Power supply
Fig. 11 : Power Supply Rejection Ratio (PSRR)
vs Feedback Capacitor
-10
-30
Vripple = 200mVrms
Rfeed = 22Ω
Input = floating
RL = 8Ω
Tamb = 25°C
-50
-20
-30
PSRR (dB)
PSRR (dB)
-40
Vcc = 5V, 3.3V & 2.6V
Cb = 1µF & 0.1µF
-60
-40
Vcc = 5, 3.3 & 2.6V
Cb = 1µF & 0.1µF
Rfeed = 22kΩ
Vripple = 200mVrms
Input = floating
RL = 8Ω
Tamb = 25°C
Cfeed=0
Cfeed=150pF
Cfeed=330pF
-50
-60
-70
-70
-80
10
100
1000
10000
Frequency (Hz)
-80
10
100000
Fig. 12 : Power Supply Rejection Ratio (PSRR)
vs Bypass Capacitor
-10
Cb=10µF
PSRR (dB)
-30
Vcc = 5, 3.3 & 2.6V
Rfeed = 22k
Rin = 22k, Cin = 1µF
Rg = 100Ω, RL = 8Ω
Tamb = 25°C
-40
Cb=47µF
-50
Cin=1µF
Cin=220nF
-30
100000
Vcc = 5, 3.3 & 2.6V
Rfeed = 22kΩ, Rin = 22k
Cb = 1µF
Rg = 100Ω, RL = 8Ω
Tamb = 25°C
-40
Cin=100nF
-60
-50
-70
1000
10000
Frequency (Hz)
Cin=330nF
-20
PSRR (dB)
Cb=1µF
100
Fig. 13 : Power Supply Rejection Ratio (PSRR)
vs Input Capacitor
-10
-20
Cfeed=680pF
Cin=22nF
Cb=100µF
-80
10
100
1000
10000
100000
-60
10
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Fig. 14 : Power Supply Rejection Ratio (PSRR)
vs Feedback Resistor
-10
-20
PSRR (dB)
-30
-40
Vcc = 5, 3.3 & 2.6V
Cb = 1µF & 0.1µF
Vripple = 200mVrms
Input = floating
RL = 8Ω
Tamb = 25°C
Rfeed=110kΩ
Rfeed=47kΩ
-50
-60
Rfeed=22kΩ
-70
Rfeed=10kΩ
-80
10
100
1000
10000
Frequency (Hz)
100000
7/28
TS4972
Fig. 15 : Pout @ THD + N = 1% vs Supply
Voltage vs RL
Fig. 16 : Pout @ THD + N = 10% vs Supply
Voltage vs RL
2.0
1.4
1.2
1.0
Gv = 2 & 10
Cb = 1µF
F = 1kHz
BW < 125kHz
Tamb = 25°C
8Ω
Output power @ 10% THD + N (W)
Output power @ 1% THD + N (W)
1.6
6Ω
4Ω
0.8
16 Ω
0.6
0.4
0.2
32 Ω
0.0
2.5
3.0
3.5
4.0
Power Supply (V)
4.5
1.4
1.0
16 Ω
0.8
0.6
0.4
0.2
32 Ω
3.0
0.6
Vcc=5V
1.2 F=1kHz
THD+N<1%
Vcc=3.3V
F=1kHz
0.5 THD+N<1%
RL=4Ω
1.0
0.8
0.6
RL=8Ω
5.0
RL=4Ω
0.3
0.2
RL=8Ω
RL=16Ω
0.2
0.4
0.6
0.8
1.0
1.2
Output Power (W)
1.4
Flip-Chip Package Power Dissipation (W)
0.25
0.20
0.15
RL=8Ω
0.10
0.05
0.00
0.0
RL=16Ω
0.1
0.2
Output Power (W)
0.3
0.2
0.3
0.4
0.5
0.6
0.7
Fig. 20 : Power Derating Curves
RL=4Ω
0.30
0.1
Output Power (W)
0.40
Vcc=2.6V
F=1kHz
THD+N<1%
0.0
0.0
1.6
Fig. 19 : Power Dissipation vs Pout
Power Dissipation (W)
4.5
0.4
RL=16Ω
0.0
0.0
8/28
3.5
4.0
Power Supply (V)
0.1
0.2
0.35
4Ω
1.2
1.4
0.4
8Ω
6Ω
Fig. 18 : Power Dissipation vs Pout
Power Dissipation (W)
Power Dissipation (W)
1.6
Gv = 2 & 10
Cb = 1µF
F = 1kHz
BW < 125kHz
Tamb = 25°C
0.0
2.5
5.0
Fig. 17 : Power Dissipation vs Pout
1.8
0.4
1.4
2
Heat sink surface = 125mm
(See demoboard)
1.2
1.0
0.8
0.6
0.4
No Heat sink
0.2
0.0
0
25
50
75
100
Ambiant Temperature ( C)
125
150
TS4972
Fig. 22 : THD + N vs Output Power
Fig. 21 : THD + N vs Output Power
10
10
20kHz
0.1
20kHz
1
THD + N (%)
1
THD + N (%)
RL = 4Ω, Vcc = 5V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz, Tamb = 25°C
RL = 4Ω
Vcc = 5V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
0.01
1E-3
0.01
0.1
Output Power (W)
0.01
1E-3
1
1
THD + N (%)
THD + N (%)
RL = 4Ω, Vcc = 3.3V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
RL = 4Ω, Vcc = 3.3V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
20Hz
0.1
0.1
20Hz
0.01
1E-3
1kHz
1kHz
0.01
0.1
Output Power (W)
Fig. 25 : THD + N vs Output Power
1
0.01
1E-3
0.01
0.1
Output Power (W)
1
Fig. 26 : THD + N vs Output Power
10
10
RL = 4Ω, Vcc = 2.6V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
1
10
10
1
0.01
0.1
Output Power (W)
Fig. 24 : THD + N vs Output Power
Fig. 23 : THD + N vs Output Power
1
1kHz
1kHz
20Hz
20kHz
0.1
0.1
20Hz
0.01
1E-3
1
RL = 4Ω, Vcc = 2.6V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
1kHz
1kHz
0.01
0.1
Output Power (W)
20Hz
0.01
1E-3
0.01
0.1
Output Power (W)
9/28
TS4972
Fig. 28 : THD + N vs Output Power
Fig. 27 : THD + N vs Output Power
10
10
20kHz
0.1
20Hz
1kHz
20Hz
0.01
0.1
Output Power (W)
0.01
1E-3
1
1kHz
0.01
0.1
Output Power (W)
1
Fig. 30 : THD + N vs Output Power
Fig. 29 : THD + N vs Output Power
10
10
RL = 8Ω, Vcc = 3.3V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
20Hz
0.1
1
THD + N (%)
THD + N (%)
20kHz
0.1
0.01
1E-3
1
RL = 8Ω
Vcc = 5V
Gv = 10
Cb = Cin = 1µF
1 BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
RL = 8Ω
Vcc = 5V
Gv = 2
Cb = Cin = 1µF
1 BW < 125kHz
Tamb = 25°C
RL = 8Ω, Vcc = 3.3V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20kHz
1kHz
1kHz
0.01
1E-3
0.01
0.1
Output Power (W)
Fig. 31 : THD + N vs Output Power
1
0.01
1E-3
10
RL = 8Ω, Vcc = 2.6V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
THD + N (%)
THD + N (%)
1
Fig. 32 : THD + N vs Output Power
10
1
0.01
0.1
Output Power (W)
20kHz
1
RL = 8Ω, Vcc = 2.6V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20kHz
1kHz
1kHz
0.01
1E-3
10/28
0.01
0.1
Output Power (W)
0.01
1E-3
0.01
0.1
Output Power (W)
TS4972
Fig. 33 : THD + N vs Output Power
Fig. 34 : THD + N vs Output Power
10
10
THD + N (%)
1
RL = 8Ω, Vcc = 5V, Gv = 10
Cb = 0.1µF, Cin = 1µF
BW < 125kHz, Tamb = 25°C
1
THD + N (%)
RL = 8Ω
Vcc = 5V
Gv = 2
Cb = 0.1µF, Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20Hz
0.1
20kHz
20kHz
0.01
1E-3
0.01
0.1
Output Power (W)
0.01
1E-3
1
1
10
10
RL = 8Ω, Vcc = 3.3V, Gv = 10
Cb = 0.1µF, Cin = 1µF
BW < 125kHz, Tamb = 25°C
RL = 8Ω, Vcc = 3.3V
Gv = 2
Cb = 0.1µF, Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
1
THD + N (%)
THD + N (%)
0.01
0.1
Output Power (W)
Fig. 36 : THD + N vs Output Power
Fig. 35 : THD + N vs Output Power
1
1kHz
1kHz
20kHz
20Hz
20kHz
0.1
1kHz
1kHz
0.01
1E-3
0.01
0.1
Output Power (W)
Fig. 37 : THD + N vs Output Power
1
0.01
1E-3
10
RL = 8Ω, Vcc = 2.6V, Gv = 10
Cb = 0.1µF, Cin = 1µF
BW < 125kHz, Tamb = 25°C
RL = 8Ω, Vcc = 2.6V
Gv = 2
Cb = 0.1µF, Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
THD + N (%)
THD + N (%)
1
Fig. 38 : THD + N vs Output Power
10
1
0.01
0.1
Output Power (W)
20kHz
1
20kHz
20Hz
0.01
Output Power (W)
0.1
0.1
1kHz
1kHz
0.01
1E-3
0.01
0.1
Output Power (W)
0.01
1E-3
11/28
TS4972
Fig. 39 : THD + N vs Output Power
Fig. 40 : THD + N vs Output Power
10
10
0.1
20Hz
20kHz
RL = 16Ω, Vcc = 5V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
1
THD + N (%)
THD + N (%)
1
RL = 16Ω, Vcc = 5V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20kHz
0.1
20Hz
0.01
1kHz
1kHz
1E-3
0.01
0.1
Output Power (W)
1
Fig. 41 : THD + N vs Output Power
0.01
1E-3
10
RL = 16Ω, Vcc = 3.3V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
1
Fig. 42 : THD + N vs Output Power
10
1
0.01
0.1
Output Power (W)
0.1
20Hz
20kHz
1
RL = 16Ω
Vcc = 3.3V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20kHz
1kHz
1kHz
0.01
0.01
1E-3
0.01
Output Power (W)
0.1
1E-3
Fig. 43 : THD + N vs Output Power
10
RL = 16Ω
Vcc = 2.6V
Gv = 2
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
0.1
20Hz
THD + N (%)
THD + N (%)
0.1
Fig. 44 : THD + N vs Output Power
10
1
0.01
Output Power (W)
1
RL = 16Ω
Vcc = 2.6V
Gv = 10
Cb = Cin = 1µF
BW < 125kHz
Tamb = 25°C
20Hz
0.1
20kHz
20kHz
0.01
1E-3
12/28
1kHz
1kHz
0.01
Output Power (W)
0.1
0.01
1E-3
0.01
Output Power (W)
0.1
TS4972
Fig. 45 : THD + N vs Frequency
RL = 4Ω, Vcc = 5V
Gv = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1
Pout = 1.3W
Pout = 1.3W
THD + N (%)
THD + N (%)
1
Fig. 46 : THD + N vs Frequency
0.1
0.1
Pout = 650mW
0.01
20
100
1000
Frequency (Hz)
Fig. 47 : THD + N vs Frequency
100
1000
Frequency (Hz)
10000
Fig. 48 : THD + N vs Frequency
RL = 4Ω, Vcc = 3.3V
Gv = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
RL = 4Ω, Vcc = 3.3V
Gv = 10
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1
Pout = 560mW
THD + N (%)
THD + N (%)
1
0.01
20
10000
Pout = 650mW
RL = 4Ω, Vcc = 5V
Gv = 10
Cb = 1µF
BW < 125kHz
Tamb = 25°C
Pout = 560mW
0.1
0.1
Pout = 280mW
Pout = 280mW
0.01
20
100
1000
Frequency (Hz)
Fig. 49 : THD + N vs Frequency
RL = 4Ω, Vcc = 2.6V
Gv = 2
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1000
Frequency (Hz)
10000
RL = 4Ω, Vcc = 2.6V
Gv = 10
Cb = 1µF
BW < 125kHz
Tamb = 25°C
1
Pout = 240 & 120mW
0.1
100
Fig. 50 : THD + N vs Frequency
THD + N (%)
THD + N (%)
1
0.01
20
10000
0.1
Pout = 240 & 120mW
0.01
20
100
1000
Frequency (Hz)
10000
0.01
20
100
1000
Frequency (Hz)
10000
13/28
TS4972
Fig. 51 : THD + N vs Frequency
Fig. 52 : THD + N vs Frequency
1
1
THD + N (%)
Cb = 0.1µF
0.1
0.1
Cb = 1µF
Cb = 1µF
100
1000
Frequency (Hz)
Fig. 53 : THD + N vs Frequency
Cb = 0.1µF
THD + N (%)
1
0.01
20
10000
RL = 8Ω, Vcc = 5V
Gv = 10
Pout = 920mW
BW < 125kHz
Tamb = 25°C
0.1
100
1000
Frequency (Hz)
100
1000
Frequency (Hz)
10000
Fig. 56 : THD + N vs Frequency
1
RL = 8Ω, Vcc = 3.3V
Gv = 2
Pout = 420mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 0.1µF
THD + N (%)
Cb = 0.1µF
THD + N (%)
RL = 8Ω, Vcc = 5V
Gv = 10
Pout = 460mW
BW < 125kHz
Tamb = 25°C
0.1
0.01
20
10000
1
RL = 8Ω, Vcc = 3.3V
Gv = 2
Pout = 210mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
14/28
10000
Cb = 1µF
Fig. 55 : THD + N vs Frequency
0.01
20
1000
Frequency (Hz)
Cb = 0.1µF
1
Cb = 1µF
0.01
20
100
Fig. 54 : THD + N vs Frequency
THD + N (%)
0.01
20
RL = 8Ω
Vcc = 5V
Gv = 2
Pout = 460mW
BW < 125kHz
Tamb = 25°C
Cb = 0.1µF
THD + N (%)
RL = 8Ω
Vcc = 5V
Gv = 2
Pout = 920mW
BW < 125kHz
Tamb = 25°C
Cb = 1µF
100
1000
Frequency (Hz)
10000
0.01
20
100
1000
Frequency (Hz)
10000
TS4972
Cb = 0.1µF
THD + N (%)
1
Fig. 58 : THD + N vs Frequency
RL = 8Ω, Vcc = 3.3V
Gv = 10
Pout = 420mW
BW < 125kHz
Tamb = 25°C
0.1
100
Cb = 1µF
1000
Frequency (Hz)
0.01
20
10000
Fig. 59 : THD + N vs Frequency
0.1
THD + N (%)
THD + N (%)
RL = 8Ω, Vcc = 2.6V
Gv = 2
Pout = 220mW
BW < 125kHz
Tamb = 25°C
Cb = 0.1µF
10000
RL = 8Ω, Vcc = 2.6V
Gv = 10
Pout = 110mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
Cb = 1µF
1000
Frequency (Hz)
Cb = 0.1µF
1
0.01
20
10000
RL = 8Ω, Vcc = 2.6V
Gv = 10
Pout = 220mW
BW < 125kHz
Tamb = 25°C
0.1
1
1000
Frequency (Hz)
10000
Cb = 0.1µF
RL = 8Ω, Vcc = 2.6V
Gv = 10
Pout = 110mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
100
100
Fig. 62 : THD + N vs Frequency
THD + N (%)
100
Fig. 61 : THD + N vs Frequency
THD + N (%)
1000
Frequency (Hz)
1
Cb = 0.1µF
0.01
20
100
Fig. 60 : THD + N vs Frequency
1
0.01
20
RL = 8Ω, Vcc = 3.3V
Gv = 10
Pout = 210mW
BW < 125kHz
Tamb = 25°C
0.1
Cb = 1µF
0.01
20
Cb = 0.1µF
1
THD + N (%)
Fig. 57 : THD + N vs Frequency
Cb = 1µF
1000
Frequency (Hz)
10000
0.01
20
100
1000
Frequency (Hz)
10000
15/28
TS4972
Fig. 63 : THD + N vs Frequency
Fig. 64 : THD + N vs Frequency
0.1
RL = 16Ω, Vcc = 5V
Gv = 10, Cb = 1µF
BW < 125kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
Pout = 315mW
0.01
Pout = 630mW
1E-3
20
100
0.1
Pout = 315mW
RL = 16Ω, Vcc = 5V
Gv = 2, Cb = 1µF
BW < 125kHz
Tamb = 25°C
1000
Frequency (Hz)
Pout = 630mW
0.01
20
10000
Fig. 65 : THD + N vs Frequency
100
1000
Frequency (Hz)
10000
Fig. 66 : THD + N vs Frequency
0.1
1
Pout = 140mW
THD + N (%)
THD + N (%)
RL = 16Ω, Vcc = 3.3V
Gv = 10, Cb = 1µF
BW < 125kHz
Tamb = 25°C
0.01
Pout = 280mW
1E-3
20
100
1000
Frequency (Hz)
0.01
20
10000
1000
Frequency (Hz)
10000
1
RL = 16Ω, Vcc = 2.6V
Gv = 10, Cb = 1µF
BW < 125kHz
Tamb = 25°C
Pout = 80mW
THD + N (%)
THD + N (%)
100
Fig. 68 : THD + N vs Frequency
0.1
16/28
Pout = 140mW
RL = 16Ω, Vcc = 3.3V
Gv = 2, Cb = 1µF
BW < 125kHz
Tamb = 25°C
Fig. 67 : THD + N vs Frequency
0.01
Pout = 160mW
1E-3
20
Pout = 280mW
0.1
100
0.1
RL = 16Ω, Vcc = 2.6V
Gv = 2, Cb = 1µF
BW < 125kHz
Tamb = 25°C
1000
Frequency (Hz)
10000
Pout = 160mW
Pout = 80mW
0.01
20
100
1000
Frequency (Hz)
10000
TS4972
Fig. 69 : Signal to Noise Ratio vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
Fig. 70 : Signal to Noise Ratio vs Power Supply
with Unweighted Filter (20Hz to 20kHz)
100
90
90
80
SNR (dB)
SNR (dB)
80
RL=4Ω
RL=8Ω
RL=16Ω
70
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
60
50
2.5
RL=8Ω
3.0
3.5
4.0
4.5
RL=16Ω
70
RL=4Ω
Gv = 10
Cb = Cin = 1µF
THD+N < 0.7%
Tamb = 25°C
60
50
2.5
5.0
3.0
3.5
4.0
4.5
5.0
Vcc (V)
Vcc (V)
Fig. 71 : Signal to Noise Ratio vs Power Supply
with Weighted Filter Type A
Fig. 72 : Signal to Noise Ratio vs Power Supply
with Weighted Filter Type A
110
100
100
90
SNR (dB)
SNR (dB)
90
RL=4Ω
RL=8Ω
RL=16Ω
80
Gv = 2
Cb = Cin = 1µF
THD+N < 0.4%
Tamb = 25°C
70
60
2.5
3.0
3.5
4.0
4.5
RL=8Ω
RL=16Ω
80
RL=4Ω
Gv = 10
Cb = Cin = 1µF
THD+N < 0.7%
Tamb = 25°C
70
60
2.5
5.0
3.0
3.5
Fig. 73 : Frequency Response Gain vs Cin, &
Cfeed
7
5
6
Cfeed = 680pF
-15
-20
-25
10
Cin = 470nF
Icc (mA)
Gain (dB)
-10
Cfeed = 2.2nF
Vstandby = 0V
Tamb = 25°C
4
3
2
Cin = 22nF
Cin = 82nF
5.0
5
Cfeed = 330pF
-5
4.5
Fig. 74 : Current Consumption vs Power
Supply Voltage
10
0
4.0
Vcc (V)
Vcc (V)
Rin = Rfeed = 22kΩ
Tamb = 25°C
1
0
100
1000
Frequency (Hz)
10000
0
1
2
3
4
5
Vcc (V)
17/28
TS4972
Fig. 75 : Current Consumption vs Standby
Voltage @ Vcc = 5V
Fig. 76 : Current Consumption vs Standby
Voltage @ Vcc = 3.3V
6
7
Vcc = 5V
Tamb = 25°C
6
5
4
Icc (mA)
Icc (mA)
Vcc = 3.3V
Tamb = 25°C
5
4
3
3
2
2
1
1
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.0
5.0
0.5
1.0
Vstandby (V)
2.0
2.5
3.0
Fig. 78 : Clipping Voltage vs Power Supply
Voltage and Load Resistor
Fig. 77 : Current Consumption vs Standby
Voltage @ Vcc = 2.6V
0.6
6
Vout1 & Vout2
Clipping Voltage High side (V)
Vcc = 2.6V
Tamb = 25°C
5
4
Icc (mA)
1.5
Vstandby (V)
3
2
1
Tamb = 25°C
RL = 4Ω
0.5
0.4
RL = 8Ω
0.3
0.2
0.1
RL = 16Ω
0
0.0
0.5
1.0
1.5
Vstandby (V)
2.0
0.0
2.5
2.5
Vout1 & Vout2
Clipping Voltage Low side (V)
0.7
RL = 4Ω
Tamb = 25°C
0.5
0.4
RL = 8Ω
0.3
0.2
0.1
RL = 16Ω
0.0
2.5
3.0
3.5
4.0
Power supply Voltage (V)
18/28
3.5
4.0
Power supply Voltage (V)
Fig. 79 : Clipping Voltage vs Power Supply
Voltage and Load Resistor
0.6
3.0
4.5
5.0
4.5
5.0
TS4972
APPLICATION INFORMATION
Fig. 80 : Demoboard Schematic
S1
VCC
VCC
C1
Vcc
S2
GND
R2
C2
GND
R1
VCC
+
C6
100µ
P1
Neg. Input
C7
100n
U1
6
C3
R3
S6
C5
R4
1
Vin-
P2
OUT1
VC
C
-
C9
Vout 1
Pos. Input
C4
R5
7
Vin+
8
+
S3
+
470µ
GND
S4
GND
S5
R6
S7
Positive Input mode
AV = -1
VCC
R7
100k
3
Bypass
5
Standby
C10
Vout 2
4
+
+
OUT2
470µ
Bias
S8
R8
1k
G
Standby
C11
+
C12
1u
+
TS4972
2 ND
C8
100n
Fig. 81 : Flip-Chip 300µm Demoboard Components Side
19/28
TS4972
Fig. 82 : Flip-Chip 300µm Demoboard Top
Solder Layer
The output power is:
Pout =
( 2 Vout RMS ) 2
(W )
RL
For the same power supply voltage, the output
power in BTL configuration is four times higher
than the output power in single ended
configuration.
■ Gain In Typical Application Schematic
(cf. page 1)
In flat region (no effect of Cin), the output voltage
of the first stage is:
R fe ed
Vout1 = – Vin -------------------- (V)
Rin
For the second stage : Vout2 = -Vout1 (V)
Fig. 83 : Flip-Chip 300µm Demoboard Bottom
Solder Layer
The differential output voltage is:
Rfee d
Vout2 – Vo ut1 = 2Vin -------------------- (V)
Rin
The differential gain named gain (Gv) for more
convenient usage is:
Vout2 – Vou t1
Rfee d
Gv = --------------------------------------- = 2 -------------------Vin
Rin
Remark : Vout2 is in phase with Vin and Vout1 is
180 phased with Vin. It means that the positive
terminal of the loudspeaker should be connected
to Vout2 and the negative to Vout1.
■ Low and high frequency response
■ BTL Configuration Principle
The TS4972 is a monolithic power amplifier with a
BTL output type. BTL (Bridge Tied Load) means
that each end of the load is connected to two
single ended output amplifiers. Thus, we have :
Single ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
And Vout1 - Vout2 = 2Vout (V)
20/28
In low frequency region, the effect of Cin starts.
Cin with Rin forms a high pass filter with a -3dB cut
off frequency.
1
F C L = -------------------------------- ( Hz )
2 π R in Cin
In high frequency region, you can limit the
bandwidth by adding a capacitor (Cfeed) in
parallel on Rfeed. Its form a low pass filter with a
-3dB cut off frequency.
1
F C H = ----------------------------------------------- ( Hz )
2π Rfe ed Cfeed
TS4972
■ Power dissipation and efficiency
Hypothesis :
The maximum theoretical value is reached when
Vpeak = Vcc, so
π
----- = 78.5%
4
• Voltage and current in the load are sinusoidal
(Vout and Iout)
• Supply voltage is a pure DC source (Vcc)
■ Decoupling of the circuit
Regarding the load we have:
Two capacitors are needed to bypass properly the
TS4972, a power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
V O UT = V PEAK sin ωt (V)
and
V OU T
I OU T = ----------------- (A)
RL
and
2
VPEAK
P O U T = ---------------------- (W)
2 RL
Then, the average current delivered by the supply
voltage is:
I CC
AVG
VPEAK
= 2 -------------------- (A)
πR L
The power delivered by the supply voltage is
Psupply = Vcc IccAVG (W)
Then, the power dissipated by the amplifier is
Pdiss = Psupply - Pout (W)
2 2 Vcc
P di ss = ---------------------- P OU T – P O UT (W)
π RL
and the maximum value is obtained when:
∂Pdiss
---------------------- = 0
∂P OU T
and its value is:
Pdiss max =
2 Vcc
2
π 2RL
(W)
Remark : This maximum value is only depending
on power supply voltage and load values.
The efficiency is the ratio between the output
power and the power supply
πV P E A K
P O UT
η = ------------------------ = ----------------------Psup ply
4V C C
Cs has especially an influence on the THD+N in
high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 100µF, you can expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 100µF, in high frequency
increases, THD+N and disturbances on the power
supply rail are less filtered.
To the contrary, if Cs is higher than 100µF, those
disturbances on the power supply rail are more
filtered.
Cb has an influence on THD+N in lower frequency,
but its function is critical on the final result of PSRR
with input grounded in lower frequency.
If Cb is lower than 1µF, THD+N increase in lower
frequency (see THD+N vs frequency curves) and
the PSRR worsens up
If Cb is higher than 1µF, the benefit on THD+N in
lower frequency is small but the benefit on PSRR
is substantial (see PSRR vs. Cb curve : fig.12).
Note that Cin has a non-negligible effect on PSRR
in lower frequency. Lower is its value, higher is the
PSRR (see fig. 13).
■ Pop and Click performance
Pop and Click performance is intimately linked
with the size of the input capacitor Cin and the bias
voltage bypass capacitor Cb.
Size of Cin is due to the lower cut-off frequency
and PSRR value requested. Size of Cb is due to
THD+N and PSRR requested always in lower
frequency.
Moreover, Cb determines the speed that the
amplifier turns ON. The slower the speed is, the
softer the turn ON noise is.
21/28
TS4972
The charge time of Cb is directly proportional to
the internal generator resistance 50kΩ.
Then, the charge time constant for Cb is
τb = 50kΩxCb (s)
As Cb is directly connected to the non-inverting
input (pin 2 & 3) and if we want to minimize, in
amplitude and duration, the output spike on Vout1
(pin 5), Cin must be charged faster than Cb. The
charge time constant of Cin is
τin = (Rin+Rfeed)xCin (s)
Thus we have the relation
τin << τb (s)
The respect of this relation permits to minimize the
pop and click noise.
Remark : Minimize Cin and Cb has a benefit on
pop and click phenomena but also on cost and
size of the application.
Example : your target for the -3dB cut off
frequency is 100 Hz. With Rin=Rfeed=22 kΩ,
Cin=72nF (in fact 82nF or 100nF).
With Cb=1µF, if you choose the one of the latest
two values of Cin, the pop and click phenomena at
power supply ON or standby function ON/OFF will
be very small
50 kΩx1µF >> 44kΩx100nF (50ms >> 4.4ms).
Increasing Cin value increases the pop and click
phenomena to an unpleasant sound at power
supply ON and standby function ON/OFF.
Why Cs is not important in pop and click
consideration ?
Hypothesis :
• Cs = 100µF
• Supply voltage = 5V
• Supply voltage internal resistor = 0.1Ω
• Supply current of the amplifier Icc = 6mA
At power ON of the supply, the supply capacitor is
charged through the internal power supply
resistor. So, to reach 5V you need about five to ten
times the charging time constant of Cs (τs =
0.1xCs (s)).
Then, this time equal 50µs to 100µs << τb in the
majority of application.
At power OFF of the supply, Cs is discharged by a
constant current Icc. The discharge time from 5V
to 0V of Cs is:
22/28
5Cs
t D i s ch C s = -------------- = 83 ms
Icc
Now, we must consider the discharge time of Cb.
At power OFF or standby ON, Cb is discharged by
a 100kΩ resistor. So the discharge time is about
τbDisch ≈ 3xCbx100kΩ (s).
In the majority of application, Cb=1µF, then
τbDisch≈300ms >> tdischCs.
■ Power amplifier design examples
Given :
•
•
•
•
•
•
•
Load impedance : 8Ω
Output power @ 1% THD+N : 0.5W
Input impedance : 10kΩ min.
Input voltage peak to peak : 1Vpp
Bandwidth frequency : 20Hz to 20kHz (0, -3dB)
Ambient temperature max = 50°C
SO8 package
First of all, we must calculate the minimum power
supply voltage to obtain 0.5W into 8Ω. With curves
in fig. 15, we can read 3.5V. Thus, the power
supply voltage value min. will be 3.5V.
Following
equation
the
maximum
Pdiss max =
power
2 Vcc 2
π2RL
dissipation
(W)
with 3.5V we have Pdissmax=0.31W.
Refer to power derating curves (fig. 20), with
0.31W the maximum ambient temperature will be
100°C. This last value could be higher if you follow
the example layout shown on the demoboard
(better dissipation).
The gain of the amplifier in flat region will be:
V OUTP P 2 2 R L P OUT
G V = --------------------- = ------------------------------------ = 5.65
VINPP
VINPP
We have Rin > 10kΩ. Let's take Rin = 10kΩ, then
Rfeed = 28.25kΩ. We could use for Rfeed = 30kΩ
in normalized value and the gain will be Gv = 6.
TS4972
In lower frequency we want 20 Hz (-3dB cut off
frequency). Then:
Designator
Part Type
1
C IN = ------------------------------ = 795nF
2π RinF C L
R8
Short Circuit
C5
470nF
So, we could use for Cin a 1µF capacitor value
which gives 16Hz.
C6
100µF
C7
100nF
In Higher frequency we want 20kHz (-3dB cut off
frequency). The Gain Bandwidth Product of the
TS4972 is 2MHz typical and doesn't change when
the amplifier delivers power into the load.
The first amplifier has a gain of:
C9
Short Circuit
C10
Short Circuit
C12
1µF
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
S8
3 pts connector 2.54mm
pitch
P1
SMB Plug
Rfee d
----------------- = 3
R in
and the theoretical value of the -3dB cut-off higher
frequency is 2MHz/3 = 660kHz.
We can keep this value or limit the bandwidth by
adding a capacitor Cfeed, in parallel on Rfeed.
Then:
1
C FE E D = --------------------------------------- = 265pF
2π R F E E D F C H
Application n°2 : 20Hz to 20kHz bandwidth and
20dB gain BTL power amplifier.
Components :
Designator
So, we could use for Cfeed a 220pF capacitor
value that gives 24kHz.
Now, we can calculate the value of Cb with the
formula τb = 50kΩxCb >> τin = (Rin+Rfeed)xCin
which permits to reduce the pop and click effects.
Then Cb >> 0.8µF.
We can choose for Cb a normalized value of 2.2µF
that gives good results in THD+N and PSRR.
In the following tables, you could find three
another examples with values required for the
demoboard.
Application n°1 : 20Hz to 20kHz bandwidth and
6dB gain BTL power amplifier.
Components :
Designator
R1
Part Type
R1
110k / 0.125W
R4
22k / 0.125W
R6
Short Cicuit
R7
100k / 0.125W
R8
Short Cicuit
C5
470nF
C6
100µF
C7
100nF
C9
Short Circuit
C10
Short Circuit
C12
1µF
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
S8
3 pts connector 2.54mm
pitch
P1
SMB Plug
22k / 0.125W
R4
22k / 0.125W
R6
Short Cicuit
R7
100k / 0.125W
Part Type
23/28
TS4972
Application n°3 : 50Hz to 10kHz bandwidth and
10dB gain BTL power amplifier.
Fig. 84 : Minimum Differential Gain vs Power Supply
Voltage
Components :
40
Designator
Part Type
33k / 0.125W
R2
Short Circuit
R4
22k / 0.125W
R6
Short Cicuit
R7
100k / 0.125W
R8
Short Cicuit
C2
470pF
C5
150nF
C6
100µF
C7
100nF
C9
Short Circuit
C10
Short Circuit
C12
1µF
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
S8
3 pts connector 2.54mm
pitch
P1
SMB Plug
Differential Gain min. (dB)
35
R1
30
25
20
15
10
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
5.0
5.5
For Vcc=5V, a 20Hz to 20kHz bandwidth and 20dB
gain BTL power amplifier you could follow the bill
of material below.
Components :
Designator
Part Type
R1
110k / 0.125W
R4
22k / 0.125W
R5
22k / 0.125W
R6
110k / 0.125W
R7
100k / 0.125W
Application n°4 : Differential inputs BTL power
amplifier.
R8
Short circuit
C4
470nF
In this configuration, we need to place these
components : R1, R4, R5, R6, R7, C4, C5, C12.
C5
470nF
C6
100µF
C7
100nF
C9
Short Circuit
C10
Short Circuit
C12
1µF
S1, S2, S6, S7
2mm insulated Plug
10.16mm pitch
We have also : R4 = R5, R1 = R6, C4 = C5.
The differential gain of the amplifier is:
R1
G V D I FF = 2 -------R4
Note : Due to the VICM range (see Operating
Condition), GVDIFF must have a minimum value
shown in figure 84.
24/28
S8
3 pts connector 2.54mm
pitch
P1, P2
SMB Plug
TS4972
■ Note on how to use the PSRR curves
How we measure the PSRR ?
(page 7)
We have finished a design and we have chosen
the components values :
Fig. 86 : PSRR measurement schematic
Rfeed
• Rin=Rfeed=22kΩ
• Cin=100nF
• Cb=1µF
Vripple
VCC
6
Vcc
1
Vin-
-
7
Vin+
+
Vout 1
The process to obtain the final curve (Cb=100µF,
Cin=100nF, Rin=Rfeed=22kΩ) is a simple transfer
point by point on each frequency of the curve on
fig. 13 to the curve on fig. 12.
The measurement result is shown on the next
figure.
Fig. 85 : PSRR changes with Cb
Rin
8
Vs-
RL
Cin
AV = -1
Rg
100 Ohms
3
Bypass
5
Standby
Vout 2
4
Vs+
+
Bias
GND
Now, on fig. 13, we can see the PSRR (input
grounded) vs frequency curves. At 217Hz we have
a PSRR value of -36dB.
In reality we want a value about -70dB. So, we
need a gain of 34dB !
Now, on fig. 12 we can see the effect of Cb on the
PSRR (input grounded) vs. frequency. With
Cb=100µF, we can reach the -70dB value.
TS4972
Cb
2
■ Principle of operation
• We fixed the DC voltage supply (Vcc)
• We fixed the AC sinusoidal ripple voltage
(Vripple)
• No bypass capacitor Cs is used
The PSRR value for each frequency is:
PSRR (dB)
-40
PSRR ( d B ) = 20 x Log 10
Vcc = 5, 3.3 & 2.6V
Rfeed = 22k, Rin = 22k
Rg = 100Ω, RL = 8Ω
Tamb = 25°C
-30
Cin=100nF
Cb=1µF
Remark : The measure of the Rms voltage is not a
Rms selective measure but a full range (2 Hz to
125 kHz) Rms measure. It means that we
measure the effective Rms signal + the noise.
-50
-60
R ms ( V r i p pl e )
--------------------------------------------Rms ( Vs + - Vs - )
Cin=100nF
Cb=100µF
-70
10
100
1000
10000
100000
Frequency (Hz)
■ Note on PSRR measurement
What is the PSRR ?
The PSRR is the Power Supply Rejection Ratio.
It's a kind of SVR in a determined frequency range.
The PSRR of a device, is the ratio between a
power supply disturbance and the result on the
output. We can say that the PSRR is the ability of
a device to minimize the impact of power supply
disturbances to the output.
25/28
TS4972
Fig. 87 :TS4972 Footprint Recommendation (Non Solder Mask Defined)
500µm
500µm
75µm min.
100µm max.
Φ=250µm
Φ=400µm
150µm min.
500µm
500µm
Track
Solder mask opening
Pad in Cu 35µm with Flash NiAu (6µm, 0.15µm)
TOP VIEW OF THE DAISY CHAIN MECHANICAL DATA ( all drawings dimensions are in millimeters )
8
7
6
5
Vin+
Vcc
Stdby
Vout1
Vout2
Vin
Gnd
1
2
4 1.6 mm
Bypass
3
2.26 mm
REMARKS
Daisy chain sample is featuring pins connection two by two. The schematic above is illustrating the way
connecting pins each other. This sample is used for testing continuity on board. PCB needs to be designed
on the opposite way, where pin connections are not done on daisy chain samples. By that way, just
connecting an Ohmeter between pin 8 and pin 1, the soldering process continuity can be tested.
ORDER CODE
Part Number
TSDC03IJT
26/28
Temperature
Range
Package
-40, +85°C
•
Marking
J
DC3
TS4972
TAPE & REEL SPECIFICATION ( top view )
User direction of feed
4972
A72
4972
A72
27/28
TS4972
PIN OUT (Top View)
7
+
Vin
8
MARKING (Top View)
6
5
Vcc
Stdby
Vout2
Vout1
Vin
Gnd
Bypass
1
2
3
4
■ Balls are underneath
PACKAGE MECHANICAL DATA
FLIP CHIP - 8 BUMPS
0.5
0.5
0.5
1.6
0.5
■
■
■
■
■
Die size : (2.26mm ±10%) x (1.6mm ±10%)
Die height (including bumps) : 650µm ± 50
Bumps diameter : 315µm ±15µm
Silicon thickness : 400µm ±25µm
Pitch: 500µm ±10µm
2.26
400µm
650µm
250µm
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2003 STMicroelectronics - Printed in Italy - All Rights Reserved
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