WS27C010L Military 128K x 8 CMOS EPROM KEY FEATURES • High Performance CMOS • DESC SMD No. 5962-89614 • Compatible with JEDEC 27010 and — 90 ns Access Time 27C010 EPROMs • Fast Programming • EPI Processing • JEDEC Standard Pin Configuration — Latch-Up Immunity to 200 mA — ESD Protection Exceeds 2000 Volts — 32 Pin CERDIP Package — 32 Pin Leadless Chip Carrier (CLLCC) GENERAL DESCRIPTION The WS27C010L is a performance oriented 1 Meg UV Erasable Electrically Programmable Read Only Memory organized as 128K words x 8 bits/word. It is manufactured using an advanced CMOS technology which enables it to operate at data access times as fast as 120 nsecs. The memory was designed utilizing WSI's patented self-aligned split gate EPROM cell, resulting in a low power device with a very cost effective die size. The WS27C010L 1 Meg EPROM provides extensive code store capacity for microprocessor, DSP, and microcontroller-based systems. Its 120 nsec access time over the full Military temperature range provides the potential of no-wait state operation. And where this parameter is important, the WS27C010L provides the user with a very fast 35 nsec TOE output enable time. The WS27C010L is offered in both a 32 pin 600 mil CERDIP, and a 32 pad Ceramic Leadless Chip Carrier (CLLCC) for surface mount applications. Its standard JEDEC EPROM pinouts provide for automatic upgrade density paths for existing 128K and 256K EPROM users. PIN CONFIGURATION TOP VIEW CERDIP A12 A15 A16 VPP VCC PGM NC Chip Carrier 4 3 2 32 31 30 1 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12 22 13 21 14 15 16 17 18 19 20 O1 O2 GND A7 A6 A5 A4 A3 A2 A1 A0 O0 VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND A14 A13 A8 A9 A11 OE A10 CE O7 O3 O4 O5 O6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM NC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 PRODUCT SELECTION GUIDE PARAMETER 27C010L-90 27C010L-12 27C010L-15 27C010L-17 27C010L-20 Address Access Time (Max) 90 ns 120 ns 150 ns 170 ns 200 ns Chip Select Time (Max) 90 ns 120 ns 150 ns 170 ns 200 ns Output Enable Time (Max) 35 ns 35 ns 40 ns 40 ns 40 ns Return to Main Menu 4-25 WS27C010L ABSOLUTE MAXIMUM RATINGS* *NOTICE: Storage Temperature............................–65° to + 150°C Voltage on any Pin with Respect to Ground ....................................–0.6V to +7V VPP with Respect to Ground...................–0.6V to + 14V VCC Supply Voltage with Respect to Ground ....................................–0.6V to +7V ESD Protection ..................................................> 2000V Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. OPERATING RANGE RANGE TEMPERATURE VCC Military –55°C to +125°C +5V ± 10% DC READ CHARACTERISTICS Over Operating Range. (See Above) SYMBOL PARAMETER TEST CONDITIONS MIN MAX UNITS VIL Input Low Voltage –0.5 0.8 V VIH Input High Voltage 2.0 VCC + 1 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V VOH Output High Voltage IOH = –400 µA ISB1 VCC Standby Current (CMOS) CE = VCC ± 0.3 V (Note 2) ISB2 VCC Standby Current CE = VIH ICC VCC Active Current (TTL) CE = OE = VIL (Note 1) IPP VPP Supply Current VPP = VCC VPP VPP Read Voltage ILI Input Leakage Current ILO Output Leakage Current 3.5 V 100 µA 1 mA F = 5 MHz 50 mA F = 8 MHz 60 mA 100 µA VCC –0.4 VCC V VIN = 5.5 V or Gnd –10 10 µA VOUT = 5.5 V or Gnd –10 10 µA NOTES: 1. The supply current is the sum of ICC and IPP. The maximum current value is with Outputs O 0 to O 7 unloaded. 2. CMOS inputs: VIL = GND ± 0.3V, VIH = VCC ± 0.3 V. AC READ CHARACTERISTICS Over Operating Range with VPP = VCC. -90 -12 -15 -17 -20 UNITS SYMBOL PARAMETER tACC Address to Output Delay 90 120 150 170 200 tCE CE to Output Delay 90 120 150 170 200 tOE OE to Output Delay 35 35 40 40 40 tDF Output Disable to Output Float (Note 3) 35 35 40 40 40 tOH Output Hold from Addresses, CE or OE, Whichever Occurred First (Note 3) NOTE: 4-26 MIN 0 MAX MIN 0 MAX MIN 0 MAX MIN 0 MAX MIN MAX ns 0 3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven – see timing diagram. WS27C010L AC READ TIMING DIAGRAM VIH ADDRESS VALID ADDRESSES VIL VIH CE VIL tCE (4) VIH OE (5) tDF VIL (4) tOE tACC VIH tOH HIGH Z OUTPUT HIGH Z VALID OUTPUT VIL NOTE: 4. OE may be delayed up to t CE – t OE after the falling edge of CE without impact on t CE. CAPACITANCE (5) TA = 25°C, f = 1 MHz PARAMETER CONDITIONS TYP (6) MAX UNITS Input Capacitance VIN = 0V 4 6 pF C OUT Output Capacitance VOUT = 0V 8 12 pF C VPP VPP Capacitance VPP = 0 V 18 25 pF SYMBOL C IN NOTES: 5. This parameter is only sampled and is not 100% tested. 6. Typical values are for TA = 25°C and nominal supply voltages. TEST LOAD (High Impedance Test Systems) A.C. TESTING INPUT/OUTPUT WAVEFORM 820 Ω 2.01 V D.U.T. 2.4 100 pF (INCLUDING SCOPE AND JIG CAPACITANCE) 0.4 2.0 0.8 2.0 TEST POINTS 0.8 A.C. testing inputs are driven at 2.4 V for a logic "1" and 0.4 V for a logic "0." Timing measurements are made at 2.0 V for a logic "1" and 0.8 V for a logic "0". NOTE: 7. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters. A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between VCC and ground is recommended. Inadequate decoupling may result in access time degradation or other transient performance failures. 4-27 WS27C010L PROGRAMMING INFORMATION DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 ± 0.25 V, VPP = 12.75 ± 0.25 V. See Notes 8, 9 and 10) SYMBOLS PARAMETER MIN MAX UNITS –10 10 µA ILI Input Leakage Current (VIN = VCC or Gnd) IPP VPP Supply Current During Programming Pulse (CE = PGM = VIL ) 60 mA ICC VCC Supply Current 50 mA VIL Input Low Voltage –0.1 0.8 V VIH Input High Voltage 2.0 VCC + 0.3 V VOL Output Low Voltage During Verify (IOL = 2.1 mA) 0.4 V VOH Output High Voltage During Verify (IOH = –400 µA) 3.5 V NOTES: 8. VCC must be applied either coincidentally or before VPP and removed either coincidentally or after VPP. 9. VPP must not be greater than 14 volts including overshoot. During CE = PGM = VIL, VPP must not be switched from 5 volts to 12.75 volts or vice-versa. 10. During power up the PGM pin must be brought high (≥ VIH) either coincident with or before power is applied to VPP. AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 ± 0.25 V, VPP = 12.75 ± 0.25 V) SYMBOLS PARAMETER MIN TYP MAX tAS Address Setup Time 2 µs tOES Output Enable Setup Time 2 µs tOS Data Setup Time 2 µs tAH Address Hold Time 0 µs tOH Data Hold Time 2 µs tDF Chip Disable to Output Float Delay 0 tOE Data Valid From Output Enable t VS /t CES VPP Setup Time/CE Setup Time tPW PGM Pulse Width 3 tAS tAH VPP tVS tCES VIL tPW VIH OE VIL DATA OUT VALID tOE VIL VIH PGM tOH VPP VCC VIH CE HIGH Z DATA IN STABLE tOS 55 ns 4 ADDRESS STABLE DATA ns µs 0.1 ADDRESSES 55 2 PROGRAMMING WAVEFORM 4-28 UNITS tOES tDF ms WS27C010L MODE SELECTION The modes of operation of the WS27C010L are listed below. A single 5 V power supply is required in the read mode. All inputs are TTL levels except for VPP and A 9 for device signature. PINS CE OE PGM A9 A0 VPP VCC OUTPUTS Read VIL VIL X (11) X X X 5.0 V DOUT Output Disable X VIH X X X X 5.0 V High Z VIH X X X X X 5.0 V High Z 6.0 V DIN 6.0 V DOUT 5.0 V High Z MODE Standby Programming VIL VIH VIL X X Program Verify VIL VIL VIH X X VIH X X X X VPP(12) VPP(12) VPP(12) VH(12) VH(12) VIL X 5.0 V 23 H VIH X 5.0 V C1 H Program Inhibit Signature Manufacturer (13) VIL VIL X Device(13) VIL VIL X NOTES: 11. X can be VIL or VIH. 12. VH = VPP = 12.75 ± 0.25 V. 13. A1 – A8, A10 – A16 = VIL. ORDERING INFORMATION PART NUMBER WS27C010L-12CMB* WS27C010L-12DMB* WS27C010L-15CMB WS27C010L-15DMB WS27C010L-17CMB* WS27C010L-17DMB* WS27C010L-20CMB* WS27C010L-20DMB* SPEED (ns) PACKAGE TYPE 120 120 150 150 170 170 200 200 32 Pad CLLCC 32 Pin CERDIP, 0.6" 32 Pad CLLCC 32 Pin CERDIP, 0.6" 32 Pad CLLCC 32 Pin CERDIP, 0.6" 32 Pad CLLCC 32 Pin CERDIP, 0.6" WSI PACKAGE OPERATING TEMPERATURE MANUFACTURING DRAWING RANGE PROCEDURE C2 D4 C2 D4 C2 D4 C2 D4 Military Military Military Military Military Military Military Military MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C NOTE: 14. The actual part marking will not include the initials "WS." *SMD product. See page 4-2 for SMD number. PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS REFER TO PAGE 5-1 The WS27C010L is programmed using Algorithm E shown on page 5-11. (This product can also be programmed by using National Semiconductor's 27C010 Programming Algorithm.) Return to Main Menu 4-29