CENTRAL CMLDM8120G

CMLDM8120
CMLDM8120G*
SURFACE MOUNT
P-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFET
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
These CENTRAL SEMICONDUCTOR devices
are Enhancement-mode P-Channel Field Effect
Transistors, manufactured by the P-Channel DMOS
Process, designed for high speed pulsed amplifier and
driver applications. This MOSFET offers Low rDS(on)
and Low Theshold Voltage.
MARKING CODES:
CMLDM8120:
C81
CMLDM8120G*: C8G
SOT-563 CASE
* Device is Halogen Free by design
APPLICATIONS:
FEATURES:
• Load/Power Switches
• Power Supply Converter Circuits
• Battery Powered Portable Equipment
•
•
•
•
Low rDS(on)
Low Threshold Voltage
Logic Level Compatible
Small SOT-563 package
MAXIMUM RATINGS: (TA=25°C)
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Steady State)
Continuous Drain Current, t≤5.0s
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current, tp=10μs
Maximum Pulsed Source Current, tp=10μs
Power Dissipation (Note 1)
Power Dissipation (Note 2)
Power Dissipation (Note 3)
Operating and Storage Junction Temperature
Thermal Resistance
SYMBOL
VDS
VGS
ID
ID
IS
IDM
ISM
PD
PD
PD
TJ, Tstg
ΘJA
20
8.0
860
950
360
4.0
4.0
350
300
150
-65 to +150
357
ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
TYP
IGSSF, IGSSR
VGS=8.0V, VDS=0
1.0
IDSS
VDS=20V, VGS=0
5.0
BVDSS
VGS=0, ID=250μA
20
24
VGS(th)
VDS=VGS, ID=250μA
0.45
0.76
VSD
VGS=0V, IS=360mA
rDS(ON)
VGS=4.5V, ID=0.95A
0.085
rDS(ON)
VGS=4.5V, ID=0.77A
0.085
rDS(ON)
VGS=2.5V, ID=0.67A
0.13
rDS(ON)
VGS=1.8V, ID=0.2A
0.19
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm2
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm2
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm2
MAX
50
500
1.0
0.9
0.15
0.142
0.20
0.24
UNITS
V
V
mA
mA
mA
A
A
mW
mW
mW
°C
°C/W
UNITS
nA
nA
V
V
V
Ω
Ω
Ω
Ω
R3 (18-January 2010)
CMLDM8120
CMLDM8120G*
SURFACE MOUNT
P-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFET
ELECTRICAL CHARACTERISTICS - Continued: (TA=25°C unless otherwise noted)
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
gFS
VDS=10V, ID=0.81A
2.0
Crss
VDS=16V, VGS=0, f=1.0MHz
80
Ciss
VDS=16V, VGS=0, f=1.0MHz
200
Coss
VDS=16V, VGS=0, f=1.0MHz
60
ton
VDD=10V, VGS=4.5V, ID=0.95A, RG=6Ω
20
toff
VDD=10V, VGS=4.5V, ID=0.95A, RG=6Ω
25
UNITS
S
pF
pF
pF
ns
ns
SOT-563 CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Drain
2) Drain
3) Gate
4) Source
5) Drain
6) Drain
MARKING CODES:
CMLDM8120: C81
CMLDM8120G*: C8G
* Device is Halogen Free by design
R3 (18-January 2010)
w w w. c e n t r a l s e m i . c o m