CENTRAL CMLDM7002AJ

CMLDM7002A
CMLDM7002AJ
SURFACE MOUNT PICOminiTM
DUAL N-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFET
SOT-563 CASE
MAXIMUM RATINGS (TA=25°C)
Drain-Source Voltage
Drain-Gate Voltage
Gate-Source Voltage
Continuous Drain Current
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current
Maximum Pulsed Source Current
Power Dissipation
Power Dissipation
Power Dissipation
Operating and Storage
Junction Temperature
Thermal Resistance
Central
TM
Semiconductor Corp.
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMLDM7002A
and CMLDM7002AJ are special dual versions of the
2N7002 Enhancement-mode N-Channel Field Effect
Transistor, manufactured by the N-Channel DMOS
Process, designed for high speed pulsed amplifier and
driver applications. The CMLDM7002A utilizes the USA
pinout configuration, while the CMLDM7002AJ utilizes the
Japanese pinout configuration. These special Dual
Transistor devices offer low rDS(ON) and low VDS (ON).
MARKING CODE: CMLDM7002A: L02
CMLDM7002AJ: 02J
SYMBOL
VDS
VDG
VGS
ID
IS
IDM
ISM
PD
PD
PD
60
60
40
280
280
1.5
1.5
350
300
150
TJ,Tstg
ΘJA
-65 to +150
357
UNITS
V
V
V
mA
mA
A
A
mW (Note 1)
mW (Note 2)
mW (Note 3)
°C
°C/W
ELECTRICAL CHARACTERISTICS PER TRANSISTOR (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
MAX
IGSSF
VGS=20V, VDS=0V
100
IGSSR
VGS=20V, VDS=0V
100
IDSS
VDS=60V, VGS=0V
1.0
IDSS
VDS=60V, VGS=0V, Tj=125°C
500
ID(ON)
VGS=10V, VDS ≥ 2VDS(ON)
500
BVDSS
VGS=0V, ID=10µA
60
VGS(th)
VDS=VGS, ID=250µA
1.0
2.5
VDS(ON)
VGS=10V, ID=500mA
1.0
VDS(ON)
VGS=5.0V, ID=50mA
0.15
rDS(ON)
VGS=10V, ID=500mA
2.0
rDS(ON)
VGS=10V, ID=500mA, Tj=125°C
3.5
rDS(ON)
VGS=5.0V, ID=50mA
3.0
rDS(ON)
VGS=5.0V, ID=50mA, Tj=125°C
5.0
gFS
VDS ≥ 2VDS(ON), ID=200mA
80
UNITS
nA
nA
µA
µA
mA
V
V
V
V
Ω
Ω
Ω
Ω
mmhos
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0 mm2
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0 mm2
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4 mm2
R3 (19-December 2003)
Central
CMLDM7002A
CMLDM7002AJ
TM
SURFACE MOUNT PICOminiTM
DUAL N-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFET
Semiconductor Corp.
ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued (TA=25°C unless otherwise noted)
SYMBOL
TEST CONDITIONS
MIN
MAX
UNITS
Crss
VDS=25V, VGS=0, f=1.0MHz
5.0
pF
Ciss
VDS=25V, VGS=0, f=1.0MHz
50
pF
Coss
VDS=25V, VGS=0, f=1.0MHz
25
pF
ton
VDD=30V, VGS=10V, ID=200mA,
20
ns
toff
RG=25Ω, RL=150Ω
20
ns
VSD
VGS=0V, IS=400mA
1.2
V
SOT-563 CASE - MECHANICAL OUTLINE
D
E
A
6
E
5
4
B
G
1
C
F
3
2
H
CMLDM7002A (USA Pinout)
R0
CMLDM7002AJ (Japanese Pinout)
LEAD CODE:
1) GATE Q1
2) SOURCE Q1
3) DRAIN Q2
4) GATE Q2
5) SOURCE Q2
6) DRAIN Q1
LEAD CODE:
1) SOURCE Q1
2) GATE Q1
3) DRAIN Q2
4) SOURCE Q2
5) GATE Q2
6) DRAIN Q1
MARKING CODE: L02
MARKING CODE: 02J
R3 (19-December 2003)