Revised February 2000 DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The DM74ALS109A is a dual edge-triggered flip-flop. Each flip-flop has individual J, K, clock, clear and preset inputs, and also complementary Q and Q outputs. ■ Switching specifications at 50 pF Information at input J or K is transferred to the Q output on the positive going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive going pulse. When the clock input is at either the HIGH or LOW level, the J, K input signal has no effect. ■ Advanced oxide-isolated, ion-implanted Schottky TTL process Asynchronous preset and clear inputs will set or clear Q output respectively upon the application of low level signal. ■ Switching specifications guaranteed over full temperature and VCC range ■ Functionally and pin for pin compatible with Schottky and LS TTL counterpart ■ Improved AC performance over LS109 at approximately half the power The J-K design allows operation as a D flip-flop by tying the J and K inputs together. Ordering Code: Order Number Package Number DM74ALS109AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Description DM74ALS109AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Inputs Outputs PR CLR CK J K Q L H X X X H Q L H L X X X L H L L X X X H (Note 1) H (Note 1) H H ↑ L L L H H H ↑ H L H H ↑ L H Q0 H H ↑ H H H L H H L X X Q0 Q0 TOGGLE Q0 L = LOW State H = HIGH State X = Don't Care ↑ = Positive Edge Transition, Q0 = Previous Condition of Q Note 1: This condition is nonstable; it will not persist when present and clear inputs return to their inactive (HIGH) level. The output levels in this condition are not guaranteed to meet the VOH specification. © 2000 Fairchild Semiconductor Corporation DS006196 www.fairchildsemi.com DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear April 1984 DM74ALS109A Logic Diagram www.fairchildsemi.com 2 Supply Voltage 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. −65°C to +150°C Storage Temperature Range Typical θJA N Package 82.5°C/W M Package 111.5°C/W Recommended Operating Conditions Symbol Parameter Min Nom Max 4.5 5 5.5 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.4 mA IOL LOW Level Output Current fCLK Clock Frequency tW(CLK) Pulse Width tW tSU V 2 0 V 8 mA 34 MHz Clock HIGH 14.5 Clock LOW 14.5 ns 15 ns ns Pulse Width (Note 3) Preset and Clear Data Setup Time J or K 15↑ (Note 3) PRE or CLR inactive 10↑ tH Data Hold Time 0↑ TA Free Air Operating Temperature 0 ns ns 70 °C Note 3: The (↑) arrow indicates the positive edge of the Clock is used for reference. 3 www.fairchildsemi.com DM74ALS109A Absolute Maximum Ratings(Note 2) DM74ALS109A Electrical Characteristics over recommended operating free-air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level IOH = −400 µA Output Voltage VCC = 4.5V to 5.5V VOL II IIH Min Typ Max Units −1.5 V VCC − 2 V LOW Level VCC = 4.5V Output Voltage VIH = 2V Input Current at Max VCC = 5.5V, Clock, J, K 0.1 Input Voltage VIH = 7V Preset, Clear 0.2 High Level VCC = 5.5V, Clock, J, K 20 Input Current VIH = 2.7V Preset, Clear 40 IOL = 4 mA 0.25 0.4 V IOL = 8 mA 0.35 0.5 V mA Low Level VCC = 5.5V, Clock, J, K −0.2 Input Current VIL = 0.4V Preset, Clear −0.4 IO (Note 4) Output Drive Current VCC = 5.5V, VO = 2.25V ICC Supply Current VCC = 5.5V (Note 5) IIL −30 2.4 µA mA −112 mA 4 mA Note 4: The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit output current, IOS. Note 5: ICC is measured with J, K, CLK and PRESET grounded, then with J, K, CLK and CLEAR grounded. Switching Characteristics over recommended operating free air temperature range Symbol Parameter Conditions fMAX Maximum Clock Frequency VCC = 4.5V to 5.5V tPLH Propagation Delay Time RL = 500Ω LOW-to-HIGH Level Output CL = 50 pF tPHL From Propagation Delay Time Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output www.fairchildsemi.com Min Max 34 HIGH-to-LOW Level Output tPLH To 4 Units MHz Preset or Clear Q or Q 3 13 ns Preset or Clear Q or Q 5 15 ns Clock Q or Q 5 16 ns Clock Q or Q 5 18 ns DM74ALS109A Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6