SANYO LC823410-10R

Ordering number : ENA1696
CMOS IC
LC823410-10R
Ultra-Low Power Consumption 7.0mW
Large-Scale System LSI, GokLow,
for IC Recorders
Overview
The LC823410-10R is a system IC that uses ultra-low power consumption technology to realize long-time playback and
recording, and has various IC recorder functions. The IC is optimal for use in IC recorder applications.
Features
• ARM7TDMI-STM *1, AMBA® (AHB/APB) system
-On-chip SRAM (160kbytes)
-On-chip ROM (256kbytes)
-DMA controller (2 channels)
-Interrupt controller (external 6 channels)
-SIO (2 channels), UART (3 channels, of which 2 channels run on the 12MHz oscillator XT1.)
Continued on next page.
*1: ARM logo, ARM Powered logo and, ARM7TDMI are registered trademark of ARM Limited.
Supply of this product does not convey license nor imply any right to distribute content created with
this product in revenue-generating broadcast systems (terrestrial, satellite, cable and/or other
distribution channels), streaming applications (via Internet, intranets and/or networks), other content
distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media
(compact discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like).
Supply of this product does not convey license under the relevant intellectual property of Thomson
and/or Fraunhofer Gesellschaft nor imply any right to use this product in any finished end user or
ready-to-use final product. An independent license for such use is required. For details, please visit
http://mp3licensing.com/.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
60210HKIM VL-2635 No.A1696-1/23
LC823410-10R
Continued from preceding page.
-I2C (1 channel, single master, full speed mode/standard mode support)
-GPIO (multiplexed port I/O pin, 32 channels)
-Plain timer, multiple timer (2 channels, runs on the 12MHz oscillator XT1)
-10-bit A/D converter (4 channels)
-NAND flash memory I/F (multi-level cell NAND)
4-bit correctable ECC, automatic correction of error bits
-SD card I/F (CPRM not supported) [optional]
SD card clock can be generated through AHB clock.
-Memory stick I/F [optional]
-USB2.0 device I/F with PHY
Communication operation possible even when the AHB runs at a low clock rate. Insertion/extraction detection
possible even when the PHY clock is stopped.
-RTC (realtime clock)
Operation at a voltage independent from the internal core operating voltage, and RTC only power on operation
possible.
-JTAG ICE
• MP3*2 hard-wired encoder/decoder
-MPEG1, MPEG2, MPEG2.5
(Fs=8kHz to 48kHz, 8kbps to 320kbps)
• High quality sound technologies & functions (underlined functions support 96kHz sampling)
-SANYO “AViSS” surround circuit
-YY filter high frequency compensation circuit (2 modes, LP2: High bit rate and LP4: Low bit rate)
-Sampling rate converter. Convertible up to 96kHz (max.) within the range of 0.5 to 64 times
-6-band equalizer. Equalizer characteristics can be adjusted by setting the coefficient.
-Digital volume and mute functions (except the recording system). Both dB and linear rate of change can be
designated.
-Level meter (except the recording system)
-Audio timer function. LR clock count and interrupt generation function
• On-chip 16-bit PCM input/output interface. Master/slave mode, I2S support
• 12MHz oscillator XT1 + PLL dedicated for audio enable audio clock generation
Also supports audio operations using 16.9344MHz oscillator XT2 (optional).
• Supply voltages (typical)
-LOGIC, USB PHY1, XTAL, PLL1, RTC = 1.1V (when no USB devices connected) or 1.5V (when USB devices
connected)
-I/O, ADC, USB PHY2, PLL2 = 2.8V (when no USB devices connected) or 3.3V (when USB devices connected)
*2: MPEG Layer-3 audio coding technology licensed from Fraunhofer IIS and Thomson.
Specifications
Absolute Maximum Ratings at *VSS* = 0V
Parameter
Maximum supply voltage
Symbol
Conditions
Ratings
Unit
VDD1
VDDRTC
VDDXT
AVDDPHY1
-0.3 to 1.8
V
-0.3 to 3.96
V
-0.3 to *VDD*+0.3 (max3.96)
V
-0.3 to 5.25
V
AVDDPLL1
VDD2
VDD3
AVDDADC
AVDDPHY2
AVDDPLL2
Input voltage
VI
VIUSB
DP and DM pins
Operating ambient temperature
Topr
-30 to +70
°C
Storage ambient temperature
Tstg
-55 to 125
°C
No.A1696-2/23
LC823410-10R
Allowable Operating Range at Ta = -30 to +70°C
Parameter
Symbol
Conditions
Low Voltage Operation
min
Supply voltage
High Voltage Operation
max
min
typ
Unit
max
VDD1
1.05
1.1
1.2
1.35
1.5
1.65
V
VDDXT
1.05
1.1
1.2
1.35
1.5
1.65
V
AVDDPLL1
1.05
1.1
1.2
1.35
1.5
1.65
V
AVDDPLL2
2.7
2.8
3.3
2.7
2.8
3.6
V
VDDRTC
0.9
1.1
1.65
0.9
1.5
1.65
V
V
VDD2
2.7
2.8
3.3
2.7
2.8
3.6
VDD3
2.7
2.8
3.3
2.7
2.8
3.6
V
1.7
1.8
1.95
1.7
1.8
1.95
V
AVDDADC
Input voltage
typ
2.7
2.8
3.3
2.7
2.8
3.6
V
AVDDPHY1
1.05(*1)
1.1
1.2
1.35
1.5
1.65
V
AVDDPHY2
2.7(*1)
2.8
3.3
3.0
3.3
*VDD*
0
VIN
0
3.6
V
*VDD*
V
(*1) In the low-voltage operation state, although transition from this state to the high-voltage operation state
and operation after the transition are guaranteed, all operations are not guaranteed in the low-voltage
state.
(*2) The relations below are assumed in all operation states.
• VDD1=VDDXT=AVDDPLL1=AVDDPHY1
• AVDDPHY2>=AVDDADC
• VDD2>=AVDDPLL2
• VDD2>=VDD3
where,
• VDD1, VDDXT, and AVDDHY1 have the same electrical potential because they are connected within the
IC.
• AVDDPLL1>=VDD1
• Besides the above two points, voltage differences up to 0.1V are considered to be equal.
Also, during RTC-only operation,
The above VDDRTC voltage can be applied at BACKUPB = Low input and application of
VDD* = 0V except for VDDRTC.
(*3) Low-voltage operation: This is an operation state that enables low power consumption during music
playback and other operations.
High-voltage operation: This is an operation state on the assumption that USB is used.
Parameter
Symbol
Function
Low Voltage Operation
min
Input oscillation
Fxin1
ARM & Peripherals
frequency
FxinRTC
RTC
Fxin2
AUDIO
typ
High Voltage Operation
max
min
12
Unit
max
12MHz±100p-pm (using USB)
MHz
32.768
32.768
kHz
16.9344
16.9344
MHz
Frc
RC
2
0.4
Internal operating
Fahb
ARM AHB
0
30
frequency
Fapb
ARM APB
0
30
Faud
AUDIO
0
36.864
0
Fsdclk
Normal
SD I/F
0.4
typ
1
16.9344
1
2
MHz
0
60
MHz
0
60
MHz
36.864
MHz
19
24
MHz
16.9344
clock frequency
High speed
25
40
MHz
MS I/F
(VDD3>=2.7V SDDRV=1)
Parallel
30
30
MHz
Serial
20
20
MHz
clock frequency
Fsclk
No.A1696-3/23
LC823410-10R
DC characteristic at Ta = -30 to +70°C, VDD2 = 2.7 to 3.6V, VDDRTC = 0.9 to 1.65V,
VDD3=1.7 to 1.95V, 2.7 to 3.6V
Parameter
Symbol
Pins
Ratings
Conditions
min
Input high level voltage
VIH
(1)
(2)
Schmitt
(3)
Input low level voltage
VIL
typ
0.7×VDD2
V
0.75×VDD2
V
0.7×VDDRTC
V
(1)
(2)
0.3×VDD2
Schmitt
(3)
Output high level voltage
Output low level voltage
VOH
VOL
(4)
Unit
max
IOH=-2mA
V
0.25×VDD2
V
0.2×VDDRTC
V
VDD2-0.4
V
VDD3-0.34
V
(5)
IOH=-4mA
(6)
IOH=-0.3mA
(4)
IOL=2mA
0.4
V
0.34
V
(5)
IOL=4mA
(6)
IOL=0.3mA
Hi-Z output
VDDRTC-0.3
V
-10
0.3
V
10
μA
kΩ
Output leakage current
IOZ
(7)
Pull-up resistor
Rup
(8)
50
100
150
Pull-up resistor
Rup
(9)
30
45
80
kΩ
Pull-down resistor
Rdn
(10)
40
70
160
kΩ
Pull-down resistor
Rdn
(11)
20
50
90
kΩ
(1) FD7-0, SDCMD, SDAT3-0, BCK, LRCK, MCLK, SCL, SDA, TIOCA1-0, SDI1, RXD2-0, SDO0, TXD2-0,
XFCE1-0, PHI, TCK, TDI, TMS, SDI0, DIN, SDCD, SDWP
(2) TEST6-1, NTRST, NRES, EXTINT6-0, EXTFIQ, SCK1-0, XFBSY
(3) BACKUPB, VDET
(4) SCK1-0, FD7-0, EXD15-0, BCK, LRCK, MCLK, SCL, SDA, TIOCA1-0, SDI1, SDI0, RXD2-0, TXD2-0,
XFCE1-0, PHI, EXTFIQ, EXTINT4-0, DOUT, RTCK, TDO, XALE, XCLE, XFRE, XFWE, XFWP
(5) SDCLK, SDCMD, SDAT3-0
(6) RTCINT
(7) SCK1-0, FD7-0, SDCMD, SDAT4-1, BCK, LRCK, MCLK, SCL, SDA, TIOCA1-0, SDI1, RXD2-0, SDO1-0,
TXD2-0, XFCE1-0, PHI, EXTFIQ, EXTINT4-0, RTCK, XALE, XCLE, XFRE, XFWE, XFWP, RTCINT
(8) EXTFIQ, SCK1, SDO1, TXD2-0, RXD2-0, TIOCA1-0, SDI1, EXTINT4-0, XFCE1-0, SCL, SDA, LRCK, MCLK,
PHI, SCK0, SDI0, SDO0, TCK, TDI, TMS, NTRST ,XFWE, XFRE, XALE, XCLE, XFWP
(9) SDCMD, SDAT3-0, SDCD
(10) SDAT3-0
(11) DIN, FD7-0
(Caution)
The following pins are not included in DC characteristics.
RREF, DM, DP, VCNT1, VCNT2, AN3-0, XIN1, XIN2, XIN32K, XOUT1, XOUT2, XOUT32K
No.A1696-4/23
LC823410-10R
PLL1 Characteristics at Ta = -30 to +70°C
Parameter
Symbol
AVDDPLL1=1.05 to 1.2V
Conditions
min
VCO voltage
VCNT1
VCO maximum oscillation
Fmax
max
0
AVDDPLL1
Fmin
Fref
frequency
PLL lock time
Tlock
typ
Unit
max
0
AVDDPLL1
180
frequency
Phase comparison
min
90
frequency
VCO minimum oscillation
typ
AVDDPLL1=1.35 to 1.65V
5
V
MHz
60
60
MHz
30
30
MHz
10
ms
10
5
PLL2 Characteristics at Ta = -30 to +70°C, AVDDPLL2 = 2.7 to 3.6V
Ratings
Parameter
Symbol
Conditions
Unit
min
VCO voltage
VCNT2
VCO maximum oscillation frequency
Fmax
VCO minimum oscillation frequency
Fmin
Phase comparison frequency
Fref
PLL lock time
Tlock
typ
max
0
AVDDPLL2
40
V
MHz
15 (*1)
MHz
17
MHz
15
ms
10
(*1) When a clock with a frequency lower than 15MHz is required, for example 12.288MHz (= 32kHz * 384, audio
circuit operation clock at a sampling frequency of 32kHz), this is generated by frequency dividing the clock by
2 as follows.
12.288MHz = 24.576MHz/2
10-bit AD Converter Characteristics at Ta = 25°C, AVDDADC = 3.3V, AVSSADC = 0V
Ratings
Parameter
Symbol
Conditions
min
typ
ADC power supply
VAVRH
2.7
ADC ground voltage
VAVRL
0
Analog input voltage
VAN
ADC resolution
N
ADC operation clock
FC
ADC conversion frequency
Fs
ADC sample hold time
Twr
Differential linearity error
FDIF
Linearity error
FLN
Zero-scale offset voltage
Vtz
3.6
VAVRL
Pin
V
AVDDADC
V
AVSSADC
VAVRH
V
AN3-AN0
10
Bit
AN3-AN0
16.5
MHz
1.04
MHz
NEFFECT=10
±1.5
LSB
AN3-AN0
NEFFECT=10
±4.0
LSB
AN3-AN0
120
(Transit voltage from 0 to 1)
Full-scale offset voltage
Unit
max
Vtf
(Transit voltage from 1022 to 1023)
After STBY released
ns
VAVRL-0.1
VAVRL
VAVRL+0.1
V
AN3-AN0
VAVRH-0.1
VAVRH
VAVRH+0.1
V
AN3-AN0
μs
Ladder stabilization time (*1)
Tstr
1
Reference resistor (*1)
Rr
770
Ω
Power dissipation (*1)
Pd
15
mW
(*1) All the characteristics are design values.
No.A1696-5/23
LC823410-10R
USB Interface Characteristics at Ta = -30 to +70°C, VDD1=1.35 to 1.65V, AVDDPHY1=1.35 to 1.65V,
AVDDPHY2=3.0 to 3.6V
Ratings
Parameter
Symbol
Conditions
Unit
min
Output pin impedance
ZHSDRV
Includes RS resistor
Bus pull-up resistor on upstream
RPU1
FS idle
RPU2
FS receiving or transmitting
forcing port
Bus pull-up resistor on upstream
forcing port
Termination voltage for upstream
VTERM
forcing port pullup (full-speed)
typ
max
40.5
49.5
Ω
0.900
1.575
kΩ
1.425
3.090
kΩ
3.15
3.45
V
Input levels for full-speed:
High-level input voltage (drive)
VIH
2.0
High-level input voltage (floating)
VIHZ
2.7
Low-level input voltage
VIL
Differential input sensitivity
VDI
|(D+)-(D-)|
Differential common mode range
VCM
Includes VDI range
Refer to figure 2.1
0.8
2.5
V
High-level output voltage
VOH
RL of 14.25kΩ to VSS
2.8
3.6
V
Low-level output voltage
VOL
RL of 1.425kΩ to 3.6V
0.0
0.3
V
Refer to figure 2.1
1.3
2.0
V
100
150
mV
-50
+500
mV
V
3.6
V
0.8
V
0.2
V
Output levels for full-speed:
SE1
VOSE1
Output signal crossover point voltage
VCRS
0.8
V
Input levels for high-speed:
High-speed squelch detection
VHSSQ
threshold (differential signal)
High-speed data signaling common
VHSCM
mode voltage range
High-speed differential input signaling
Refer to figure 2.2
level
Output levels for high-speed:
High-speed idle state
VHSOI
-10.0
+10
mV
High-speed data signaling high
VHSOH
360
440
mV
High-speed data signaling low
VHSOL
-10.0
+10
mV
Chirp J level (different signal)
VCHIRPJ
700
1100
mV
Chirp K level (different signal)
VCHIRPK
-900
-500
mV
1
ms
Time to active-state:
Time from idle (standby/ suspend)
TACT
state to active state (*)
States identified by an asterisk (*)
• Idle (standby/suspend) state: Either one of the following 4 states:
- Either one of AVDDPHY1 and AVDDPHY2 is lower than the guaranteed operating voltage.
- (USB register) DeviceControl: SuspendSts=Susp3endSet=1 (USBPHY suspended state)
- (USB register) DeviceControl: RstPhy=1 (USBPHY reset state)
- (SYSCON register) USBCTL: SHSTBY=1 (USBPHY standby state)
For details on the registers, see the LC823410-09C-E User’s Manual (Expansion Module).
• Active-state: Any state in which the IC is not in any of the Idle (standby/suspend) states.
No.A1696-6/23
LC823410-10R
Figure 2.1: Differential Input Sensitivity Range for Full-speed
Differential Input Voltage Range
Differential Output
Crossover
Voltage Range
-1.0
⋅⋅⋅
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2
⋅⋅⋅
4.6
Figure 2.2: Differential Input Sensitivity Range for High-speed
Level1
+400mV
Differential
Point3
Point4
Point1
Point2
Point5
Point6
0 Volts
Differential
Level2
-400mV
Differential
0%
Unit Interval
100%
No.A1696-7/23
LC823410-10R
AC Characteristics: Reset at Ta = -30 to +70°C, VDD1 = 1.05 to 1.65V, VDD2 = 2.7 to 3.6V
Ratings
Parameter
Symbol
Conditions
Unit
min
Reset active time
tRESW1
Time after both of VDD1 and VDD2 reached
within the allowable operation voltage range
typ
10
max
μs
tRESW1
NRES
Package Dimensions
unit : mm (typ)
3257A
14.0
16.0
0.5
16.0
14.0
120
1
0.4
0.15
0.125
0.1
1.2MAX
(1.0)
(1.2)
SANYO : TQFP120(14X14)
No.A1696-8/23
LC823410-10R
Block Diagram
No.A1696-9/23
LC823410-10R
Pin Assignments
I/O
Pin Characteristics
I
Input pin
3IC
3.3V CMOS input
1IC
O
Output pin
3IS
3.3V Schmitt input
1T3
B
Bi-directional pin
3ICU
3.3V CMOS input pullup
P
Power supply pin
3ICD
3.3V CMOS input pulldown
3A
3.3V analog
3ISU
3.3V Schmitt input pullup
1A
1.5V analog
3O2
3.3V 2mA output
No.
Name
3T2
3.3V 2mA tristate output
3O6
3.3V 6mA output
3T6
3.3V 6mA tristate output
X
1.5V CMOS input
1.5V 0.3mA tristate output
Oscillation amplifier
I/O
Characteristic
1
TEST3
I
3IS
Test pin (normally tied to low)
Function
2
TEST4
I
3IS
Test pin (normally tied to low)
3
TEST5
I
3IS
Test pin (normally tied to low)
4
TEST6
I
3IS
Test pin (normally tied to low)
5
TCK
I
3ICU
6
RTCK
O
3O2
JTAG test returned clock
7
NTRST
I
3ISU
JTAG test reset
8
TDI
I
3ICU
JTAG test data input
JTAG test mode select
JTAG test clock
9
TMS
I
3ICU
10
TDO
O
3O2
JTAG test data output
11
NRES
I
3IS
Reset input
12
PHI(P11)
B
3ICU/3T2
13
EXTFIQ(P2F)
B
3ISU/3T2
External FIQ interrupt/GPIO
14
SCK0(P08)
B
3ISU/3T2
Serial I/F 0 clock/GPIO
15
SDO0(P09)
B
3ICU/3T2
Serial I/F 0 output data/GPIO
16
SDI0(P0A)
B
3ICU/3T2
Serial I/F 0 input data/GPIO
17
SCK1(P14)
B
3ISU/3T2
Serial I/F 1 clock/GPIO
18
SDO1(P15)
B
3ICU/3T2
Serial I/F 1 output data/GPIO
19
SDI1(P16)
B
3ICU/3T2
Serial I/F 1 input data/GPIO
20
TXD1(P2A)
B
3ICU/3T2
UART1 transmit data/GPIO
21
RXD1(P2B)
B
3ICU/3T2
UART1 receive data/GPIO
22
TI0CA0(P19)
B
3ICU/3T2
Multiple timer input capture/output compare A0/GPIO
23
TI0CA1(P1B)
B
3ICU/3T2
Multiple timer input capture/output compare A1/GPIO
24
VDD1
P
25
VDD2
P
Digital 3.3V power supply
26
VSS
P
Digital ground
27
TXD0(P1D)
B
AHB bus clock output/32.768kHz clock output/GPIO
Digital 1.5V power supply
3ICU/3T2
UART0 transmit data/GPIO
28
RXD0(P1E)
B
3ICU/3T2
UART0 receive data/GPIO
29
XFWE(P01)
B
3ICU/3T2
NAND FLASH write enable
30
XFRE(P02)
B
3ICU/3T2
NAND FLASH read enable
31
XALE(P03)
B
3ICU/3T2
NAND FLASH address latch enable
32
XCLE(P04)
B
3ICU/3T2
NAND FLASH command latch enable
33
XFCE1(P1F)
B
3ICU/3T2
NAND FLASH chip enable 1/GPIO
34
XFCE0(P00)
B
3ICU/3T2
NAND FLASH chip enable 0/GPIO
35
XFWP(P05)
B
3ICU/3T2
NAND FLASH write protect/GPIO
36
XFBSY
I
3IS
37
FD0
B
3ICD/3T2
NAND FLASH busy
NAND FLASH data bit0
38
FD1
B
3ICD/3T2
NAND FLASH data bit1
39
VDD2
P
Digital 3.3V power supply
40
VSS
P
Digital ground
Continued on next page.
No.A1696-10/23
LC823410-10R
Continued from preceding page.
No.
I/O
Characteristic
Function
41
FD2
B
3ICD/3T2
NAND FLASH data bit2
42
FD3
B
3ICD/3T2
NAND FLASH data bit3
43
FD4
B
3ICD/3T2
NAND FLASH data bit4
44
FD5
B
3ICD/3T2
NAND FLASH data bit5
45
FD6
B
3ICD/3T2
NAND FLASH data bit6
46
FD7
B
3ICD/3T4
NAND FLASH data bit7
47
EXTINT0(P21)
B
3ISU/3T2
External interrupt bit0/GPIO
48
EXTINT1(P22)
B
3ISU/3T2
External interrupt bit1/GPIO
49
EXTINT2(P23)
B
3ISU/3T2
External interrupt bit2/GPIO
50
EXTINT3(P24)
B
3ISU/3T2
External interrupt bit3/GPIO
3ISU/3T2
51
EXTINT4(P25)
B
52
VDD1
P
Digital 1.5V power supply
External interrupt bit4/GPIO
53
VDD2
P
Digital 3.3V power supply
54
VSS
P
55
DOUT
O
3O2
PCM output data
Digital ground
56
DIN
I
3ICD
PCM input data
57
BCK
B
3IC/3T2
58
LRLK(P12)
B
3ICU/3T2
59
MCLK(P13)
B
3ICU/3T2
PCM main clock/GPIO
60
SCL(P28)
B
3ICU/3T2
I2C SCL clock/GPIO
61
SDA(P29)
B
3ICU/3T2
I2C SDA data/GPIO
62
TXD2(P2C)
B
3ICU/3T2
UART2 transmit data/GPIO
63
RXD2(P2D)
B
3ICU/3T2
UART2 receive data/GPIO
64
TEST1
I
3IS
65
TEST2
I
3IS
66
VDD1
P
67
SDWP
I
3IC
68
SDCD/INS
I
3ICU
69
SDCMD/BS
B
3ICU/3T6
70
SDCLK/SCLK
O
3O6
71
SDAT0/DATA0
B
3ICUD/3T6
72
VSS
P
PCM bit clock
PCM LR clock/GPIO
Test pin (normally tied to Low)
Test pin (normally tied to Low)
Digital 1.5V power supply
SD card write protect
SD card detect/MSINS
SD card command/MSBS
SD card clock/MS clock
SD card data/MS data
Digital ground
73
VDD3
P
74
SDAT1/DATA1
B
3ICUD/3T6
SD card data/MS data
Digital 3.3V/1.8V power supply
75
SDAT2/DATA2
B
3ICUD/3T6
SD card data/MS data
76
SDAT3/DATA3
B
3ICUD/3T6
SD card data/MS data
77
AVDDPLL1
P
PLL1 analog power supply
78
AVSSPLL1
P
PLL1 analog ground
79
VCNT1
O
80
VDDXT
P
81
VSSXT
P
82
XIN1
I
X
System /USB PHY oscillation amplifier input
83
XOUT1
B
X
System /USB PHY oscillation amplifier output
84
VDDRTC
P
RTC power supply
85
VSSRTC
P
RTC ground
86
XOUT32K
O
X
RTC 32.768kHz oscillation amplifier output
87
XIN32K
I
X
RTC 32.768kHz oscillation amplifier input
88
VDET
I
1IC
89
RTCINT
O
1T3
RTC interrupt output
90
BACKUPB
I
1IC
RTC mode (RTC only or whole IC)
91
AVDDPHY1
P
USB PHY 1.5V power supply
92
AVSSPHY1
P
USB PHY analog ground
1A
PLL1 VCO control
System /USB PHY oscillation amplifier 1.5V power supply
System /USB PHY oscillation amplifier ground
Voltage detect input
Continued on next page.
No.A1696-11/23
LC823410-10R
Continued from preceding page.
No.
I/O
Characteristic
Function
93
AVSSPHY1
P
94
RREF
B
USB PHY analog ground
95
AVSSPHY2
P
USB PHY analog ground
96
AVDDPHY2
P
USB PHY analog 3.3V power supply
97
AVDDPHY2
P
USB PHY analog 3.3V power supply
98
AVSSPHY2
P
USB PHY analog ground
99
AVSSPHY2
P
USB PHY analog ground
100
AVSSPHY2
P
USB PHY analog ground
101
AVDDPHY2
P
102
DP
B
3A
USB D+
103
DM
B
3A
USB D-
104
AVSSPHY2
P
USB PHY analog ground
105
AVDDPHY2
P
USB PHY analog 3.3V power supply
106
AVDDADC
P
107
AN0
I
3A
A/D converter analog input Ch0
108
AN1
I
3A
A/D converter analog input Ch1
109
AN2
I
3A
A/D converter analog input Ch2
110
AN3
I
3A
A/D converter analog input Ch3
111
AVSSADC
P
A/D converter analog ground
112
VSS
P
Digital ground
113
XIN2
I
X
Audio 16.9344MHz oscillator input
114
XOUT2
O
X
Audio 16.9344MHz oscillator output
115
VDD1
P
116
AVDDPLL2
P
PLL2 analog power supply
117
AVSSPLL2
P
PLL2 analog ground
118
VCNT2
O
119
VDD2
P
Digital 3.3V power supply
120
VSS
P
Digital ground
3A
USB PHY reference resistor
USB PHY analog 3.3V power supply
A/D converter analog power supply
Digital 1.5V power supply
3A
PLL2 VCO control
Pin Functions
I
Input pin
O
Output pin
B
Bi-directional pin
P
Power supply pin
Pin name
Direction
Count
Function
(1) Clock, reset, system pin (12 pins)
TEST[6:1]
I
6
NRES
I
1
Reset input
XIN1
I
1
System/USB PHY oscillator amplifier input
XOUT1
O
1
System/USB PHY oscillator amplifier output
XIN2
I
1
Audio 16.9344MHz oscillator input
XOUT2
O
1
Audio 16.9344MHz oscillator output
O(B)
1
PHI(P11)
Test pin
AHB bus clock output/32.768kHz clock output
Functions as P11 after hard reset
(2) Interrupt (6 pins)
EXTFIQ(P2F)
I(B)
1
External FIQ interrupt
Functions as P2F after hard reset
EXTINT[4:0]
(P[25:21])
I(B)
5
External interrupt
Functions as port after hard reset
Continued on next page.
No.A1696-12/23
LC823410-10R
Continued from preceding page.
Pin name
Direction
Count
Function
XFCEO(P00)
O(B)
1
NAND FLASH chip enable 0
XFCE1(P1F)
O(B)
1
NAND FLASH chip enable 1
XFWE(P01)
O(B)
1
NAND FLASH write enable
XFRE(P02)
O(B)
1
NAND FLASH read enable
XALE(P03)
O(B)
1
NAND FLASH address latch enable
XCLE(P04)
O(B)
1
NAND FLASH command latch enable
XFWP(P05)
O(B)
1
NAND FLASH write protect
XFBSY
I
1
NAND FLASH busy
FD[7:0]
B
8
NAND FLASH data
(3) NAND FLASH I/F (16 pins)
Functions as P00 after hard reset
Functions as P1F after hard reset
Functions as P01 after hard reset
Functions as P02 after hard reset
Functions as P03 after hard reset
Functions as P04 after hard reset
Functions as P05 after hard reset
(4) SD card I/F, MS I/F (8 pins)
SDWP0
I
1
SD card write protect
SDCD0/INS
I
1
SD card card detect / MSINS
SDCMD0/BS
B
1
SD card command / MSBS
SDCLK0/SCLK
O
1
SD card clock / MS clock
SDAT0[3:0]/DATA[3:0]
B
4
SD card data / MS data
(5) PCM I/F (5 pins)
DOUT
O
1
PCM output data
DIN
I
1
PCM input data
BCK
B
1
PCM bit clock
LRCK(P12)
B(B)
1
PCM LR clock
MCLK(P13)
B(B)
1
Functions as LRCK after hard reset
PCM main clock
Functions as MCLK after hard reset
(6) Serial I/F (14 pins)
SCK0 (P08)
B
1
Serial I/F 0 clock
Functions as P08 after hard reset
SDO0 (P09)
O (B)
1
Serial I/F 0 output data
Functions as P09 after hard reset
SDI0 (P0A)
I (B)
1
Serial I/F 0 input data
Functions as P0A after hard reset
SCK1 (P14)
B (B)
1
Serial I/F 1 clock
Functions as P14 after hard reset
SDO1 (P15)
O (B)
1
Serial I/F 1 output data
Functions as P15 after hard reset
SDI1 (P16)
I (B)
1
Serial I/F 1 input data
Functions as P16 after hard reset
TXD0 (P1D)
O (B)
1
UART transmit data
Functions as P1D after hard reset
RXD0 (P1E)
I (B)
1
UART receive data
Functions as P1E after hard reset
TXD1 (P2A)
O (B)
1
UART1 transmit data
Functions as P2A after hard reset
RXD1 (P2B)
I (B)
1
TXD2(P2C)
O (B)
1
UART1 receive data
Functions as P2B after hard reset
UART2 transmit data
Functions as P2C after hard reset
RXD2(P2D)
I (B)
1
UART2 receive data
Functions as P2D after hard reset
SCL (P28)
B (B)
1
I2C SCL clock (open drain output)
Functions as P28 after hard reset
SDA (P29)
B (B)
1
I2C SDA data (open drain output)
Functions as P29 after hard reset
Continued on next page.
No.A1696-13/23
LC823410-10R
Continued from preceding page.
Pin name
Direction
Count
B(B)
1
Function
(7)Timer (2 pins)
TIOCA0 (P19)
Multiple timer input capture/output compare A0
Functions as P19 after hard reset
TIOCA1 (P1B)
B(B)
1
Multiple timer input capture/output compare A1
Functions as P1B after hard reset
(8) JTAG (6 pins)
TCK
I
1
JTAG test clock
RTCK
O
1
JTAG test returned clock
NTRST
I
1
JTAG test reset
TDI
I
1
JTAG test data input
TMS
I
1
JTAG test mode select
TDO
O
1
JTAG test data output
(9) RTC (5 pins)
XOUT32K
O
1
RTC 32.768kHz oscillator amplifier output
XIN32K
I
1
RTC 32.768kHz oscillator amplifier input
VDET
I
1
Voltage detect input
RTCINT
O
1
RTC interrupt output
BACKUPB
I
1
RTC mode (RTC only or LSI whole)
VCNT1
O
1
PLL1 VCO control
VCNT2
O
1
PLL2 VCO control
DP
B
1
USB D+ (Device)
DM
B
1
USB D- (Device)
RREF
B
1
USB PHY reference resistor
I
4
Analog input
VDD1
P
4
Digital 1.5V power supply
VDD2
P
4
Digital 3.3V power supply
VDD3
P
1
Digital 3.3V/1.8V power supply (SD card I/F, MS I/F power supply)
VSS
P
6
Digital ground
(10) PLL (2 pins)
(11) USB (3 pins)
(12) Analog (4 pins)
AN[3:0]
(13) Power supply pin (37 pins)
AVDDPLL1
P
1
PLL1 analog power supply
AVSSPLL1
P
1
PLL1 analog ground
AVDDPLL2
P
1
PLL2 analog power supply
AVSSPLL2
P
1
PLL2 analog ground
VDDRTC
P
1
RTC power supply
VSSRTC
P
1
RTC ground
VDDXT
P
1
Oscillation amplifier 1.5V power supply
VSSXT
P
1
Oscillation amplifier ground
AVDDPHY1
P
1
USB PHY analog 1.5V power supply
AVSSPHY1
P
2
USB PHY analog ground
AVDDPHY2
P
4
USB PHY analog 3.3V power supply
AVSSPHY2
P
5
USB PHY analog ground
AVDDADC
P
1
A/D converter analog power supply
AVSSADC
P
1
A/D converter analog ground
No.A1696-14/23
LC823410-10R
Peripheral Circuit Example
PLL Peripheral Circuit 1 (for system)
The PLL1 circuit configuration is shown in the figure below. On the wiring board, connect the decoupling capacitors as
close as possible to the pin, and separate the power line from other power supply lines to minimize noise.
AVSSPLL1
AVDDPLL1
C4
VCNT1
+
R2
C3
R1
C2
C1
AVDDPLL1
AVSSPLL1
Symbol
Value
Model or Accuracy
R1
100 to 200Ω
±5%
R2
*MΩ
±5%
C1
0.1 to 0.22μF
Capacitance error: ±10%
C2
(Approx. C1/100)
Temperature characteristics: ±10%
C3
0.1μF
(-25 to +85°C)
C4
33μF
16CV33BS
* C4: This is based on SANYO Electric’s Surface Mount Device Catalog (CV-BS Series).
Note:
Generally, use R2 and C2 without mounting.
However, if there is a problem that affects the PLL characteristics, the PLL characteristics may be improved by
mounting R2 and C2. Therefore, be sure to prepare R2 and C2 wiring patterns beforehand.
No.A1696-15/23
LC823410-10R
PLL Peripheral Circuit 2 (for audio)
The PLL2 circuit configuration is shown in the figure below. On the wiring board, connect the decoupling capacitors as
close as possible to the pins, and separate the power line from other power supply lines to minimize noise.
AVSSPLL2
AVDDPLL2
C4
VCNT2
+
R2
C3
R1
C2
C1
AVDDPLL2
AVSSPLL2
Symbol
Value
Model or Accuracy
R1
100 to 200Ω
±5%
R2
*MΩ
±5%
C1
1.0 to 2.0μF
Capacitance error: ±10%
C2
(Approx. C1/100)
Temperature characteristics: ±10%
C3
0.1μF
(-25 to +85°C)
C4
33μF
16CV33BS
* C4: This is based on SANYO Electric’s Surface Mount Device Catalog (CV-BS Series).
Note:
Generally, use R2 and C2 without mounting.
However if there is a problem that affects the PLL characteristics, the PLL characteristics may be improved by
mounting R2 and C2. Therefore, be sure to prepare R2 and C2 wiring patterns beforehand.
Reference
For audio applications, experiments have confirmed that
C1=1.0μF, C2=0.01μF
can be effective in maximizing the jitter reduction of the PLL output clock.
(Note that this depends on the board and other environmental conditions, and the result is not guaranteed.)
No.A1696-16/23
LC823410-10R
USB2.0 Peripheral Circuit
Be sure to always observe the items below when designing the circuit board.
• Differential impedance control
The DP/DM routing width, routing clearance, and PCB layer spacing must be determined so that differential
impedance of 90Ω can be achieved. We recommend a microstrip structure for realizing impedance matching.
• Power supply (AVDDPHY2, AVDDPHY1) and ground (AVSSPHY2, AVSSPHY1) lines
The separation of the power line and ground line only for USB usage is recommended.
At a minimum, insert 10μF, 0.1μF, and 0.01μF capacitors between the power supply and ground for filtering.
To reject high-frequency noise, inserting the 0.01μF capacitor directly under the power pin and ground pin is
recommended.
Note that 0.1μF capacitor is also effective for latch-up protection.
• Crystal oscillator
Use a crystal oscillator connected to the XIN1 and XOUT1 pins that has a fundamental wave of 12MHz, oscillation
accuracy of 100p-pm or less, and place it near the IC.
• Reference resistor
Connect the RREF pin to the ground near the IC through the 680Ω (tolerance 1% or less) reference resistor.
I2C Peripheral Circuit
For the Rs and Rp values, see the I2C standards.
No.A1696-17/23
LC823410-10R
XTAL Peripheral Circuit
XTAL1 (12MHz)
12MHz oscillation amplifier RC reference values → R1=1MΩ, R2=0Ω, C1=C2=22pF
Applicable pins: XIN1, XOUT1
R1
R2
C1
C2
XTAL2 (16.9344MHz)
16.9344MHz oscillation amplifier RC reference values → R1=1MΩ, R2=0Ω, C1=C2=22pF
Applicable pins: XIN2, XOUT2
R1
R2
C1
C2
XTALRTC (32.768kHz)
32.768kHz oscillation amplifier RC reference values → R1=5.1MΩ, R2=330kΩ, C1=C2=22pF
Applicable pins: XIN32K, XOUT32K
R1
R2
C1
C2
(Reference)
Oscillator product: DT-38 (DAISHINKU Corp.)
No.A1696-18/23
LC823410-10R
JTAG Pin Treatment Examples (both for use of ICE and non-use of ICE)
VDD2
JTAG
Connector
LC823410
10kΩ
TCK
TCK
TDI
TDI
TMS
TMS
NTRST
nTRST
Power on reset (*1)
(Open drain output)
nSRST
NRES
System reset (*2)
(Open drain output)
33Ω
RTCK
TDO
RTCK
TDO
(*1) The power-on reset is a reset signal that becomes active-low only when the power is turned on. Set so that the
NTRST pin is reset only by a reset from JTAG and power-on reset.
(*2) System reset includes a power-on reset and a reset signal, requested by the system, that becomes active-low by a
manual reset or other means.
Set so that the NRES pin is reset by the reset from JTAG and by system reset.
See the data sheet for the NRES pin reset specifications. The NTRST pin has the same specifications as those of the
NRES pin.
The power-on reset (open drain output) can be implemented, for example, by connecting it to the ground through a
capacitor.
The above configuration is a peripheral circuit example that assumes the use of a JTAG ICE by YDC (Yokogawa
Digital Computer) and can be applied both in cases where ICE is and is not used.
To use other products, inquire at the manufacturer.
No.A1696-19/23
LC823410-10R
JTAG Pin Treatment Examples (non-use of ICE)
LC823410
TCK
TDI
TMS
NTRST
NRES
System reset (*1)
RTCK
TDO
(*1) System reset includes a power-on reset that becomes active-low only when power is turned on, or a reset signal,
requested by the system, that becomes active-low by a manual reset or other means.
The NTRST pin has the same specifications as those of the NRES pin, and at least a power-on reset must be
implemented.
As shown in this example, system reset can be connected to the NRES pin directly.
The above configuration is a simplified example of a peripheral circuit in the case that ICE is not used.
No.A1696-20/23
LC823410-10R
Power-on Sequence
(1) 3.3V *1
3.3V
(VDD2, VDD3, AVDDADC, AVDDPHY2, AVDDPLL2)
3.0V
2.8V
(2)1.5V
1.5V
(VDD1, VDDXT, AVDDPLL1, VDDRTC, AVDDPHY1)
1.35V
1.1V
Max 100ms
Min *2
Max 100ms
USB power supply cutoff (such as cable disconnection)
(when Vbus = low is detected by at the IC pin)
*1 The following relations must be satisfied.
• AVDDPHY2>=AVDDADC
VDD2>=AVDDPLL2
VDD2>=VDD3
*2
• This is a period required only when the AHB clock is operating at a frequency higher than the internal operating
frequency guaranteed by VDD1>=1.35V, and this is needed for switching to an operating frequency guaranteed by
VDD1>=1.0V. The minimum time depends on the system. For the guaranteed operating frequency at each voltage,
see the data sheet.
No.A1696-21/23
LC823410-10R
RTC Pin Power On/Off Control Sequence
When running RTC only at power-off of the device, it is required to detect the voltage drop of VDD1, VDD2 and set
BACKUPB to low. Determine the detection level of VDD1 and VDD2 according to the conditions of the device. The
VDET pin needs to be set to low when the RTC power supply is cut off (when RTC operation is stopped).
Also, when drop in the RTC power supply voltage is detected, VDET must be set to low. The figure below shows the
power on/off sequence when the detection level of VDDRTC is 0.9V or less. Determine the detection level of
VDDRTC according to the conditions of the device.
No.A1696-22/23
LC823410-10R
(Reference: Internal control by BACKUPB)
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellectual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of June, 2010. Specifications and information herein are subject
to change without notice.
PS No.A1696-23/23