FQD4P25TM_WS / FQU4P25 October 27, 2011 FQD4P25TM_WS / FQU4P25 250V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters. • • • • • • • -3.1A, -250V, RDS(on) = 2.1Ω @VGS = -10 V Low gate charge ( typical 10 nC) Low Crss ( typical 10.3 pF) Fast switching 100% avalanche tested Improved dv/dt capability RoHS Compliant S D ● ● G ▶ ▲ ● G S I-PAK D-PAK FQD Series G D S FQU Series D Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQD4P25TM_WS / FQU4P25 -250 - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage - Pulsed (Note 1) Units V -3.1 A -1.96 A -12.4 A ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 280 mJ IAR Avalanche Current (Note 1) -3.1 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 4.5 -5.5 2.5 mJ V/ns W 45 0.36 -55 to +150 W W/°C °C 300 °C dv/dt PD (Note 3) Power Dissipation (TC = 25°C) TJ, TSTG TL - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- Max 2.78 Units °C/W RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2011 Fairchild Semiconductor International Rev. A4, Oct 2011 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units -250 -- -- V Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C -- -0.21 -- V/°C -1 µA IDSS Zero Gate Voltage Drain Current VDS = -250 V, VGS = 0 V -- -- VDS = -200 V, TC = 125°C -- -- -10 µA IGSSF Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -3.0 -- -5.0 V RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -1.55 A -- 1.63 2.1 Ω gFS Forward Transconductance VDS = -40 V, ID = -1.55 A -- 2.0 -- S (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = -25 V, VGS = 0 V, f = 1.0 MHz -- 325 420 pF -- 65 85 pF -- 10 13 pF -- 9.5 30 ns ns Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -125 V, ID = -4.0 A, RG = 25 Ω (Note 4, 5) -- 60 130 -- 14 40 ns -- 27 65 ns nC -- 10.3 14 -- 2.7 -- nC -- 5.2 -- nC Maximum Continuous Drain-Source Diode Forward Current -- -- -3.1 A Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -3.1 A -- -- -12.4 A -- -- -5.0 V VGS = 0 V, IS = -4.0 A, dIF / dt = 100 A/µs -- 140 -- ns -- 0.64 -- µC VDS = -200 V, ID = -4.0 A, VGS = -10 V (Note 4, 5) Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD Drain-Source Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 46.6mH, IAS = -3.1A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ -4.0A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2011 Fairchild Semiconductor International Rev. A4, Oct 2011 FQD4P25TM_WS / FQU4P25 Electrical Characteristics 1 10 VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.5 V -6.0 V Bottom : -5.5 V 1 10 0 10 -ID , Drain Current [A] -ID, Drain Current [A] Top : -1 10 ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ 0 10 150℃ 25℃ ※ Notes : 1. VDS = -50V 2. 250µ s Pulse Test -55℃ -2 10 -1 -1 0 10 10 1 10 2 10 4 6 8 10 -VGS , Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 8 1 6 -IDR , Reverse Drain Current [A] RDS(on) [Ω], Drain-Source On-Resistance 10 VGS = - 10V VGS = - 20V 4 2 ※ Note : TJ = 25℃ 0 0 10 150℃ ※ Notes : 1. VGS = 0V 2. 250µ s Pulse Test 25℃ -1 0 3 6 9 10 12 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -ID , Drain Current [A] -VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 700 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 500 Ciss 400 Coss 300 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 200 Crss 100 0 -1 10 VDS = -50V -VGS, Gate-Source Voltage [V] 600 Capacitance [pF] FQD4P25TM_WS / FQU4P25 Typical Characteristics 10 VDS = -125V VDS = -200V 8 6 4 2 ※ Note : ID = -4.0 A 0 0 10 1 10 -VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2011 Fairchild Semiconductor International 0 2 4 6 8 10 12 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A4, Oct 2011 (Continued) 3.0 RDS(ON), (Normalized) Drain-Source On-Resistance -BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 ※ Note : 1. VGS = 0 V 2. ID = -250 µA 0.8 -100 -50 0 50 100 150 2.5 2.0 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -2.0 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.5 Operation in This Area is Limited by R DS(on) 3.0 1 100 µs -ID, Drain Current [A] -ID, Drain Current [A] 10 1 ms 10 ms DC 0 10 ※ Notes : 2.5 2.0 1.5 1.0 o 1. TC = 25 C 0.5 o 2. TJ = 150 C 3. Single Pulse -1 10 0 1 10 0.0 25 2 10 10 50 Figure 9. Maximum Safe Operating Area Zθ JC(t), Thermal Response 75 100 125 150 TC, Case Temperature [℃] -VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 0 ※ N o te s : 1 . Z θ J C ( t) = 2 . 7 8 ℃ /W M a x . 2 . D u ty F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .2 0 .1 0 .0 5 10 PDM 0 .0 2 -1 0 .0 1 10 -5 t1 s in g le p u ls e 10 -4 10 t2 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2011 Fairchild Semiconductor International Rev. A4, Oct 2011 FQD4P25TM_WS / FQU4P25 Typical Characteristics FQD4P25TM_WS / FQU4P25 Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V -10V 300nF VDS VGS Qgs Qgd DUT -3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL t on VDD VGS RG td(on) VGS t off td(off) tr tf 10% DUT -10V VDS 90% Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS tp ID RG VDD DUT -10V tp ©2011 Fairchild Semiconductor International VDD Time VDS (t) ID (t) IAS BVDSS Rev. A4, Oct 2011 FQD4P25TM_WS / FQU4P25 Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM di/dt IFM , Body Diode Forward Current VDS ( DUT ) VSD Body Diode Forward Voltage Drop VDD Body Diode Recovery dv/dt ©2011 Fairchild Semiconductor International Rev. A4, Oct 2011 FQD4P25TM_WS / FQU4P25 Mechanical Dimensions D-PAK Dimensions in Millimeters ©2011 Fairchild Semiconductor International Rev. A4, Oct 2011 FQD4P25TM_WS / FQU4P25 Mechanical Dimensions IPAK Dimensions in Millimeters ©2011 Fairchild Semiconductor International Rev. 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