TSH343 280MHz Single-Supply Triple Video Buffer ■ Bandwidth: 280MHz ■ 5V single-supply operation ■ Internal input DC level shifter ■ No input capacitor required ■ Internal gain of 6dB for a matching between 3 channels ■ Very low harmonic distortion ■ Slew rate: 780V/µs ■ Specified for 150Ω and 100Ω loads ■ Tested on 5V power supply ■ Data min. and max. are tested during production Pin Connections (top view) Pin1 identification Top View Description The TSH343 is a triple single-supply video buffer featuring an internal gain of 6dB and a large bandwidth of 280MHz. The main advantage of this circuit is that its input DC level shifter allows for video signals on 75Ω video lines without damage to the synchronization tip of the video signal, while using a single 5V power supply with no input capacitor. The DC level shifter is internally fixed and optimized to keep the output video signals between low and high output rails in the best position for the greatest linearity. Chapter 4 of this datasheet gives technical support when using the TSH343 as Y-Pb-Pr driver for video DAC output on a video line (see TSH344 for RGB signals). The TSH343 is available in the compact SO8 plastic package for optimum space-saving. IN1 1 6dB 8 OUT1 IN2 2 6dB 7 OUT2 IN3 3 6dB 6 OUT3 DC Shifter 5 GND +Vcc 4 SO8 Applications ■ High-end video systems ■ High Definition TV (HDTV) ■ Broadcast and graphic video ■ Multimedia products Order Codes Part Number TSH343ID TSH343IDT January 2006 Temperature Range Package -40°C to +85°C SO-8 Rev. 2 Packing Marking Tube TSH343I Tape & Reel TSH343I 1/14 www.st.com 14 Absolute Maximum Ratings TSH343 1 Absolute Maximum Ratings Table 1. Key parameters and their absolute maximum ratings Symbol Parameter (1) Value Unit 6 V VCC Supply voltage Vin Input Voltage Range (2) 0 to +1.4 V Toper Operating Free Air Temperature Range -40 to +85 °C Tstd Storage Temperature -65 to +150 °C Maximum Junction Temperature 150 °C Rthjc SO8 Thermal Resistance Junction to Case 28 °C/W Rthja SO8 Thermal Resistance Junction to Ambient Area 157 °C/W Pmax. Maximum Power Dissipation (@Ta=25°C) for Tj=150°C 800 mW ESD CDM: Charged Device Model HBM: Human Body Model MM: Machine Model 2 1.5 200 kV kV V Value Unit 3 to 5.5(1) V Tj 1. All voltage values, except differential voltage, are with respect to network terminal. 2. The magnitude of input and output voltage must never exceed VCC +0.3V. Table 2. Operating conditions Symbol VCC Parameter Power Supply Voltage 1. Tested in full production at 0V/5V single power supply 2/14 Rev. 2 TSH343 Electrical Characteristics 2 Electrical Characteristics Table 3. VCC = +5V Single Supply, Tamb = 25°C (unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. 0.4 0.6 0.8 Unit DC Performance VDC Input DC shift RL = 150Ω, Tamb mV -40°C < Tamb < +85°C 0.53 Tamb , input to GND 18.2 -40°C < Tamb < +85°C 20.7 35 µA Iib Input Bias Current Rin Input Resistance Tamb 4 GΩ Cin Input Capacitance Tamb 1 pF ICC Supply Current per Buffer no Load, input to GND 14.4 -40°C < Tamb < +85°C 14.9 mA Power Supply Rejection Ratio 20 log (∆Vout/∆VCC) (see Figure 25 and Figure 26) input to GND, F = 1MHz CLF=470nF CHF=100uF DC Voltage Gain RL = 150Ω, Vin = 1V DG Variation of the DC Voltage Gain between inputs of 0.3V and 1V MG1 MG 0.3 PSRR G 18 70 1.92 dB 1.99 2.05 V/V Input step from 0.3V to 1V 0.26 0.8 % Gain Matching between 3 channels Input = 1V 0.5 2 % Gain Matching between 3 channels Input = 0.3V 0.5 2 % Dynamic Performance and Output Characteristics -3dB Bandwidth Small Signal Vout = 20mVp RL = 150Ω Gain Flatness @ 0.1dB Small Signal Vout = 20mVp RL = 150Ω Full Power Bandwidth Vout = 2Vp-p, VICM = 0.5V, RL = 150Ω Delay between each channel (see Figure 30) 0 to 30MHz SR Slew Rate (1) Input step from 0V to 1V, RL = 150Ω VOH High Level Output Voltage Vin DC = +1.5V, R L = 150Ω VOL Low Level Output Voltage RL = 150Ω Bw FPBW D Output Current IOUT Vout = 2V, Tamb -40°C < Tamb < +85°C Output Short Circuit Current (Isource) 160 280 MHz 65 130 200 MHz 0.5 ns 500 780 V/µs 3.7 3.9 V 40 mV 45 90 mA 82 100 Rev. 2 mA 3/14 Electrical Characteristics Table 3. TSH343 VCC = +5V Single Supply, Tamb = 25°C (unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit Noise and Distortion F = 100kHz, R IN = 50Ω 29 nV/√Hz 10kHz to 30MHz 10kHz to 100MHz 158 290 µVrms 2nd Harmonic Distortion Vout = 2Vp-p, RL = 150Ω F= 10MHz F= 30MHz -58 -45 dBc 3rd Harmonic Distortion Vout = 2Vp-p, RL = 150Ω F= 10MHz F= 30MHz -72 -50 dBc eN Total Input Voltage Noise HD2 HD3 1. Non-tested value. Guaranteed value by design. 4/14 Rev. 2 TSH343 Frequency response Figure 2. 10 6,20 8 6,15 6 6,10 4 6,05 Gain (dB) Gain (dB) Figure 1. Electrical Characteristics 2 0 -2 -4 Gain flatness 6,00 5,95 5,90 5,85 -6 5,80 Vcc=5V Load=150 Ω -8 -10 1M Vcc=5V Load=150Ω 5,75 10M 100M 5,70 1M 1G 10M Frequency (Hz) Figure 3. Cross-talk vs. frequency (amp1) Figure 4. 0 -10 1G Cross-talk vs. frequency (amp2) 0 Small Signal Vcc=5V Load=150Ω -10 -20 -30 -30 -40 -40 Gain (dB) Gain (dB) -20 100M Frequency (Hz) -50 1/2 -60 -70 Small Signal Vcc=5V Load=150Ω -50 2/1 -60 2/3 -70 -80 -80 1/3 -90 -90 -100 1M 10M -100 1M 100M 10M Frequency (Hz) Figure 5. 100M Frequency (Hz) Cross-talk vs. frequency (amp3) Figure 6. Input noise vs. frequency 0 -20 Small Signal Vcc=5V Load=150Ω Vcc=5V input in short-circuit Input Noise (nV/VHz) -10 Gain (dB) -30 -40 -50 3/1 -60 3/2 -70 100 NA -80 -90 -100 1M 10M 10 10 100M Frequency (Hz) 100 1k 10k 100k 1M 10M Frequency (Hz) Rev. 2 5/14 Electrical Characteristics Figure 7. TSH343 Distortion on 150Ω load - 10MHz Figure 8. -30 -40 HD2 & HD3 (dBc) -45 -50 -30 Vcc=5V F=10MHz input DC component = 0.65V Load=150Ω -35 -45 -55 HD2 -60 Vcc=5V F=10MHz input DC component = 0.65V Load=100Ω -40 -50 HD2 & HD3 (dBc) -35 Distortion on 100Ω load - 10MHz -65 -70 -75 -80 -55 HD2 -60 -65 -70 -75 -80 -85 -85 HD3 -90 HD3 -90 -95 -95 -100 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 -100 0,0 4,0 0,5 1,0 Output Amplitude (Vp-p) Figure 9. Distortion on 150Ω load - 30MHz HD2 & HD3 (dBc) -25 -30 -15 -25 -40 -45 HD2 -55 -60 HD3 -65 -30 3,5 4,0 -35 -40 -45 -55 -60 -75 -75 1,0 HD3 -65 -70 0,5 HD2 -50 -70 -80 0,0 3,0 Vcc=5V F=30MHz input DC component = 0.65V Load=100Ω -20 -35 -50 2,5 -10 Vcc=5V F=30MHz input DC component = 0.65V Load=150Ω HD2 & HD3 (dBc) -20 2,0 Figure 10. Distortion on 100Ω load - 30MHz -10 -15 1,5 Output Amplitude (Vp-p) 1,5 2,0 2,5 3,0 3,5 -80 0,0 4,0 0,5 1,0 Output Amplitude (Vp-p) 1,5 2,0 2,5 3,0 3,5 4,0 Output Amplitude (Vp-p) Figure 11. Output DC shift vs. frequency Figure 12. Slew rate 1,4 3,5 3,0 SR+ Output Response (V) Gain (dB) 1,2 1,0 0,8 Vcc=5V Load=150Ω 0,6 1M 2,0 1,5 SR- 1,0 Vcc=5V Load=150Ω 0,5 10M 0,0 100M -5 Frequency (Hz) 6/14 2,5 -4 -3 -2 -1 0 Time (ns) Rev. 2 1 2 3 4 5 TSH343 Electrical Characteristics Figure 13. Reverse isolation vs. frequency Figure 14. Bandwidth vs. temperature 0 500 Vcc=5V Load=100Ω -10 450 -20 400 -40 Bw (MHz) Gain (dB) -30 -50 -60 350 300 250 -70 200 -80 150 -90 -100 1M 10M 100 -40 100M Vcc=5V Load=150 Ω -20 Frequency (Hz) 0 20 40 60 80 Temperature (°C) Figure 15. Quiescent current vs. Supply Figure 16. Input DC shift vs. temperature 50 0,8 Vcc=5V Input to ground, no load 45 0,7 40 0,6 DCshift (V) Total Icc (mA) 35 30 25 20 0,5 0,4 15 10 0,3 5 0 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 4,5 0,2 -40 5,0 Vcc=5V Load=150Ω -20 0 Vcc (V) 20 40 60 80 Temperature (°C) Figure 17. Isource vs. output voltage Figure 18. Voltage gain vs. temperature 2,05 0 -10 2,04 +5V VOH -20 without load 2,03 -30 -40 2,02 V -50 Gain (dB) Isource (mA) Isource 0V -60 -70 -80 2,01 2,00 1,99 1,98 -90 1,97 -100 1,96 -110 -120 0,0 0,5 1,0 1,5 2,0 2,5 3,0 3,5 4,0 4,5 5,0 1,95 -40 Vcc=5V Load=150Ω -20 0 20 40 60 80 Temperature (°C) V (V) Rev. 2 7/14 Electrical Characteristics TSH343 Figure 19. Ibias vs. temperature Figure 20. Gain deviation vs. temperature 1,0 24 22 0,8 0,6 GD (%) IBIAS (µA) 20 18 16 Gain deviation between 0.3V and 1V input voltages Vcc=5V Load=150Ω 0,4 14 0,2 12 10 -40 Vcc=5V Load=150Ω -20 0 20 40 60 0,0 -40 80 -20 0 Temperature (°C) 20 40 60 80 Temperature (°C) Figure 21. Supply current vs. temperature Figure 22. Output current vs. temperature 17 110 16 100 Isource (mA) ICC (mA) 15 14 13 90 80 70 12 11 10 -40 60 Vcc=5V no Load -20 0 20 40 60 50 -40 80 Vcc=5V Load=150 Ω -20 Temperature (°C) 0 20 40 60 80 Temperature (°C) Figure 23. Output higher rail vs. temperature Figure 24. Gain matching vs. temperature 1,0 4,2 4,1 0,8 GM (%) VOH (V) 4,0 3,9 3,8 Gain matching between 3 channels Vcc=5V Load=150Ω Vin=0.3V and 1V 0,6 0,4 3,7 0,2 3,6 3,5 -40 Vcc=5V Load=150Ω -20 0 20 40 60 0,0 -40 80 Temperature (°C) 8/14 -20 0 20 40 Temperature (°C) Rev. 2 60 80 TSH343 Power Supply Considerations and improvement of the PSRR Correct power supply bypassing is very important for optimizing performance in low and high-frequency ranges. Bypass capacitors should be placed as close as possible to the IC pin (pin 4) to improve high-frequency bypassing. A capacitor (C LF) greater than 100uF is necessary to improve the PSRR in low frequencies. For better quality bypassing, a capacitor of 470nF (C HF) is added using the same implementation conditions to improve the PSRR in the higher frequencies. Figure 25. Circuit for power supply bypassing +VCC CLF + CHF 4 Y Pb Pr TSH343 5 The following graph in Figure 26 shows the evolution of the PSRR against the frequency when the power supply decoupling is achieved carefuly or not. Figure 26. PSRR improvement 0 Vcc=5V Load=150 Ω PSRR=20 log (∆VCC/∆Vout) -10 -20 PSRR (dB) 3 Power Supply Considerations and improvement of the PSRR without capacitor -30 without C LF C HF=100nF -40 -50 without C LF C HF=470nF -60 C LF=100uF C HF=470nF -70 -80 1k 10k 100k 1M 10M 100M Frequency (Hz) Rev. 2 9/14 Using the TSH343 to Drive Y-Pb-Pr Video Components 4 TSH343 Using the TSH343 to Drive Y-Pb-Pr Video Components Figure 27. Shapes of video signals coming from DACs R Y Video DAC Video DAC Pb G B Pr Y signal (synchronization tip) R,G,B,Pb,Pr signals (no synchronization tip) 100 IRE White Level Image Content Image Content 30 IRE Black Level 1Vp-p 300mV 0 IRE GND Figure 28. Implementation of the video driver on output video DACs (1) DAC output (2) Amplifier input (4) On the line (3) Amplifier output Amplifier output rail (3.7V min.) 3,24V Content of the video signal+ tip synchro. 2Vp-p 1Vp-p 1Vp-p 1Vp-p 1,24V 620mV 20mV 0V 0V +600mV Amplifier output rail (70mV max.) 0V 620mV 0V +5V Video DAC Reconstruction Filtering Y 75Ω 600mV LPF + +6dB 75Ω Cable 1Vpp 75Ω 1Vpp 2Vpp Video DAC Pb Reconstruction Filtering LPF 75Ω 600mV + +6dB 75Ω Cable 0.7Vpp 75Ω 0.7Vpp 1.4Vpp Video DAC Pr Reconstruction Filtering LPF + +6dB 75Ω Cable 0.7Vpp 75Ω 0.7Vpp TSH343 -5V 10/14 75Ω 600mV GND Rev. 2 1.4Vpp TV TSH343 Using the TSH343 to Drive Y-Pb-Pr Video Components Figure 28 shows a schematic diagram of the use of the TSH343 to drive video output from DACs. The TSH343 is used to drive high definition video signals up to 30MHz on 75-ohm video lines. It is dedicated to driving YPbPr signals where the synchronization tip—close to zero volts—is included in Y signal, as seen in (1). An internal input DC value of 600mV is added to the video signal in order to shift the bottom from 0V to 600mV as seen in (2). The shift is not based on the average of the signal, but is an analog summation of a DC component to the video signal. Therefore, no input capacitors are required which provides a real advantage in terms of cost and board space. Under these conditions, it is possible to drive the signal in single supply without any saturation of the driver against the lower rail. Assuming that we lose half of the signal by output impedance-matching in order to properly drive the video line, the shifted signal is multiplied by a gain of 2 or +6dB (3). 4.1 Delay between channels Figure 29. Measurement of the delay between each channel 5V 75Ω 600mV + +6dB 75Ω Cable V1 75Ω Vin 75Ω 600mV + +6dB 75Ω Cable V2 75Ω 75Ω 75Ω 600mV + +6dB 75Ω Cable V3 75Ω Delay between each video component is an important aspect in high definition video systems. To drive porperly the three video components without any relative delay, the dice of the TSH343 is layouted out with a very symetrical geometry. The effect is direct on the synchronization of each channel, as shown in Figure 30. No delay appears between each channel when the same Vin signal is applied on the three inputs. Note that the delay from the inputs the outputs equals 4ns. Rev. 2 11/14 Using the TSH343 to Drive Y-Pb-Pr Video Components Vcc=5V Load=150Ω Input (Vin) 3 Output responses (V1, V2, V3) Figure 30. Relative delay between each channel -4ns -2ns 0s 2ns 4ns 6ns 8ns 10ns 12ns 14ns 16ns 18ns 20ns Time 12/14 Rev. 2 TSH343 TSH343 5 Package Mechanical Data Package Mechanical Data SO-8 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. 0.053 TYP. MAX. A 1.35 1.75 0.069 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ddd 8˚ (max.) 0.1 0.04 0016023/C Rev. 2 13/14 Revision History TSH343 6 Revision History Table 4. Document revision history Date Revision Description of Changes Dec. 2005 1 First release of datasheet. Jan. 2006 2 Capa-load option paragraph deleted in page 11. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 14/14 Rev. 2