L6270 L6271 MILLI-ACTUATOR DRIVER PRODUCT PREVIEW 90V BCD MIXED TECHNOLOGY SO24 AND SO20 PLASTIC SMD PACKAGE 4.5 TO 13.2V OPERATIVE VOLTAGE ±25 TO ±40V OUTPUT VOLTAGE RANGE SELECTABLE BY EXTERNAL RESISTOR FULL-WAVE RESONANT DC-DC CONVERTER USING SINGLE COIL FOR DUAL HIGH VOLTAGE GENERATOR WITH OUTPUT SLEW RATE CONTROL AND SELF CURRENT LIMITING LINEAR MODE AND BANG-BANG MODE ±40V OR 0/+80V OPERATIVE VOLTAGE DRIVING CONFIGURATION MODES: 1. SINGLE ENDED VOLTAGE MODE 2. DIFFERENTIAL VOLTAGE MODE 3. SINGLE ENDED CHARGE MODE DOUBLE OPERATIONAL AMPLIFIERS WITH 500KHZ GAIN BANDWIDTH PRODUCT AND LOAD DRIVING CAPABILITY FROM 0.4NF UP TO 24NF SO20 SO24 ORDERING NUMBERS: L6270 L6271 2.5V VOLTAGE REFERENCE 2.5V ANALOG SHIFTING CIRCUITRY POWER SAVING SLEEP MODE DESCRIPTION The L6270/1 is a piezoelectric actuator driver. BLOCK DIAGRAM VSUPPLY 4.5V-13V COIL CRES +40V BANG-LIN V512-AP 20 COIL Vfdb 21 HVP 3 100nF 24 POWER SUPPLY HVP INBINB+ 17 1 RESONANT DC-DC STEP-UP CONTROLLER K - 16 1 47nF + 2 18 RCCOMP HVM 22 1 INAINA+ K 19 23 1 HVP 8 K 6 + 5 2.5V 1 HVM 20 K + + - SLEEP - ANALOG LEVEL SHIFTER VOUT=VIN-2.5 VOUT 10 V-SHIFTED OUT1-B OUTK-A OUT1-A VSUPPLY V512A 200µA BAND-GAP REFERENCE 7 OUTK-B 100µA 50KΩ SLEEP 100nF GND-P HVM - 9 -40V HBRIDGE 1Ω INTERNAL CURRENT BIAS VIN 11 VIN0-5 12 GND-A 13 14 15 VREF IREF DC2REF 25KΩ RREFDC 100nF D98IN959A February 1999 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/10 L6270 - L6271 PIN CONNECTION (SO20) H-BRIDGE 1 20 HVP GND-P 2 19 HVM COIL 3 18 RC comp OUT1-A 4 17 V512-AP OUTK-A 5 16 OUT1-B SLEEP 6 15 OUTK-B INA(inv) 7 14 INB(inv) INA(not inv) 8 13 INB(not inv) GND-A 9 12 DC2ref 10 11 Iref Vref D98IN968 PIN FUNCTIONS (SO20) N. Name 1 H-BRIDGE 2 GND-P 3 COIL Description 40V Half Bridge output for negative charge pump. Power ground. Coil for positive step up. 4 OUT1-A Output ampl.A. 5 OUTK-A Hi current output ampl.A. 6 SLEEP Sleep mode for stand-by condition (1=SLEEP 0=operative). 7 INA (inv) 8 INA (not inv) Inverting input of A-amplifier. Non Inverting input of A-amplifier. 9 GND-A 10 Vref Precise 2.5V reference voltage. 11 Iref External resistor for precise internal current reference. 12 DC2ref 13 INB (not inv) 14 INB (inv) Inverting input of B-amplifier. 15 OUTK-B Hi current output ampl.B. 16 OUT1-B Output ampl.B. 17 V512-AP Analog&Power voltage supply 5 to 12V. 18 RC comp DC-DC converter compensation network. 19 HVM Negative High voltage generated op amp supplier. 20 HVP Positive High voltage generated op amp supplier. 2/10 Analog ground. Reference voltage for DC-DC converter X20. Non Inverting input of B-amplifier. L6270 - L6271 PIN CONNECTION (SO24) H-BRIDGE 1 24 HVP GND-P 2 23 HVM COIL 3 22 RC comp N.C. 4 21 LIN/BANG OUT1-A 5 20 V512-AP OUTK-A 6 19 OUT1-B SLEEP 7 18 OUTK-B INA(inv) 8 17 INB(inv) INA(not inv) 9 16 INB(not inv) V-SHIFTED 10 15 DC2ref Vin 0-5 11 14 Iref GND-A 12 13 Vref D98IN969 PIN FUNCTIONS (SO24) N. Name 1 H-BRIDGE 2 GND-P 3 COIL 4 N.C. Description 40V Half Bridge output for negative charge pump. Power ground. Coil for positive step up. 5 OUT1-A Output ampl.A. 6 OUTK-A Hi current output ampl.A. 7 SLEEP Sleep mode for stand-by condition (1=SLEEP 0=operative). 8 INA (inv) Inverting input of A-amplifier. 9 INA (not inv) Non Inverting input of A-amplifier. 10 V-SHIFTED Analog level shifter output Vin-Vref (-2.5 to +2.5 dynamic range) 11 Vin 0-5 Input positive voltage 12 GND-A Analog ground. 13 Vref Precise 2.5V reference voltage. 14 Iref External resistor for precise internal current reference. 15 DC2ref 16 INB (not inv) Reference voltage for DC-DC converter X20. 17 INB (inv) Inverting input of B-amplifier. 18 OUTK-B Hi current output ampl.B. Non Inverting input of B-amplifier. 19 OUT1-B Output ampl.B. 20 V512-AP Analog&Power voltage supply 5 to 12V. 21 LIN/BANG Linear or Bang-bang select pin (V512 = BANG 0 = Linear) 22 RC comp DC-DC converter compensation network. 23 HVM Negative High voltage generated op amp supplier. 24 HVP Positive High voltage generated op amp supplier. 3/10 L6270 - L6271 ABSOLUTE MAXIMUM RATINGS Symbol V512 Parameter Supply voltage pin 20 referred to Ground Value Unit 14 V HVP Positive high voltage referred to HVM 84 V HVM Negative high voltage referred to Ground -42 V IN A&B Vin o to 5 Amplifier input voltage common mode Level shifts input voltage ±6 V -0.5 to +5.5 V Tamb Operative Ambient Temperature -20 to +80 °C Tstg Storage Temperature -40 to +125 °C All the voltage value are referred to ground. ELECTRICAL CHARACTERISTICS (All the following parameters are specified @ 27°C and V512 = 12V, unless otherwise specified.) Symbol V512 HVP (1) HVM HVripple DC-DC gain I, hvp I, hvm Top Fswitch (2) Rds, on Iboost CP-slope Isleep Vref Ivref Vref, cap Iref, res Vsup DC gain GBW DCinp DC-DC OFF 4/10 Parameter Main power supply Output positive Voltage Output negative voltage HVP, HVM ripple Test Condition Double Supply Voltage Single Supply Voltage V512 ≥ 8 Single Supply Voltage V512 ≤ 8 OpAmp DC gain OpAmp Gain Bandwidth product OpAmp Input dynamic voltage DC-DC Converter switched-off when DC2REF voltage lower than Typ. 19 Max. 13.2 40 80 40 -25 External filter cap. 100nF Bang-Bang Mode Linear Mode Ratio of HVP and DC-DC ref. voltage PIN15 Output current (see figure 1a) Time to operating condition Switching Frequency Boost transistor ON resistance Boost transistor current limiting Charge Pump Slope Total current in sleep mode Reference voltage at PIN13 Reference voltage output current Filter capacitor at PIN13 Resistor at PIN14 for precise internal current (100µA) Minimum OpAmp supply Voltage (HVP if externally given) Min. 4.5 25 30 25 -40 20 80 2.5 0.8 21 V V 5 550 4 700 ms kHz Ω mA V/µs mA V mA 150 2.4 -1 2.5 10 1 2.6 1 100 25 Double Supply Single Supply Cload 0.4nF to 24nF Double Supply Voltage Double supply Single supply V512 +4 V512 +4 nF kΩ V V 130 500 -5 1.2 Unit V V V V V dB KHz 5 10 0.6 V V V L6270 - L6271 ELECTRICAL CHARACTERISTICS (continued) Symbol Vout DC, Ibias Iout PSRR,P PSRR,N Cload C int K Ierr (3) Voffset DCShift range Parameter OpAmp Output dynamic voltage OpAmp Bias supply current (both) OpAmp Dynamic Output current OpAmp Positive power supply rejection ratio OpAmp Negative power supply rejection ratio OpAmp Load capacitance range OpAmp Integration capacitance OpAmp Current ratio OUTK/OUT1 OpAmp Ioutk OpAmp Input offset voltage Dynamic Shifter Input Range Test Condition Capacitive load Min. HVM @ 50kHz -75 TBD @ 50kHz TBD Voltage mode Gain min 20dB 0.4 Charge mode Gain min 20dB 0.4 9.8 Iout1 = 0 -10 1 Typ. Max. HVP 7 Unit V mA 75 mA dB dB 10 24 nF 24 10.2 nF 50 ±10 4 µA mV V Note 1: Selectable by external resistor. Note 2: Set by external Coil and Capacitor. Note 3: It will be write after silicon characterization, it’s designed for a maximum offset of a few mA. In charge mode the Piezo is in open loop, and if Cpiezo = 0.4nF with a maximum Current error of ±5µA the Maximum long time voltage drift is ±12mV/µs Figure 1a. HVP load regulation in single supply mode”. VS (V) D99IN1003 38 36 Supply=8V 34 32 30 28 Supply=5V 26 24 22 0 0.004 0.008 0.012 0.016 IL(A) 5/10 L6270 - L6271 Figure 1. Charge Mode Configuration (only a suggestion, the application is completely free according with Electrical Characteristics). Qpiezo=K*[Cint*(1+Ra/Rb)+C]*Vdac Qpiezo=Cost*Vdac Cost=k*[Cint*(1+Ra/Rb)+C] HVP Vdac 1 K + - Cpiezo HVM Rb C 1 RP K Ra Cint D98IN970A OPERATIONAL AMPLIFIERS DESCRIPTION Each driver has two output stages scaled in current by a factor K = 10. In voltage mode configuration the two outputs are shorted. In charge mode configuration OUT1 drives a capacitor Cint and is closed in feedback, while OUTK drives the piezo, mirroring the current supplied to Cint, with a current multiplied by a K factor (see Fig.1). The supply voltage can be internally generated by the DC-DC converter, or external, maintaining the DC-DC converter in sleep mode (PIN15 shorted to ground), in this case the supply voltage can be 0 to V512+4 minimum value up to 80V in single supply or V512+4 to 40V symmetrical to ground. The drivers have 130dB DC gain and the Bandwidth is 500KHz. Stability is granted with a minimum gain of 20dB, for a capacitive load in the range 0.4nF up to 24nF. The drivers can be supplied with HVP-HVM (double supply mode) or with HVP-Ground (single supply mode). In both cases they can achieve a rail-to rail output dynamic range with a maximum load current of ±75mA. In double supply mode the input stage has 5V/+5V dynamic range, while in single supply mode it has 1.2V up to 10V input dynamic range. A 2.5V internal reference voltage is available at one pin (Vref) that can be used to close the feedback if the input signal is symmetrical around 2.5V. In this case the output dynamic is symmetrical around 2.5V. It is present a 2.5V down level shifter that can be connected between the input signal and the input of the opamp, to work inter6/10 nally with a signal symmetrical to ground. DC-DC CONVERTER DESCRIPTION The DC-DC converter inside the chip can be supplied from 5V up to 12V and has two parts, one to supply the positive and one to supply the negative voltage. The positive one takes the reference from the pin 2 DC REF and multiplies it by 20 to have the output voltage. If DC2REF is less than 0.6V the whole DC-DC converter is shut down and the high voltages have to be supplied from external. In Sleep Mode (sleep pin) HVM is shorted to GND. When in single supply, no load has to be connected to H-bridge output and HVM must be connected to GND. The topology is a standard resonant full-wave boost one: the LC oscillation is kept running all the time and a set of comparators is used to synchronize turning on and off of the power MOS in order to have zero current and zero voltage switching and furthermore controlled rectification. The step-up converter is designed to work in ”Bang-Bang” mode and in Linear mode, in this case an AC compensation network is required (RC-comp) to guarantee the stability in a wide operative range (i.e. changing coil, load, output and input voltage...). In Bang-Bang mode (Bang/Lin=V512 high condition) whenever the output HVP goes down fixed threshold (Vth,out = 20 ⋅ DC2REF), the next oscillation phase is more powerful and is used to transfer energy from the power supply to the output. In Linear mode, according to the ouput voltage, the current loaded into the coil is changing like a L6270 - L6271 Voltage Loop-Current Controlled system, and in every pulse there is a regulated power transfer to the load. The resonant LC topology has been chosen in order to limit the voltage slew-rate across the coil within reasonable values and so, to minimize irradiation problems. The negative converter is a simple charge transfer: it is supplied by the positive high voltage and it capacitively translates this positive voltage down to a negative one, obviously to limit irradiation problems also the charge output has a limited slew-rate; moreover to reduce intermodulation phoenomenas the charge output is synchronized with the LC oscillations of the resonant boost. This negative voltage is (not counting drops on external rectification diodes) in tracking with the positive one and so the negative output controller is not required. Figure 3. DC-DC converter V512 V512 + - BACK-UP OSCILL. V512 DC-DC LOGIC + 200µA - RS HVP + HVP +40V - B :5 L + - 2.5V HVM L -40V D98IN971A 7/10 L6270 - L6271 mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 OUTLINE AND MECHANICAL DATA 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 SO20 K 0° (min.)8° (max.) L h x 45° A B e A1 K H D 20 11 E 1 1 0 SO20MEC 8/10 C L6270 - L6271 mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 A2 2.55 0.100 B 0.33 0.51 0.013 0.0200 C 0.23 0.32 0.009 0.013 D 15.20 15.60 0.598 0.614 E 7.40 7.60 0.291 0.299 e 1.27 0,050 H 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 k OUTLINE AND MECHANICAL DATA 0° (min.), 8° (max.) L 0.40 1.27 0.016 SO24 0.050 0.10mm B e A A2 h x 45° A1 K A1 L .004 C H Seating Plane D 13 1 12 E 24 SO24 9/10 L6270 - L6271 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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