November 1997 FDC634P P-Channel Enhancement Mode Field Effect Transistor General Description Features These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching, and low in-line power loss are needed in a very small outline surface mount package. SuperSOTTM-6 SOT-23 SuperSOTTM-8 S D D .63 -3.5 A, -20 V. RDS(ON) = 0.080 Ω @ VGS = -4.5 V RDS(ON) = 0.110 Ω @ VGS = -2.5 V. SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOIC-16 SOT-223 SO-8 1 6 2 5 3 4 4 G SuperSOT TM pin 1 -6 D D Absolute Maximum Ratings T A = 25°C unless otherwise note Symbol Parameter FDC634P Units VDSS Drain-Source Voltage -20 V VGSS Gate-Source Voltage - Continuous ±8 V ID Drain Current - Continuous -3.5 A PD Maximum Power Dissipation (Note 1a) - Pulsed -11 (Note 1a) (Note 1b) TJ,TSTG Operating and Storage Temperature Range 1.6 W 0.8 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W © 1997 Fairchild Semiconductor Corporation FDC634P Rev.C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min -20 Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 o C IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V V mV /oC -29 o -1 µA -10 µA IGSSF Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -8 V, VDS= 0 V -100 nA TJ = 55 C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA ∆VGS(th)/∆TJ Gate Threshold VoltageTemp.Coefficient ID = -250 µA, Referenced to 25 o C -0.4 RDS(ON) Static Drain-Source On-Resistance VGS = -4.5 V, ID = -3.5 A -0.6 -1 V mV /oC 2.1 o TJ = 125 C VGS = -2.5 V, ID= -3.1 A 0.07 0.08 0.099 0.13 0.093 0.11 -10 Ω ID(on) On-State Drain Current VGS = -4.5 V, VDS = -5 V gFS Forward Transconductance VDS = -10 V, ID= -3.5 A 6.5 A S DYNAMIC CHARACTERISTICS Ciss Input Capacitance VDS = -10 V, VGS = 0 V, 665 pF Coss Output Capacitance f = 1.0 MHz 270 pF Crss Reverse Transfer Capacitance 70 pF SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time VDD = -5 V, ID = -1 A, 8 16 ns tr Turn - On Rise Time VGS = -4.5 V, RGEN = 6 Ω 24 38 ns tD(off) Turn - Off Delay Time 50 80 ns tf Turn - Off Fall Time 29 45 ns 13 nC Qg Total Gate Charge VDS = -5 V, ID = -3.5 A, 9.5 Qgs Gate-Source Charge VGS = -4.5 V 1.3 nC Qgd Gate-Drain Charge 2.2 nC DRAIN-SOURCE DIODE CHARACTERISTICS IS Continuous Source Diode Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A (Note 2) TJ = 125oC -1.3 A -0.75 -1.2 V -0.6 -1 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78oC/W when mounted on a 1 in2 pad of 2oz Cu in FR-4 board. b. 156oC/W when mounted on a minimum pad of 2oz Cu in FR-4 board. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. FDC634P Rev.C Typical Electrical Characteristics 12 -3.5 -3.0 -2.5 R DS(ON), NORMALIZED -I D , DRAIN-SOURCE CURRENT (A) VGS = -4.5V 9 -2.0 6 3 0 -1.5 DRAIN-SOURCE ON-RESISTANCE 2 15 1.8 V GS = -2.0 V 1.6 -3.5 1.2 1 2 3 4 -VDS , DRAIN-SOURCE VOLTAGE (V) -3.0 -4.5 1 0.8 0 -2.5 1.4 5 0 3 Figure 1. On-Region Characteristics. R DS(ON) , ON-RESISTANCE (OHM) V GS = -4.5V 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 15 ID = -1.8A 0.2 0.15 TJ = 125°C 0.1 25°C 0.05 150 1 2 3 4 5 -VGS , GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On Resistance Variation with Gate-To- Source Voltage. 15 15 T = -55°C J VDS = -5.0V -IS , REVERSE DRAIN CURRENT (A) R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 12 0.25 I D = -3.5A -ID , DRAIN CURRENT (A) 9 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 25°C 12 125°C 9 6 3 0 6 -I D , DRAIN CURRENT (A) 0 0.5 1 1.5 2 -VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 2.5 3 VGS = 0V 1 TJ = 125°C 25°C 0.1 -55°C 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC634P Rev.C Typical Electrical And Thermal Characteristics 2000 I D = -3.5A 1200 VDS = -5V 4 -10V -15V 3 2 Ciss 800 600 CAPACITANCE (pF) -VGS , GATE-SOURCE VOLTAGE (V) 5 Coss 200 80 1 f = 1 MHz VGS = 0 V 0 0 2 4 6 8 30 0.1 10 0.2 Qg , GATE CHARGE (nC) RD S(O N) I LIM 100 T 5 10 30 0.3 VGS = -4.5V SINGLE PULSE RθJA = See Note 1b A T A = 25°C 0.5 -V DS SINGLE PULSE RθJA =See note 1b TA = 25°C 4 1m s 10 ms 10 0m s 1s DC 1 0.2 us POWER (W) 5 3 2 1 1 2 5 10 20 0 0.01 40 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) , DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE -I D , DRAIN CURRENT (A) 2 5 10 0.01 0.1 1 Figure 8. Capacitance Characteristics. 20 0.03 0.5 -VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 0.1 Crss 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 0.0001 RθJA (t) = r(t) * R θJA R θJA = See Note 1b 0.1 P(pk) 0.05 t1 0.02 0.01 Single Pulse t2 TJ - T = P * R JA(t) θ Duty Cycle, D = t 1/ t 2 A 0.001 0.01 0.1 1 10 100 300 t 1, TIME (sec) Figure 11. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design. FDC634P Rev.C