TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS FEATURES • • • • • • • • • • • • Integrated Synchronous Rectifier for Highest Power Conversion Efficiency (>95%) Start-Up Into Full Load With Supply Voltages as Low as 0.9 V, Operating Down to 0.8 V 200-mA Output Current From 0.9-V Supply Powersave-Mode for Improved Efficiency at Low Output Currents Autodischarge Allows to Discharge Output Capacitor During Shutdown Device Quiescent Current Less Than 50 µA Ease-of-Use Through Isolation of Load From Battery During Shutdown of Converter Integrated Antiringing Switch Across Inductor Integrated Low Battery Comparator Micro-Small 10-Pin MSOP Package Applications Include All Single- or Dual-Cell Battery Operated Products Like Internet Audio Players, Pager, Portable Medical Diagnostic Equipment, Remote Control, Wireless Headsets EVM Available (TPS6101xEVM-157) An autodischarge function allows discharging the output capacitor during shutdown mode. This is especially useful when a microcontroller or memory is supplied, where residual voltage across the output capacitor can cause malfunction of the applications. When programming the ADEN-pin, the autodischarge function can be disabled. A low-EMI mode is implemented to reduce interference and radiated electromagnetic energy when the converter enters the discontinuous conduction mode. The device is packaged in the micro-small space saving 10-pin MSOP package. (TOP VIEW) EN COMP FB GND VOUT The converter is based on a fixed frequency, current mode, pulse-width-modulation (PWM) controller that goes automatically into power save mode at light load. It uses a built-in synchronous rectifier, so, no external Schottky diode is required and the system efficiency is improved. The current through the switch is limited to a maximum value of 1300 mA. The converter can be disabled to minimize battery drain. During shutdown, the load is completely isolated from the battery. 10 2 9 3 8 4 7 5 6 LBO LBI ADEN SW VBAT ACTUAL SIZE (3,05mm x 4,98mm) EFFICIENCY vs OUTPUT CURRENT DESCRIPTION 100 VBAT = 2.4 V, VO = 3.3 V 90 Efficiency − % The TPS6101x devices are boost converters intended for systems that are typically operated from a single- or dual-cell nickel-cadmium (NiCd), nickel-metal hydride (NiMH), or alkaline battery. The converter output voltage can be adjusted from 1.5 V to a maximum of 3.3 V, by an external resistor divider or, is fixed internally on the chip. The devices provide an output current of 200 mA with a supply voltage of only 0.9 V. The converter starts up into a full load with a supply voltage of only 0.9 V and stays in operation with supply voltages down to 0.8 V. 1 80 70 60 50 40 0.1 1 10 100 1000 IO − Output Current − mA Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000 – 2003, Texas Instruments Incorporated TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. L1 10 µH CIN 10 µF 7 SW 6 VBAT VOUT 5 VOUT = 3.3 V COUT 22 µF R3 R1 9 LBI R2 OFF ON 1 OFF ON 8 LBO 10 Low Battery Warning TPS61016 EN FB COMP ADEN GND 4 3 2 RC 100 kΩ CC1 10 pF CC2 10 nF Figure 1. Typical Application Circuit for Fixed Output Voltage Option AVAILABLE OUTPUT VOLTAGE OPTIONS TA -40°C to 85°C (1) 2 OUTPUT VOLTAGE PART NUMBER (1) Adjustable from 1.5 V to 3.3 V TPS61010DGS AIP 1.5 V TPS61011DGS AIQ MARKING DGS PACKAGE 1.8 V TPS61012DGS AIR 2.5 V TPS61013DGS AIS 2.8 V TPS61014DGS AIT 3.0 V TPS61015DGS AIU 3.3 V TPS61016DGS AIV The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS61010DGSR) to order quantities of 3000 devices per reel. TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 FUNCTIONAL BLOCK DIAGRAMS fixed output voltage versions TPS61011 to TPS61016 L1 SW CIN Antiringing Comparator and Switch Bias Control _ + VOUT VBAT COUT ADEN UVLO ADEN ADEN LBI _ LBO Current Sense, Current Limit, Slope Compensation Control Logic Oscillator Gate Drive EN + Error Comparator + _ _ Error Amplifier + FB Bandgap Reference VREF GND COMP adjustable output voltage version TPS61010 L1 SW CIN Antiringing Comparator and Switch Bias Control _ + VOUT VBAT COUT ADEN UVLO ADEN ADEN + _ LBI _ LBO Current Sense, Current Limit, Slope Compensation Control Logic Oscillator Gate Drive EN + FB _ Error Comparator Error Amplifier + Bandgap Reference VREF GND COMP 3 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 Terminal Functions terminal I/O description name no. ADEN 8 I Autodischarge input. The autodischarge function is enabled if this pin is connected to VBAT, it is disabled if ADEN is tied to GND. COMP 2 I Compensation of error amplifier. Connect an R/C/C network to set frequency response of control loop. EN 1 I Chip-enable input. The converter is switched on if this pin is set high, it is switched off if this pin is connected to GND. FB 3 I Feedback input for adjustable output voltage version TPS61010. Output voltage is programmed depending on the output voltage divider connected there. For the fixed output voltage versions, leave FB-pin unconnected. GND 4 LBI 9 I Low-battery detector input. A low battery warning is generated at LBO when the voltage on LBI drops below the threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is not used. Do not leave this pin floating. LBO 10 O Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below the threshold of 500 mV. A pullup resistor must be connected between LBO and VOUT. SW 7 I Switch input pin. The inductor is connected to this pin. VOUT 5 O Output voltage. Internal resistor divider sets regulated output voltage in fixed output voltage versions. VBAT 6 I Supply pin Ground DETAILED DESCRIPTION Controller Circuit The device is based on a current-mode control topology using a constant frequency pulse-width modulator to regulate the output voltage. The controller limits the current through the power switch on a pulse by pulse basis. The current-sensing circuit is integrated in the device, therefore, no additional components are required. Due to the nature of the boost converter topology used here, the peak switch current is the same as the peak inductor current, which will be limited by the integrated current limiting circuits under normal operating conditions. The control loop must be externally compensated with an R-C-C network connected to the COMP-pin. Synchronous Rectifier The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. There is no additional Schottky diode required. Because the device uses a integrated low rDS(on) PMOS switch for rectification, the power conversion efficiency reaches 95%. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown and allows current flowing from the battery to the output. This device, however, uses a special circuit to disconnect the backgate diode of the high-side PMOS and so, disconnects the output circuitry from the source when the regulator is not enabled (EN = low). The benefit of this feature for the system design engineer, is that the battery is not depleted during shutdown of the converter. So, no additional effort has to be made by the system designer to ensure disconnection of the battery from the output of the converter. Therefore, design performance will be increased without additional costs and board space. Power-Save Mode The TPS61010 is designed for high efficiency over a wide output current range. Even at light loads, the efficiency stays high because the switching losses of the converter are minimized by effectively reducing the switching frequency. The controller enters a powersave-mode if certain conditions are met. In this mode, the controller only switches on the transistor if the output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses, and goes again into powersave-mode once the output voltage exceeds a set threshold voltage. 4 www.ti.com TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 DETAILED DESCRIPTION (continued) Device Enable The device is shut down when EN is set to GND. In this mode, the regulator stops switching, all internal control circuitry including the low-battery comparator, is switched off, and the load is disconnected from the input (as described above in the synchronous rectifier section). This also means that the output voltage may drop below the input voltage during shutdown. The device is put into operation when EN is set high. During start-up of the converter, the duty cycle is limited in order to avoid high peak currents drawn from the battery. The limit is set internally by the current limit circuit and is proportional to the voltage on the COMP-pin. Under-Voltage Lockout An under-voltage lockout function prevents the device from starting up if the supply voltage on VBAT is lower than approximately 0.7 V. This under-voltage lockout function is implemented in order to prevent the malfunctioning of the converter. When in operation and the battery is being discharged, the device will automatically enter the shutdown mode if the voltage on VBAT drops below approximately 0.7 V. Autodischarge The autodischarge function is useful for applications where the supply voltage of a µC, µP, or memory has to be removed during shutdown in order to ensure a defined state of the system. The autodischarge function is enabled when the ADEN is set high, and is disabled when the ADEN is set to GND. When the autodischarge function is enabled, the output capacitor will be discharged after the device is shut down by setting EN to GND. The capacitors connected to the output are discharged by an integrated switch of 300 Ω, hence the discharge time depends on the total output capacitance. The residual voltage on VOUT is less than 0.4 V after autodischarge. Low-Battery Detector Circuit (LBI and LBO) The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is enabled. When the device is disabled, the LBO-pin is high impedance. The LBO-pin goes active low when the voltage on the LBI-pin decreases below the set threshold voltage of 500 mV ±15 mV, which is equal to the internal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider connected to the LBI-pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV, which is then compared to the LBI threshold voltage. The LBI-pin has a built-in hysteresis of 10 mV. See the application section for more details about the programming of the LBI-threshold. If the low-battery detection circuit is not used, the LBI-pin should be connected to GND (or to VBAT) and the LBO-pin can be left unconnected. Do not let the LBI-pin float. Antiringing Switch The device integrates a circuit that removes the ringing that typically appears on the SW-node when the converter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero and the integrated PMOS switch turns off to prevent a reverse current from the output capacitors back to the battery. Due to remaining energy that is stored in parasitic components of the semiconductors and the inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage internally to VBAT and therefore, dampens this ringing. Adjustable Output Voltage The devices with fixed output voltages are trimmed to operate with an output voltage accuracy of ±3%. 5 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 The accuracy of the adjustable version is determined by the accuracy of the internal voltage reference, the controller topology, and the accuracy of the external resistor. The reference voltage has an accuracy of ±4% over line, load, and temperature. The controller switches between fixed frequency and pulse-skip mode, depending on load current. This adds an offset to the output voltage that is equivalent to 1% of VO. The tolerance of the resistors in the feedback divider determine the total system accuracy. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT Input voltage range on VBAT, VOUT, SW, EN, LBI, FB, ADEN -0.3 V to 3.6 V SW -0.3 V to 7 V Voltage range on: LBO, COMP 3.6 V Peak current into SW 1300 mA Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, TA -40°C to 85°C Maximum junction temperature, TJ 150°C Storage temperature range, Tstg -65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10s (1) 260°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA <25°C POWER RATING DGS 424 mW DERATING FACTORABOVE TA TA = 70°C POWER = 25°C RATING 3.4 mW/°C TA = 85°C POWER RATING 271 mW 220 mW RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage at VBAT, VI 0.8 Maximum output current at VIN = 1.2 V, IO 100 mA Maximum output current at VIN = 2.4 V, IO 200 mA Inductor, L1 10 33 10 22 Input capacitor, Ci Output capacitor, Co Operating virtual junction temperature, TJ 6 VOUT µH 10 -40 V µF 47 µF 125 °C TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted) PARAMETER VI TEST CONDITIONS RL = 33 Ω 0.8 Input voltage once started IO = 100 mA 0.8 Programmable output voltage range TPS61010, IOUT = 100 mA 1.5 UNIT 0.9 V 3.3 V TPS61011, 0.8 V < VI < VO, IO = 0 to 100 mA 1.45 1.5 1.55 TPS61012, 0.8 V < VI < VO, IO = 0 to 100 mA 1.74 1.8 1.86 TPS61013, 0.8 V < VI < VO, IO = 0 to 100 mA 2.42 2.5 2.58 TPS61013, 1.6 V < VI < VO, IO = 0 to 200 mA 2.42 2.5 2.58 V TPS61014, 0.8 V < VI < VO, IO = 0 to 100 mA 2.72 2.8 2.88 V TPS61014, 1.6 V < VI < VO, IO = 0 to 200 mA 2.72 2.8 2.88 V TPS61015, 0.8 V < VI < VO, IO = 0 to 100 mA 2.9 3.0 3.1 V TPS61015, 1.6 V < VI < VO, IO = 0 to 200 mA 2.9 3.0 3.1 V TPS61016, 0.8 V < VI < VO, IO = 0 to 100 mA 3.2 3.3 3.4 V TPS61016, 1.6 V < VI < VO, IO = 0 to 200 mA 3.2 3.3 3.4 V Maximum continuous output VI ≥ 0.8 V current VI ≥ 1.8 V Switch current limit MAX 0.85 RL = 3 kΩ, TA = 25 °C Output voltage I(SW) TYP Minimum input voltage for start-up VO IO MIN 100 V V mA 250 TPS61011, once started 0.39 0.48 TPS61012, once started 0.54 0.56 TPS61013, once started 0.85 0.93 TPS61014, once started 0.95 1.01 TPS61015, once started 1 1.06 TPS61016, once started 1.07 1.13 A V(FB) Feedback voltage 480 500 520 mV f Oscillator frequency 420 500 780 kHz D Maximum duty cycle rDS(on) rDS(on) NMOS switch on-resistance PMOS switch on-resistance NMOS switch on-resistance PMOS switch on-resistance Line regulation (1) Load regulation (1) 85% VO = 1.5 V VO = 3.3 V VIL (1) (2) 0.54 0.2 0.37 0.3 0.45 0.3 0.1 300 ADEN = VBAT; EN = GND V(LBI) voltage decreasing 480 500 LBO output low voltage V(LBI) = 0 V, VO = 3.3 V, I(OL) = 10 µA LBO output leakage current V(LBI) = 650 mV, V(LBO) = VO FB input bias current (TPS61010 only) V(FB) = 500 mV Ω Ω %/V 400 Ω 0.4 V 520 mV 10 LBI input current I(FB) 0.45 VI = 1.2 V; IO = 50 mA to 100 mA LBI input hysteresis VOL 0.51 VI = 1.2 V to 1.4 V, IO = 100 mA Autodischarge switch resistance Residual output voltage after autodischarge LBI voltage threshold (2) 0.37 mv 0.01 0.03 0.04 0.2 V 0.03 µA 0.01 0.03 Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominal output voltage). For line regulation, x %/V stands for ±x% change of the nominal output voltage per 1-V change on the input/supply voltage. For load regulation, y% stands for ±y% change of the nominal output voltage per the specified current change. For proper operation the voltage at LBI may not exceed the voltage at VBAT. 7 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 ELECTRICAL CHARACTERISTICS (continued) over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VIL EN and ADEN input low voltage 0.8 V < VBAT < 3.3 V VIH EN and ADEN input high voltage 0.8 V < VBAT < 3.3 V EN and ADEN input current EN and ADEN = GND or VBAT TYP MAX UNIT 0.2 × VBAT V 0.8 × VBAT V 0.01 0.03 31 46 5 8 1 3 VBAT/SW Iq Quiescent current into pins VBAT/SW and VOUT IL = 0 mA, VEN = VI Ioff Shutdown current from power source VEN = 0 V, ADEN = VBAT, TA= 25°C VO µA µA µA PARAMETER MEASUREMENT INFORMATION L1 10 µH CIN 10 µF 7 SW 6 VBAT VOUT 5 VOUT = 3.3 V R3 R1 9 LBI R2 10 Low Battery Warning TPS61016 8 OFF LBO COUT 22 µF List of Components: IC1: Only Fixed Output Versions (Unless Otherwise Noted) L1: SUMIDA CDRH6D38 – 100 CIN: X7R/X5R Ceramic COUT : X7R/X5R Ceramic ON 1 ADEN FB COMP EN GND 4 3 2 RC 100 kΩ CC1 10 pF CC2 10 nF Figure 2. Circuit Used for Typical Characteristics Measurements 8 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Maximum output current vs Input voltage for VO = 2.5 V, 3.3 V 3 vs Input voltage for VO = 1.5 V, 1.8 V 4 vs Output current for VI = 1.2 VVO = 1.5 V, L1 = Sumida CDR74, 10 µH 5 vs Output current for VI = 1.2 VVO = 2.5 V, L1 = Sumida CDR74, 10 µH 6 vs Output current for VIN = 1.2 VVO = 3.3 V, L1 = Sumida CDR74, 10 µH 7 vs Output current for VI = 2.4 VVO = 3.3 V, L1 = Sumida CDR74, 10 µH 8 vs Input voltage for IO = 10 mA, IO = 100 mA, IOUT = 200 mAVO = 3.3 V, L1 = Sumida CDR74, 10 µH 9 TPS61016, VBAT = 1.2 V, IO = 100 mA Sumida CDRH6D38 - 10 µH Sumida CDRH5D18 - 10 µH Sumida CDRH74 - 10 µH Efficiency Sumida CDRH74B - 10 µH Coilcraft DS 1608C - 10 µH Coilcraft DO 1608C - 10 µH Coilcraft DO 3308P - 10 µH 10 Coilcraft DS 3316 - 10 µH Coiltronics UP1B - 10 µH Coiltronics UP2B - 10 µH Murata LQS66C - 10 µH Murata LQN6C - 10 µH TDK SLF 7045 - 10 µH TDK SLF 7032 - 10 µH vs Output current TPS61011 11 vs Output current TPS61013 12 vs Output current TPS61016 13 Minimum supply start-up voltage vs Load resistance 14 No-load supply current vs Input voltage 15 Shutdown supply current vs Input voltage 16 Switch current limit vs Output voltage 17 Output voltage (ripple) in continuous modeInductor current 18 Output voltage (ripple) in discontinuous modeInductor current 19 Output voltage Waveforms Load transient response for output current step of 50 mA to 100 mA 20 Line transient response for supply voltage step from 1.08 V to 1.32 V at IO = 100 mA 21 Converter start-up time after enable 22 9 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 TYPICAL CHARACTERISTICS MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 0.9 1.4 0.8 1 Maximum Output Current − A Maximum Output Current − A 1.2 VO = 2.5 V 0.8 VO = 3.3 V 0.6 0.4 0.2 0 0.5 0.7 VO = 1.8 V 0.6 0.5 VO = 1.5 V 0.4 0.3 0.2 0.1 1 1.5 2 VI − Input Voltage − V 2.5 0 0.5 3 1 1.5 VI − Input Voltage − V Figure 3. Figure 4. EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 VBAT = 1.2 V, VO = 1.5 V VBAT = 1.2 V, VO = 2.5 V 90 90 80 80 Efficiency − % Efficiency − % 100 70 60 50 50 1 10 100 IO − Output Current − mA Figure 5. 10 70 60 40 0.1 2 1000 40 0.1 1 10 100 IO − Output Current − mA Figure 6. 1000 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 TYPICAL CHARACTERISTICS (continued) EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 100 VBAT = 2.4 V, VO = 3.3 V 90 90 80 80 Efficiency − % 70 70 60 60 50 50 40 0.1 1 10 100 40 0.1 1000 1 IO − Output Current − mA Figure 7. 10 100 Figure 8. EFFICIENCY vs INPUT VOLTAGE EFFICIENCY vs INDUCTOR TYPE 91 100 VBAT = 1.2 V, VO = 3.3 V, IO = 100 mA VO = 3.3 V 90 90 89 80 IO = 100 mA Efficiency − % IO = 200 mA IO = 10 mA 70 60 88 87 86 85 84 SLF7032 TDK SLF7045 LQN6C UP2B Coiltronics UP1B DS3316 3.5 DO3308P 3 DO1608C 1.5 2 2.5 VI − Input Voltage − V Coilcraft DS1608C 1 CDR74B 40 0.5 CDRH74 83 CDRH5D18 50 Sumida CDRH6D38 Efficiency − % 1000 IO − Output Current − mA Murata LQS66C Efficiency − % VBAT = 1.2 V, VO = 3.3 V Inductor Type Figure 9. Figure 10. 11 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 2.75 1.75 VBAT = 1.2 V VO − Output Voltage − V VO − Output Voltage − V VBAT = 1.2 V 1.50 1.25 0.1 1 10 100 IO − Output Current − mA Figure 11. 2.50 2.25 0.1 1A 1 10 100 IO − Output Current − mA 1A Figure 12. OUTPUT VOLTAGE vs OUTPUT CURRENT MINIMUM START-UP SUPPLY VOLTAGE vs LOAD RESISTANCE 1 3.50 3.25 3 0.1 12 Minimum Startup Supply Voltage − V VO − Output Voltage − V VBAT = 1.2 V 0.9 0.8 0.7 1 10 100 IO − Output Current − mA Figure 13. 1A 100 Load Resistance − Ω Figure 14. 1 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 TYPICAL CHARACTERISTICS (continued) NO-LOAD SUPPLY CURRENT vs INPUT VOLTAGE SHUTDOWN SUPPLY CURRENT vs INPUT VOLTAGE 60 6 50 40 I CC − Shutdown Supply Current − µ A I CC − No-Load Supply Current − µ A TA = 85° C TA = 85°C TA = 25°C TA = −40°C 30 20 10 0 0.5 1 1.5 2 2.5 VI − Input Voltage − V 3 5 4 3 2 TA = −40° C 1 TA = 25° C 0 0.5 3.5 1 1.5 2 2.5 VI − Input Voltage − V Figure 15. 3 3.5 Figure 16. SWITCH CURRENT LIMIT vs OUTPUT VOLTAGE OUTPUT VOLTAGE RIPPLE IN CONTINUOUS MODE 1.2 Output Voltage 20 mV/div, AC Switch Current Limit − A 1 0.8 0.6 0.4 Inductor Current 50 mA/div, AC 0.2 0 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 VO − Output Voltage − V Figure 17. 3.1 3.3 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs Figure 18. 13 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE RIPPLE IN DISCONTINUOUS MODE LOAD TRANSIENT RESPONSE Output Voltage 50 mV/div, AC Output Voltage 50 mV/div, AC Output Current 50 mA/div, AC Inductor Current 50 mA/div, AC 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 t − Time − ms Figure 19. 0.9 1 0 1 2 3 4 5 6 7 8 9 10 t − Time − ms Figure 20. LINE TRANSIENT RESPONSE CONVERTER START-UP TIME AFTER ENABLE Enable, 2 V/div,DC Input Voltage 100 mV/div, AC Output Voltage, 1 V/div,DC Input Current, 200 mA/div,DC V(SW), 2 V/div,DC Output Voltage 50 mA/div, AC 0 14 1 2 3 4 5 6 7 t − Time − ms Figure 21. 8 9 10 0 1 2 3 4 5 6 7 t − Time − ms Figure 22. 8 9 10 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 DESIGN PROCEDURE The TPS6101x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMH battery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered by two-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, single- or dual-cell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6101x is used. Programming the TPS61010 Adjustable Output Voltage Device The output voltage of the TPS61010 can be adjusted with an external resistor divider. The typical value of the voltage on the FB pin is 500 mV in fixed frequency operation and 485 mV in the power-save operation mode. The maximum allowed value for the output voltage is 3.3 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 is in the range of 500 kΩ in order to set the divider current at 1 µA. From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using Equation 1. VO VO R3 R4 –1 500 k –1 VFB 500 mV (1) If, as an example, an output voltage of 2.5 V is needed, a 2-MΩ resistor should be chosen for R3. L1 10 µH CIN 10 µF 10 V 7 SW 6 VBAT VOUT 5 R5 R1 9 LBI LBO R2 FB 1 8 R3 10 Low Battery Warning 3 TPS61016 1 Cell NiMH, NiCd or Alkaline VOUT = 3.3 V COUT 22 µF 10 V R4 EN COMP ADEN GND 4 2 RC 100 kΩ CC1 10 pF CC2 10 nF Figure 23. Typical Application Circuit for Adjustable Output Voltage Option The output voltage of the adjustable output voltage version changes with the output current. Due to device-internal ground shift, which is caused by the high switch current, the internal reference voltage and the voltage on the FB pin increases with increasing output current. Since the output voltage follows the voltage on the FB pin, the output voltage rises as well with a rate of 1 mV per 1-mA output current increase. Additionally, when the converter goes into pulse-skip mode at output currents around 5 mA and lower, the output voltage drops due to the hysteresis of the controller. This hysteresis is about 15 mV, measured on the FB pin. programming the low battery comparator threshold voltage The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The typical current into the LBI pin is 0.01 µA, the voltage across R2 is equal to the reference voltage that is generated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in the range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be calculated using Equation 2. 15 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 DESIGN PROCEDURE (continued) R1 R2 VBAT VREF –1 500 k V BAT 500 mV –1 (2) For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a battery voltage of 1 V, a resistor in the range of 500 kΩ should be chosen for R1. The output of the low battery comparator is a simple open-drain output that goes active low if the battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1 MΩ, and should only be pulled up to the VO. If not used, the LBO pin can be left floating or tied to GND. inductor selection A boost converter normally requires two main passive components for storing energy during the conversion. A boost inductor is required and a storage capacitor at the output. To select the boost inductor, it is recommended to keep the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. For example, the current limit threshold of the TPS61010’s switch is 1100 mA at an output voltage of 3.3 V. The highest peak current through the inductor and the switch depends on the output load, the input (VBAT), and the output voltage (VO). Estimation of the maximum average inductor current can be done using Equation 3. VO I L I OUT VBAT 0.8 (3) For example, for an output current of 100 mA at 3.3 V, at least 515-mA of current flows through the inductor at a minimum input voltage of 0.8 V. The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way, regulation time at load changes rises. In addition, a larger inductor increases the total system costs. With those parameters, it is possible to calculate the value for the inductor by using Equation 4. L V BAT V OUT V BAT I L ƒ V OUT (4) Parameter 7 is the switching frequency and∆ IL is the ripple current in the inductor, i.e., 20% × IL. In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculated currents, it is possible to choose a suitable inductor. Care must be taken that load transients and losses in the circuit can lead to higher currents as estimated in equation 3. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency. The following inductor series from different suppliers were tested. All work with the TPS6101x converter within their specified parameters: Table 1. Recommended Inductors VENDOR RECOMMENDED INDUCTOR SERIES Sumida Sumida CDR74B Sumida CDRH74 Sumida CDRH5D18 Sumida CDRH6D38 Coilcraft Coilcraft DO 1608C Coilcraft DS 1608C Coilcraft DS 3316 Coilcraft DT D03308P 16 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 DESIGN PROCEDURE (continued) Recommended Inductors (continued) VENDOR RECOMMENDED INDUCTOR SERIES Coiltronics Coiltronics UP1B Coiltronics UP2B Murata Murata LQS66C Murata LQN6C TDK TDK SLF 7045 TDK SLF 7032 capacitor selection The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by using Equation 5. C min I OUT VOUT VBAT ƒ V V OUT (5) Parameter f is the switching frequency and ∆V is the maximum allowed ripple. With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple is larger due to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 6. V ESR I OUT RESR (6) An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 mΩ. The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For example, a 10-µF ceramic capacitor with an ESR of 50 mΩ is used on the evaluation module (EVM). Tradeoffs must be made between performance and costs of the converter circuit. A 10-µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in parallel placed close to the IC is recommended. Compensation of the Control Loop An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter. Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output capacitor must be compensated. The network shown in Figure 5 satisfies these requirements. RC COMP 100 kΩ CC1 10 pF CC2 10 nF Figure 24. Compensation of Control Loop Resistor RC and capacitor CC2 depend on the chosen inductance. For a 10-µH inductor, the capacitance of CC2 should be chosen to 10 nF, or in other words, if the inductor is XXµH, the chosen compensation capacitor should be XX nF, the same number value. The value of the compensation resistor is then chosen based on the requirement to have a time constant of 1 ms, for the R/C network RC and CC2, hence for a 33-nF capacitor, a 33-kΩ resistor should be chosen for RC. 17 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 DESIGN PROCEDURE (continued) Capacitor CC1 depends on the ESR and capacitance value of the output capacitor, and on the value chosen for RC. Its value is calculated using Equation 7. C ESRCOUT C C1 OUT RC (7) For a selected output capacitor of 22 µF with an ESR of 0.2Ω , an RC of 33 kΩ, the value of CC1 is in the range of 100 pF. Table 2. Recommended Compensation Components INDUCTOR[µH] OUTPUT CAPACITOR RC[kΩ] CC1[pF] CC2[nF] 0.2 33 120 33 0.3 47 150 22 22 0.4 100 100 10 10 0.1 100 10 10 CAPACITANCE[µF] ESR[Ω] 33 22 22 22 10 10 LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path as indicated in bold in Figure 25. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node as shown in Figure 25 to minimize the effects of ground noise. The compensation circuit and the feedback divider should be placed as close as possible to the IC. To layout the control ground, it is recommended to use short traces as well, separated from the power ground traces. Connect both grounds close to the ground pin of the IC as indicated in the layout diagram in Figure 25. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. U1 L1 SW Battery VOUT R4 C1 VBAT LBO C4 LBO R2 R1 R3 R5 LBI FB R6 ADEN COMP C2 EN GND Figure 25. Layout Diagram 18 C3 OUTPUT TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 APPLICATION INFORMATION U1 L1 SW VOUT R4 C1 VBAT Battery LBO C4 C5 LBO OUTPUT R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS6101 (1–6) C1, C4, C5 10 µF X5R Ceramic, TDK C3216X5R0J106 L1 10 µH SUMIDA CDRH5D18–100 Figure 26. 1,8 mm Maximum Height Power Supply With Single Battery Cell Input Using Low Profile Components U1 IOUT ≥ 250 mA L1 SW Battery VOUT R4 C1 VBAT LBO C4 LBO OUTPUT R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS6101 (1–6) C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226 L1 10 µH SUMIDA CDRH6D38 Figure 27. 250-mA Power Supply With Two Battery Cell Input 19 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 APPLICATION INFORMATION (continued) U1 L1 SW Battery VOUT 3.3-V I/O Supply U2 R4 C1 VBAT LBO C4 LDO 1.5-V Core Supply LBO C6 R5 GND FB LBI R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS61016 U2 TPS76915 C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226 L1 10 µH SUMIDA CDRH6D38 Figure 28. Dual Output Voltage Power Supply for DSPs 6-V/10-mA Aux Output C7 DS1 C6 U1 L1 SW Battery VOUT 3.3-V/100-mA Main Output R4 C1 VBAT LBO C4 LBO GND R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS61016 DS1 BAT54S C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226, C6 1 µF X5R Ceramic, C7 0.1 µF X5R Ceramic, L1 10 µH SUMIDA CDRH6D38–100 Figure 29. Power Supply With Auxiliary Positive Output Voltage 20 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 APPLICATION INFORMATION (continued) C7 C6 DS1 GND –2.7-V/10-mA Aux Output U1 L1 SW Battery VOUT 3.3-V/100-mA Main Output R4 C1 VBAT LBO C4 LBO GND R5 LBI FB R6 R1 ADEN COMP C2 EN C3 GND List of Components: U1 TPS61016 DS1 BAT54S C1 10 µF X5R Ceramic, TDK C3216X5R0J106 C4 22 µF X5R Ceramic, TDK C3225X5R0J226, C6 1 µF X5R Ceramic, C7 0.1 µF X5R Ceramic, L1 10 µH SUMIDA CDRH6D38–100 Figure 30. Power Supply With Auxiliary Negative Output Voltage L1 SW INPUT OUTPUT VOUT R4 C1 VBAT R5 LBO C4 C5 TPS6101x LBI FB R6 R1 ADEN C2 EN R3 COMP J1 J2 R2 LBO C3 GND GND Figure 31. TPS6101x EVM Circuit Diagram 21 TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 APPLICATION INFORMATION (continued) Figure 32. TPS6101x EVM Component Placement (actual size: 55,9 mm x 40,6 mm) Figure 33. TPS6101x EVM Top Layer Layout (actual size: 55,9 mm x 40,6 mm) 22 www.ti.com TPS61010, TPS61011 TPS61012, TPS61013 TPS61014, TPS61015, TPS61016 www.ti.com SLVS314C – SEPTEMBER 2000 – REVISED OCTOBER 2003 APPLICATION INFORMATION (continued) Figure 34. TPS6101x EVM Bottom Layer Layout (actual size: 55,9 mm x 40,6 mm) THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component. Three basic approaches for enhancing thermal performance are: • Improving the power dissipation capability of the PWB design • Improving the thermal coupling of the component to the PWB • Introducing airflow in the system The maximum junction temperature (TJ) of the TPS6101x devices is 125°C. The thermal resistance of the 10-pin MSOP package (DGS) is RΘJA = 294°C/W. Specified regulator operation is assured to a maximum ambient temperature (TA) of 85°C. Therefore, the maximum power dissipation is about 130 mW. More power can be dissipated if the maximum ambient temperature of the application is lower. T J(MAX) – T A P D(MAX) 125° C 85° C 136 mW R JA 294° CW (8) 23 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated