TI TPS62222DDC

TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
400-mA, 1.25-MHz, HIGH-EFFICIENCY, STEP-DOWN CONVERTER IN THIN-SOT23
FEATURES
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•
•
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•
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DESCRIPTION
High-Efficiency Synchronous Step-Down Converter With up to 95% Efficiency
2.5-V to 6.0-V Input Voltage Range
Adjustable Output Voltage Range From 0.7 V
to VI
Fixed Output Voltage Options Available
Up to 400-mA Output Current
1.25-MHz Fixed Frequency PWM Operation
Highest Efficiency Over Wide Load Current
Range Due to Power-Save Mode
15-µA Typical Quiescent Current
Soft Start
100% Duty Cycle Low-Dropout Operation
Dynamic Output-Voltage Positioning
Available in TSOT23 Package
APPLICATIONS
•
•
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PDAs and Pocket PC
Cellular Phones, Smart Phones
OMAP™ and Low Power DSP Supply
Digital Cameras
Portable Media Players
Portable Equipment
WLAN PC Cards
The TPS6222x devices are a family of high-efficiency,
synchronous step-down converters ideally suited for
portable systems powered by 1-cell Li-Ion or 3-cell
NiMH/NiCd batteries. The devices are also suitable to
operate from a standard 3.3-V or 5-V voltage rail.
With an output voltage range of 6.0 V down to 0.7 V
and up to 400-mA output current, the devices are
ideal to power low voltage DSPs and processors
used in PDAs, pocket PCs, and smart phones. Under
nominal load current, the devices operate with a fixed
switching frequency of typically 1.25 MHz. At light
load currents, the part enters the power-save mode
operation; the switching frequency is reduced and the
quiescent current is typically only 15 µA; therefore,
the device achieves the highest efficiency over the
entire load current range. The TPS6222x needs only
three small external components. Together with the
tiny TSOT23 package, a minimum system solution
size can be achieved. An advanced fast response
voltage mode control scheme achieves superior line
and load regulation with small ceramic input and
output capacitors.
TPS62220
VI
2.5 V to 6 V
C3
4.7 µF
1
2
3
VI
SW
5
GND
EN
FB
L1
4.7 µH
VO
1.5 V/400 mA
R1
360 kΩ
C1
22 pF
R2
180 kΩ
C2
100 pF
C4
10 µF
4
Typical Application (Adjustable Output Voltage Version)
Efficency − %
100
95
VO = 1.8 V,
L = 4.7 µH,
CO = 22 µF
90
85
80 VI = 2.7 V
75
70
65
60
55
50
45
40
0.01
VI = 3.7 V
VI = 5 V
0.1
1
10
100
IL − Load Current − mA
1000
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OMAP is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2004, Texas Instruments Incorporated
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA
OUTPUT VOLTAGE
THIN-SOT23 PACKAGE
Adjustable
TPS62220DDC
ALN
1.5 V
TPS62221DDC
ALO
1.6 V
TPS62224DDC
ALQ
1.7 V
TPS62229DDC
EJ
APP
-40°C to 85°C
(1)
(1)
SYMBOL
1.8 V
TPS62222DDC
1.875 V
TPS62228DDC
EH
2.3 V
TPS62223DDC
ALX
The DDC package is available in tape and reel. Add R suffix (TPS62220DDCR) to order quantities of 3000 parts. Add T suffix
(TPS62220DDCT) to order quantities of 250 parts.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature (unless otherwise noted)
VI
Supply voltage on pin
(1)
(2)
Voltages on pins SW, EN, FB
(2)
TPS6222x
UNIT
-0.3 to 7.0
V
-0.3 to VI +0.3
V
PD
Continuous power dissipation
TJ
Operating junction temperature range
See Dissipation Rating Table
-40 to 150
°C
Tstg
Storage temperature
-65 to 150
°C
260
°C
Lead temperature (soldering, 10 sec)
(1)
(2)
Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE (1)
(1)
PACKAGE
TA≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DDC
400 mW
4 mW/°C
220 mW
160 mW
The thermal resistance junction to ambient of the 5-pin Thin-SOT23 is 250°C/W.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
VI
Supply voltage
2.5
6
VO
Output voltage range for adjustable output voltage version
0.7
VI
IO
Output current
L
Inductor
CI
Input capacitor (1)
TA
Operating ambient temperature
-40
85
°C
TJ
Operating junction temperature
-40
125
°C
(1)
2
(1)
See the application section for further information
400
4.7
V
V
mA
µH
4.7
µF
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
ELECTRICAL CHARACTERISTICS
VI = 3.6 V, VO = 1.8 V, IO = 200 mA, EN = VIN, TA = -40°C to 85°C, typical values are at TA = + 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VI
Input voltage range
6.0
V
IQ
Operating quiescent current
IO = 0 mA, Device is not switching
2.5
15
25
µA
Shutdown supply current
EN = GND
0.1
1
µA
2.0
V
Undervoltage lockout threshold
1.5
EN high level input voltage
1.3
ENABLE
V(EN)
V
EN low level input voltage
I(EN)
EN input bias current
0.4
V
EN = GND or VIN
0.01
0.1
µA
VIN = VGS = 3.6 V
530
670
VIN = VGS = 2.5 V
670
850
VIN = VGS = 3.6 V
430
540
VIN = VGS = 2.5 V
530
660
POWER SWITCH
P-channel MOSFET on-resistance
rds(ON)
N-channel MOSFET on-resistance
mΩ
mΩ
Ilkg_(P)
P-channel leakage current
VDS = 6.0 V
0.1
1
Ilkg_(N)
N-channel leakage current
VDS = 6.0 V
0.1
1
µA
µA
I(LIM)
P-channel current limit
2.5 V < VIN < 6.0 V
600
670
880
mA
0.8
1.25
1.85
MHz
400
mA
VIN
V
OSCILLATOR
fS
Switching frequency
OUTPUT
IO
Output current
VO
Adjustable output voltage
range
Vref
Reference voltage
Feedback voltage, See
VO
TPS62220
0.7
0.5
(1)
TPS62220
Adjustable
VI = 3.6 V to 6.0 V, IO= 0 mA
TPS62221
1.5 V
VI = 2.5 V to 6.0 V, IO= 0 mA
TPS62224
1.6 V
VI = 2.5 V to 6.0 V, IO= 0 mA
TPS62229
1.7 V
VI = 2.5 V to 6.0 V, IO= 0 mA
TPS62222
1.8 V
VI = 2.5 V to 6.0 V, IO= 0 mA
TPS62228
1.875 V
VI = 2.5 V to 6.0 V, IO= 0 mA
TPS62223
2.3 V
VI = 2.7 V to 6.0 V, IO= 0 mA
Fixed output voltage
VI = 3.6 V to 6.0 V, 0 mA≤ IO≤ 400 mA
VI = 2.5 V to 6.0 V, 0 mA≤ IO≤ 400 mA
VI = 2.5 V to 6.0 V, 0 mA≤ IO≤ 400 mA
VI = 2.5 V to 6.0 V, 0 mA≤ IO≤ 400 mA
VI = 2.5 V to 6.0 V, 0 mA≤ IO≤ 400 mA
VI = 2.5 V to 6.0 V, 0 mA≤ IO≤ 400 mA
VI = 2.7 V to 6.0 V, 0 mA≤ IO≤ 400 mA
V
0%
3%
-3%
3%
0%
3%
-3%
3%
0%
3%
-3%
3%
0%
3%
-3%
3%
0%
3%
-3%
3%
0%
3%
-3%
3%
0%
3%
-3%
3%
Line regulation
VI = 2.5 V to 6.0 V, IO = 10 mA
Load regulation
IO = 100 mA to 400 mA
Ilkg
Leakage current into SW pin
Vin > Vout, 0 V ≤ Vsw ≤ Vin
0.1
1
µA
Ilkg(Rev)
Reverse leakage current into pin SW
Vin = open, EN=GND, VSW = 6.0 V
0.1
1
µA
(1)
0.26
%/V
0.0014
%/mA
For output voltages ≤ 1.2 V, a 22-µF output capacitor value is required to achieve a maximum output voltage accuracy of 3% while
operating in power-save mode (PFM mode). For output voltages ≥ 2 V, an inductor of 10 µH and an output capacitor of ≥ 10 µF is
recommended. See the Application Information section for external components.
3
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
PIN ASSIGNMENTS
DDC PACKAGE
(TOP VIEW)
VI
1
GND
2
EN
3
5
SW
4
FB
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
EN
3
I
This is the enable pin of the device. Pulling this pin to ground forces the device into shutdown mode.
Pulling this pin to Vin enables the device. This pin must be terminated.
FB
4
I
This is the feedback pin of the device. Connect this pin directly to the output if the fixed output voltage
version is used. For the adjustable version, an external resistor divider is connected to this pin. The
internal voltage divider is disabled for the adjustable version.
GND
2
SW
5
I/O
VI
1
I
4
Ground
Connect the inductor to this pin. This pin is the switch pin and is connected to the internal MOSFET
switches.
Supply voltage pin
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
FUNCTIONAL BLOCK DIAGRAM
VI
Current Limit Comparator
+
_
Undervoltage
Lockout
Bias Supply
+
_
Soft Start
V
I
V(COMP)
REF
Skip Comparator
REF
1.25 MHz
Oscillator
P-Channel
Power MOSFET
Sawtooth
Generator
Comparator
S
+
_
R
Driver
Shoot-Through
Logic
Control
Logic
Comparator High
SW
N-Channel
Power MOSFET
Comparator Low
Comparator Low 2
Load Comparator
+
_
Comparator High
+
Gm
_
Comparator Low
Comparator Low 2
EN
R1
Compensation
VREF = 0.5 V
+
_
R2
See Note
FB
GND
NOTE: For the adjustable version (TPS62220) the internal feedback divider is disabled, and the FB pin is directly connected
to the internal GM amplifier
5
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
η
Efficiency
vs Load current
Figure 1,
Figure 2,
Figure 3
vs Input voltage
Figure 4
IQ
No load quiescent current
vs Input voltage
Figure 5
fs
Switching frequency
vs Temperature
Figure 6
Vo
Output voltage
vs Output current
Figure 7
rds(on) - P-channel switch,
vs Input voltage
Figure 8
rds(on) - N-Channel rectifier switch
vs Input voltage
rds(on)
Figure 9
Load transient response
Figure 10
PWM mode operation
Figure 11
Power-save mode operation
Figure 12
Start-up
Figure 13
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
100
100
95
95
90
VI = 3.7 V
90
85
85
80
VI = 5 V
Efficency - %
Efficency - %
80
75
70
65
75
VI = 5 V
70
65
VI = 3.7 V
55
55
VO = 3.3 V,
L = 4.7 µH,
CO = 10 µF
50
45
0.1
1
10
IL - Load Current - mA
Figure 1.
6
VI = 2.7 V
60
60
40
0.01
VO = 1.8 V,
L = 4.7 µH,
CO = 22 µF
100
50
45
1000
40
0.01
0.1
1
10
IL - Load Current - mA
Figure 2.
100
1000
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
INPUT VOLTAGE
100
100
VO = 1.5 V,
L = 4.7 µH,
CO = 10 µF
95
90
95
VO = 1.8 V,
L = 4.7 µH,
CO = 22 µF
85
IL = 1 mA
VI = 2.7 V
Efficiency − %
Efficency - %
80
75
VI = 5 V
70
65
60
VI = 3.7 V
90
IL = 150 mA
85
IL = 300 mA
80
55
50
75
45
40
0.01
0.1
1
10
IL - Load Current - mA
100
70
2.5
1000
Figure 4.
NO LOAD QUIESCENT CURRENT
vs
INPUT VOLTAGE
SWITCHING FREQUENCY
vs
TEMPERATURE
5.5
6
1190
1180
TA = 85°C
20
f − Switching Frequency − kHz
N0 Load Quiescent Current − µ A
3.5
4
4.5
5
VI − Input Voltage − V
Figure 3.
25
TA = 25°C
15
TA = −40°C
10
5
0
2.5
3
VI = 6 V
VI = 3.6 V
1170
1160
VI = 2.5 V
1150
1140
3
3.5
4
4.5
5
5.5
6
1130
−40 −30 −20 −10 0
10 20 30 40 50 60 70 80
VI − Input Voltage − V
TA − Temperature − °C
Figure 5.
Figure 6.
7
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
rds(on) P-CHANNEL SWITCH
vs
INPUT VOLTAGE
0.8
1.55
0.7
rds(on) - P-Channel Switch - Ω
VO − Outrput Voltage − V
1.53
PFM Mode
1.51
PWM Mode
1.49
1.47
TA = 85°C
0.6
TA = 25°C
0.5
TA = -40°C
0.4
0.3
1.45
0
50
0.2
2.5
IO − Output Current − mA
3.5
4
4.5
5
VI - Input Voltage - V
Figure 7.
Figure 8.
rds(on) N-CHANNEL SWITCH
vs
INPUT VOLTAGE
LOAD TRANSIENT RESPONSE
100
150
200
250
300
rDS(on) N-Channel Switch — Ω
0.8
5.5
VI = 3.6 V, VO = 1.5 V, L = 4.7 µH,
CO =10 µF, Load Step 50 mA to 390 mA
transient
0.7
VO
100 mV/div
0.6
TA = 85°C
0.5
TA = 25°C
0.4
TA = −40°C
IL
200 mA/div
0.3
0.2
2.5
3
3.5
4
4.5
5
VI − Input Voltage − V
Figure 9.
8
3
5.5
6
200 µs/div
Figure 10.
6
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
PWM MODE OPERATION
POWER-SAVE MODE OPERATION
VI = 3.6 V,
VO = 1.5 V
VSW
5 V/div
VSW,
5 V/div
VO
20 mV/div
VO,
20 mV/div
VI = 3.6 V,
VO = 1.5 V,
IO = 400 mA
IL
200 mA/div
IL,
200 mA/div
5 µs/div
250 ns/div
Figure 11.
Figure 12.
START-UP
Enable
2 V/div
VO
1 V/div
Ii
200 mA/div
VI = 3.6 V,
VO = 1.5 V,
IO = 380 mA
250 µs/div
Figure 13.
9
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
www.ti.com
DETAILED DESCRIPTION
OPERATION
The TPS6222x is a synchronous step-down converter operating with typically 1.25-MHz fixed frequency pulse
width modulation (PWM) at moderate to heavy load currents and in power-save mode operating with pulse
frequency modulation (PFM) at light load currents.
During PWM operation, the converter uses a unique fast response, voltage mode, controller scheme with input
voltage feed forward. This achieves good line and load regulation and allows the use of small ceramic input and
output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channel MOSFET
switch is turned on, and the inductor current ramps up until the comparator trips and the control logic turns off the
switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch is
exceeded. Then, the N-channel rectifier switch is turned on and the inductor current ramps down. The next cycle
is initiated by the clock signal, again turning off the N-channel rectifier and turning on the P-channel switch.
The GM amplifier and input voltage determines the rise time of the sawtooth generator; therefore, any change in
input voltage or output voltage directly controls the duty cycle of the converter. This gives a very good line and
load transient regulation.
POWER-SAVE MODE OPERATION
As the load current decreases, the converter enters the power-save mode operation. During power-save mode,
the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to
maintain high efficiency. Two conditions allow the converter to enter the power-save mode operation. One is
when the converter detects discontinuous conduction mode. The other is when the peak switch current in the
P-channel switch goes below the skip current limit. The typical skip current limit can be calculated as
I
66 mA Vin
skip
160 During the power-save mode, the output voltage is monitored with the comparator (comp) by the thresholds
comp low and comp high. As the output voltage falls below the comp low threshold set to 0.8% typical above
Vout, the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is reached.
The typical peak switch current can be calculated:
I
66 mA Vin
peak
80 The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches
zero, the N-channel rectifier is turned off and the P-channel switch is turned on again, starting the next pulse.
The converter continues these pulses until the comp high threshold (set to typically 1.6% above Vout) is reached.
The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter wakes up again
as the output voltage falls below the comp low threshold. This control method reduces the quiescent current
typically to 15 µA and reduces the switching frequency to a minimum, thereby achieving high converter efficiency
at light load. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal output voltage at
light load current results in a dynamic output voltage achieving lower absolute voltage drops during heavy load
transient changes. This allows the converter to operate with a small output capacitor of just 10 µF and still have a
low absolute voltage drop during heavy load transient changes. See Figure 14 for detailed operation of the
power-save mode.
10
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
DETAILED DESCRIPTION (continued)
PFM Mode at Light Load
1.6%
Comparator High
0.8%
Comparator Low
VO
Comparator Low 2
PWM Mode at Medium to Full Load
Figure 14. Power-Save Mode Thresholds and Dynamic Voltage Positioning
The converter enters the fixed frequency PWM mode again as soon as the output voltage falls below the comp
low 2 threshold.
DYNAMIC VOLTAGE POSITIONING
As described in the power-save mode operation sections and as detailed in Figure 14, the output voltage is
typically 0.8% above the nominal output voltage at light load currents, as the device is in power-save mode. This
gives additional headroom for the voltage drop during a load transient from light load to full load. During a load
transient from full load to light load, the voltage overshoot is also minimized due to active regulation by turning on
the N-channel rectifier switch.
DIGITAL SELF-CALIBRATION
In addition to the control circuit as shown in the block diagram, the TPS6222x series uses an internal digital
self-calibration of the output voltage to minimize DC load and line regulation. This method of self-calibration
allows simple internal loop compensation without the use of external components. The device monitors the
output voltage and as soon as the output voltage drops below typically 1.6% or exceeds typically 1.6% of Vout
the duty cycle will be adjusted in digital steps. As a result, the output voltage changes in digital steps either up or
down where one step is typically 1% of Vout. This results in virtually zero line and load regulation and keeps the
output voltage tolerance within ±3% overload and line variations.
SOFT START
The TPS6222x has an internal soft-start circuit that limits the inrush current during start-up. This prevents
possible voltage drops of the input voltage in case a battery or a high impedance power source is connected to
the input of the TPS6222x. The soft start is implemented as a digital circuit increasing the switch current in steps
of typically 83 mA,167 mA, 335 mA and then the typical switch current limit of 670 mA. Therefore, the start-up
time mainly depends on the output capacitor and load current.
LOW DROPOUT OPERATION 100% DUTY CYCLE
The TPS6222x offers a low input to output voltage difference, while still maintaining operation with the 100% duty
cycle mode. In this mode, the P-channel switch is constantly turned on. This is particularly useful in
battery-powered applications to achieve longest operation time by taking full advantage of the whole battery
voltage range. The minimum input voltage to maintain regulation, depending on the load current and output
voltage, can be calculated as
11
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
DETAILED DESCRIPTION (continued)
ds(on)
Vin min Vout max Iout max r
max RL
Ioutmax = maximum output current plus inductor ripple current
rds(on)max = maximum P-channel switch rds(on)
RL = DC resistance of the inductor
Voutmax = nominal output voltage plus maximum output voltage tolerance
ENABLE
Pulling the enable low forces the part into shutdown, with a shutdown quiescent current of typically 0.1 µA. In this
mode, the P-channel switch and N-channel rectifier are turned off, the internal resistor feedback divider is
disconnected, and the whole device is in shutdown mode. If an output voltage, which could be an external
voltage source or super capacitor, is present during shutdown, the reverse leakage current is specified under
electrical characteristics. For proper operation, the enable pin must be terminated and must not be left floating.
Pulling the enable high starts up the TPS6222x with the soft start as previously described.
UNDERVOLTAGE LOCKOUT
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions.
12
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
APPLICATION INFORMATION
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS6222x series of step-down converter has internal loop compensation. Therefore, the external L-C filter
has to be selected to work with the internal compensation. This is especially important for the fixed output
voltage version. The adjustable output voltage version allows external capacitors across the feedback divider
resistors. This allows higher flexibility of the output filter seletion when using the adjustable output voltage device
TPS62220.
Fixed Ouput Voltage Version
The internal compensation is optimized to operate with an output filter of L = 10 µH and CO = 10 µF. Such an
output filter has its corner frequency at:
1
1
ƒc 15.9 kHz
2 L C
2 10 H 10 F
O
with L = 10 µH, CO = 10 µF
As a general rule of thumb, the product L×C should not move over a wide range when selecting a different output
filter. This is because the internal compensation is designed to work with a certain output filter corner frequency
as calculated above. This is especially important when selecting smaller inductor or capacitor values that move
the corner frequency to higher frequencies. However, when selecting the output filter a low limit for the inductor
value exists due to other internal circuit limitations. For the TPS6222x series the minimum inductor value should
be kept at 4.7µH. Selecting a larger output capacitor value is less critical because the corner frequency moves to
lower frequencies causing fewer stability problems. The possible output filter combinations are listed in Table 1:
Table 1. Output Filter Combinations for Fixed Output Voltage Versions
VO
L
CO
≤2V
4.7 µH
≥ 22 µF (ceramic capacitor)
≤2V
6.8 µH
≥ 22 µF (ceramic capacitor)
≤2V
10 µH
≥ 10 µF (ceramic capacitor)
≥2V
10 µH
10 µF (ceramic capacitor)
Adjustable Output Voltage Version
When the adjustable output voltage version TPS62220 is used, the output voltage is set by the external resistor
divider. See Figure 15.
The output voltage is calculated as
V out 0.5 V 1 R1
R2
with R1 + R2 ≤ 1 MΩ and internal reference voltage V(ref)typ = 0.5 V
R1 + R2 should not be greater than 1 MΩ for reasons of stability. To keep the operating quiescent current to a
minimum, the feedback resistor divider should have high impedance with R1 + R2 ≤ 1 MΩ. In general, for the
adjustable output voltage version, the same stability considerations are valid as for the fixed output voltage
version. Because the adjustable output voltage version uses an external feedback divider, it is possible to adjust
the loop gain using external capacitors across the feedback resistors. This allows a wider selection of possible
output filter components. This is shown in Figure 16. R1 and C1 places a zero in the loop and R2 and C2 places
a pole in the loop. The zero is calculated as:
1
1
C1 2 ƒ R1
2 22 kHz R1
Z
with R1 = upper resistor of voltage divider, C1 = upper capacitor of voltage divider
13
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
The pole is calculated as:
1
1
C2 2 ƒ R2
2 8 kHz R2
P
with R2 = lower resistor of voltage divider and C2 = lower capacitor of voltage divider.
For an output filter combination of L = 4.7 µH and CO = 10 µF; C1 and C2 need to be selected to place a zero at
22 kHz and a pole at 8 kHz. Choose components close to the calculated values.
Table 2. Compensation Selection
L
CO
fZ
fP
4.7 µH
10 µF, 22 µF
22 kHz
8 kHz
TPS62220
VI
2.5 V − 6 V
C3
4.7 µF
VI
SW
R1
470k
GND
EN
L1
4.7 µH
C1
15 pF
C4
10 µF
VO
1.8 V / 400 mA
FB
R2
180k
C2
100 pF
Figure 15. Typical Application Circuit for the TPS62220 With Adjustable Output Voltage
INDUCTOR SELECTION
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high switching frequencies the core material has a higher impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the inductor should
be rated at least for the maximum output current of the converter plus the inductor ripple current that is
calculated as
1– Vout
I
Vin
I Vout I Lmax I outmax L
L
2
Lf
f = switching frequency (1.25 MHz typical, 800 kHz minimal)
L = inductor value
∆IL = peak-to-peak inductor ripple current
ILmax = maximum inductor current
The highest inductor current occurs at maximum Vin. A more conservative approach is to select the inductor
current rating just for the maximum switch current of 880 mA. SeeTable 3 for inductor selection.
14
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
Table 3. Inductor Selection
INDUCTOR VALUE
COMPONENT SUPPLIER
DIMENSIONS
4.7 µH
Sumida CDRH2D18/LD 4R7
3,2 mm × 3,2 mm × 2, 0 mm
4.7 µH
Murata LQH3C4R7M24
3,2 mm × 2,5 mm × 2, 0 mm
4.7 µH
Taiyo Yuden LBC2518 4R7
2,5 mm × 1,8 mm × 1,8 mm
4.7 µH
Sumida CMD4D11 4R7
4,4 mm × 5,8 mm × 1,2 mm
4.7 µH
Sumida CMD4D08 4R7
6,3 mm × 5,8 mm × 1, 0 mm
4.7 µH
Sumida CLSD09 4R7
4,9 mm × 4,9 mm × 1, 0 mm
4.7 µH
TDK VLF3010AT 4R7
2,8 mm × 2,6 mm × 1, 0 mm
6.8 µH
Sumida CDRH3D16 6R8
4,0 mm × 4,0 mm × 1,8 mm
6.8 µH
Sumida CMD4D11 4R7
4,0 mm × 5,8 mm × 1,2 mm
10 µH
Murata LQH4C100K04
4,5 mm × 3,2 mm × 2, 6 mm
10 µH
Sumida CDRH3D16 100
4,0 mm × 4,0 mm × 1,8 mm
10 µH
Sumida CLS4D14 100
4,9 mm × 4,9 mm × 1,5 mm
INPUT CAPACITOR SELECTION
Because buck converters have a pulsating input current, a low ESR input capacitor is required. This results in the
best input voltage filtering, minimizing the interference with other circuits caused by high input voltage spikes.
Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For
good input voltage filtering, usually a 4.7-µF input capacitor is sufficient. It can be increased without any limit for
better input-voltage filtering. Ceramic capacitors show better performance because of the low ESR value, and
they are less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input
capacitor as close as possible to the input and GND pin of the device for best performance (see Table 4 for
capacitor selection).
OUTPUT CAPACITOR SELECTION
The advanced fast response voltage mode control scheme of the TPS6222x allows the use of tiny ceramic
capacitors with a minimum value of 10 µF without having large output voltage under and overshoots during
heavy load transients. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. If required, tantalum capacitors may be used as well (see Table 4 for capacitor selection). At
nominal load current, the device operates in power-save mode, and the output voltage ripple is independent of
the output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typical
output voltage ripple is 1% of the output voltage VO.
Table 4. Capacitor selection
CAPACITOR VALUE
CASE SIZE
4.7 µF
0603
COMPONENT SUPPLIER
Contact TDK
4.7 µF
0805
Taiyo Yuden JMK212BY475MG
10 µF
0805
Taiyo Yuden JMK212BJ106MG
TDK C12012X5ROJ106K
22 µF
0805
1206
Contact TDK
Taiyo Yuden JMK316BJ226
15
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
Layout Considerations
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and switching frequencies. If the layout is not carefully done, the regulator shows stability problems as well as
EMI problems. Therefore, use wide and short traces for the main current paths, as indicated in bold in Figure 16.
The input capacitor, as well as the inductor and output capacitor, should be placed as close as possible to the IC
pins. In particular, the input capacitor needs to be placed as close as possible to the IC pins, directly across the
Vin and GND pin. The feedback resistor network must be routed away from the inductor and switch node to
minimize noise and magnetic interference. To further minimize noise from coupling into the feedback network
and feedback pin, the ground plane or ground traces must be used for shielding. This becomes important
especially at high switching frequencies of 1.25 MHz.
L1
4.7 µH
TPS62220
VI
2.5 V − 6 V
VI
C1
4.7 µF
VO
1.8 V / 400 mA
SW
GND
EN
R1
C1
R2
C2
FB
C2
10 µF
Figure 16. Layout Diagram
Typical Applications
TPS62220
VI
3.6 V to 6 V
1
C3
10 µF
2
3
VI
SW
5
GND
EN
FB
L1
10 µH
R1
680 kΩ
C1
10 pF
R2
120 kΩ
C2
150 pF
C4
10 µF
VO
3.3 V/400 mA
4
Figure 17. LI-Ion to 3.3 V Conversion
TPS62220
VI
2.7 V to 6 V
C3
4.7 µF
1
2
3
VI
SW
5
GND
EN
FB
L1
10 µH
R1
510 kΩ
C1
15 pF
R2
130 kΩ
C2
150 pF
4
Figure 18. LI-Ion to 2.5 V Conversion
16
C4
10 µF
VO
2.5 V/400 mA
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
TPS62220
VI
2.5 V to 6 V
1
C3
4.7 µF
2
3
VI
SW
5
GND
EN
FB
L1
4.7 µH
R1
470 kΩ
C1
15 pF
R2
180 kΩ
C2
100 pF
C4
10 µF
VO
1.8 V/400 mA
4
Figure 19. LI-Ion to 1.8 V Conversion
TPS62220
VI
2.5 V to 6 V
1
C3
4.7 µF
2
3
VI
SW
5
GND
EN
FB
L1
4.7 µH
R1
360 kΩ
C1
22 pF
R2
180 kΩ
C2
100 pF
C4
10 µF
VO
1.5 V/400 mA
4
Figure 20. LI-Ion to 1.5 V Conversion
TPS62220
VI
2.5 V to 6 V
1
C3
4.7 µF
2
3
VI
SW
5
GND
EN
FB
L1
4.7 µH
R1
330 kΩ
C1
22 pF
R2
240 kΩ
C2
100 pF
C4
10 µF
VO
1.2 V/400 mA
4
Figure 21. LI-Ion to 1.2 V Conversion
TPS62221
VI
2.5 V to 6 V
C1
4.7 µF
1
2
3
VI
SW
5
VO
1.5 V/400 mA
C2
22 µF
GND
EN
L1
4.7 µH
FB
4
Figure 22. Li-Ion to 1.5 V Conversion, Fixed Output Voltage Version
17
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224
TPS62228, TPS62229
www.ti.com
SLVS491C – SEPTEMBER 2003 – REVISED SEPTEMBER 2004
TPS62223
VI
2.5 V to 6 V
C1
4.7 µF
1
2
3
VI
SW
5
VO
2.3 V/400 mA
C2
10 µF
GND
EN
L1
10 µH
FB
4
Figure 23. Li-Ion to 2.3 V Conversion, Fixed Output Voltage Version
18
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