TI TPS60501

TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
HIGH EFFICIENCY, 250-mA
STEP-DOWN CHARGE PUMP
FEATURES
D Regulated 3.3-V, 1.8-V, 1.5-V, or Adjustable
D
D
D
D
D
D
D
D
D
D
D
Output Voltage
Up to 250-mA Output Current
1.8-V to 6.5-V Input Voltage
Up to 90% Efficiency
Output Voltage Tolerance 3% Over Line, Load,
and Temperature Variation
Device Quiescent Current Less Than 40 µA
Output Voltage Supervisor Included
(Power Good)
Internal Soft Start
Load Isolated From Battery During Shutdown
Overtemperature and Overcurrent Protected
Micro-Small 10-Pin MSOP Package
EVM Available, TPS60500EVM-193
APPLICATIONS
D Personal Digital Assistants
D
D
D
D
D
D
DSP Core Supply
Cellular Phones
Portable Instruments
Internet Audio Player
PC Peripherals
USB Powered Applications
DESCRIPTION
The TPS6050x devices are a family of step-down
charge pumps that generate a regulated, fixed 3.3-V,
1.8-V, 1.5-V, or adjustable output voltage. Only four
small ceramic capacitors are required to build a
complete high efficiency dc/dc charge pump converter.
To achieve the high efficiency over a wide input voltage
range, the charge pump automatically selects between
three different conversion modes. The output can
deliver a maximum of 250-mA output current. The
power good function supervises the output voltage and
goes high when the output voltage rises to 97% of its
nominal value.
Typical Application Circuit
TPS60503
C1F
1 µF
C2F
1 µF
EFFICIENCY
vs
INPUT VOLTAGE
100
6
3
4
C1F– C1F+ C2F– C2F+
INPUT
Li-ion cell
OUT
5
7
+ C
o
10 µF
TPS60502
FB
1
1.8 V
150 mA
VIN
Ci
2.2 µF
10
80
70
60
150 mA
50
LDO
40
20
R
PG
50 mA
30
EN
OFF/ON
100 mA
90
Efficiency – %
8
10
0
2
2
GND
2.5
3
3.5
4
4.5
5
5.5
6
6.5
VI – Input Voltage – V
9
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
pin assignments
DGS PACKAGES
(TOP VIEW)
EN
PG
C2F–
C2F+
VIN
1
10
2
9
3
8
4
7
5
6
FB
GND
C1F–
OUT
C1F+
ACTUAL SIZE
3,05 mm x 4,98 mm
AVAILABLE OPTIONS
PART NUMBER†
MARKING DGS
PACKAGE
OUTPUT VOLTAGE
[V]
MINIMUM INPUT VOLTAGE
FOR IO = 150 mA
TPS60500DGS
AVB
Adjustable
(0.8 V to 3.3 V)
VI > VO + 1
TPS60501DGS
AVC
3.3
TPS60502DGS
AVD
1.8
TPS60503DGS
AVE
VI > 4.3 V
VI > 2.8 V
1.5
VI > 2.5 V
† The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS60500DGSR) to order
quantities of 2500 devices per reel.
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
C1F+
6
Positive terminal of the flying capacitor C1F
C1F–
8
Negative terminal of the flying capacitor C1F
C2F+
4
Positive terminal of the flying capacitor C2F
C2F–
3
Negative terminal of the flying capacitor C2F
EN
1
GND
9
FB
10
O
TPS60500: connect via voltage divider to VO
TPS60501 to TPS60503: connect directly to VO
OUT
7
O
Regulated 3.3 V, 1.8 V, 1.5 V, or adjustable power output
Bypass OUT to GND with the output filter capacitor Co.
PG
2
O
Open drain power good detector output. As soon as the voltage on OUT reaches about 97% of its nominal value this
pin goes high.
VIN
5
I
Supply Input. Connect to an input supply in the 1.8-V to 6.5-V range.
2
I
Device-enable Input.
– EN = High disables the device. Output and input are isolated in shutdown mode.
– EN = Low enables the device.
Ground
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TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Voltage range at VIN, EN, PG to GND (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Voltage range at OUT, FB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 3.6 V
Voltage range at C1F+, C1F–, C2F+, C2F– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Output current at OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The voltage at EN, and PG can exceed VIN up to the maximum rated voltage without increasing the leakage current drawn by these
mode select inputs.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DGS
555 mW
5.56 mW/°C
305 mW
221 mW
NOTE: The thermal resistance junction to ambient of the DGS package when soldered on a PCB is RθJA ≈ 180°C/W.
recommended operating conditions
MIN
Input voltage range at VIN, VI
NOM
1.8
Output current range at OUT, IO
Input capacitor, Ci
MAX
V
250
mA
µF
2.2
Flying capacitors, C1F, C2F
µF
1
Output capacitor, Co for IO ≤ 150 mA
µF
4.7
Output capacitor, Co for 150 mA < IO < 250 mA
µF
22
Operating junction temperature, TJ
–40
UNIT
6.5
125
°C
RECOMMENDED CAPACITOR VALUES
IO, max
[mA]
Ci
[µF]
C(xF)
[µF]
Co
[µF]
50
2.2
0.22
4.7
150
4.7
1
10
250
4.7
1
22
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3
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
electrical characteristics at Ci = 4.7 µF, C1F = C2F = 1 µF, Co = 10 µF, TA = –40°C to 85°C,
VI = 5 V, V(EN) = GND (unless otherwise noted)
PARAMETER
VI
TEST CONDITIONS
Supply voltage range
output
Maximum out
ut current
TPS60501
Output voltage
V(FB)
Feedback voltage
TPS60502
Tolerance of output voltage
250
VO > 2.5 V, VI > VO + 1.2 V
250
mA
250
0.8
3.3
3.30
VI > 2.7V;
2.7V VI–VO > 1 V at IOUT ≤ 150 mA
VI > 1.8 V; VI–VO > 1 V at IOUT ≤ 50mA
1.50
0.8
Vpp
IQ
Output voltage ripple at OUT
IO = 0 mA to 250 mA, Co = 47 µF
IO = 150 mA, VO = 1.5 V
Quiescent current (no-load input current)
IO = 0 mA
T(SD)
IO(SD)
Thermal shutdown temperature
f(OSC)
VIL
Internal switching frequency
VIH
Ilkg(SD)
EN input high voltage
Ilkg(FB)
FB input leakage current
TPS60500
R(max)
Maximum resistance of the
external voltage divider
TPS60500
Shutdown supply current
–4%
V
3%
3%
4%
4%
30
40
75
mVPP
µA
0.5
µA
1200
kHz
0.3 x VI
V
°C
150
V(EN) = VI
0.05
600
800
EN input low voltage
0.7 x VI
EN input leakage current
V(EN) = 0 V or VI
Short circuit current (start-up current)
Output current limit
V
1.80
TPS60500
TPS60500
TPS60502
TPS60 03
TPS60503
V
0.01
R1 + R2 at FB pin
VI = 6.5V, VO = 0 V
VO > 0.6 V
V
150
VO = 1.5 V, VI ≥ 3.1 V
VI ≥ 3.7 V, 1.8 V ≤ VO ≤ 2.5 V
IO = 0 mA to 150 mA, Co = 47 µF
IO = 0 mA to 150 mA, Co = 47 µF
IO = 0 mA to 150 mA, Co = 10 µF
UNIT
6.5
TPS60503
TPS60501
MAX
50
TPS60500
VO
TYP
1.8
VI = 1.8 V to 2.7 V, VI–VO > 1 V
VI ≥ 2.7 V, VI–VO > 1 V
IO
MIN
100
No load start-up time
0.1
µA
0.1
µA
1
MΩ
300
mA
500
mA
80
µs
electrical characteristics for power good comparator of devices TPS6050x at TA = –40°C to 85°C,
VI = 5 V and V(EN) = GND (unless otherwise noted)
PARAMETER
V(PG)
td,r
td,f
VOL
TEST CONDITIONS
Power good trip voltage
See Note 2
Power good delay time
VO ramping positive
VO ramping negative
Power good output voltage low
VO = 0 V, I(PG) = 1 mA
VO = 3.3 V, V(PG) = 3.3 V
Ilkg
Power good leakage current
NOTE 2: Vml is the output voltage at the maximum load current. Vml is not a JEDEC symbol.
4
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MIN
TYP
MAX
UNIT
Vml – 2%
100
200
µs
50
100
µs
0.3
V
0.1
µA
0.01
V
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
functional block diagram TPS6050x
VIN
VIN
2/3
1/2
Skip
Gear
Logic
800 KHz
CLK
EN
Driver
1/3
C1F
C2F
EN
=
ON/OFF
OUT
EN
Start–up
Thermal and
Short-Circuit
Current Limit
OUT
FB
Skip
V_REG
Regulator
Amplifier
PG
PG
Bandgap
0.8 V
EN
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VI
VO
VO
Minimum input voltage
vs Output current
1–4
Efficiency
vs Input voltage
5–8
Output voltage
vs Output current
9–12
Quiescent current
vs Input voltage
Efficiency
vs Output current
Output voltage (ripple)
vs Time
13
14–17
18
Line transient response
19
Load transient response
20
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5
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
TYPICAL CHARACTERISTICS
TPS60501
MINIMUM INPUT VOLTAGE
vs
OUTPUT CURRENT
3.6
VO Threshold:
VO nom –3% = 1.455 V
3.20
3
TA = 85°C
2.80
TA = 25°C
2.60
4.3
VO Threshold:
VO nom –3% = 1.746 V
3.4
V I(min) – Input Voltage – V
2.40
2.20
TA = –40°C
2
1.80
3.2
3
2.8
–40°C
25°C
2.6
2.4
2.2
85°C
2
1.60
0
50
100
150
200
IO – Output Current – mA
50
3.6
3.5
100
150
200
0
250
50
100
150
200
Figure 3
TPS60503
TPS60502
EFFICIENCY
vs
INPUT VOLTAGE
100
100
90
150 mA
80
80
70
70
85°C
2.1
25°C
2
1.9
1.8
60
Efficiency – %
2.3
2.2
200 mA
10 mA
50
250 mA
40
60
30
20
1.5
10
10
1.4
0
0
50
100
150
200
250
2
2.5
3
4
4.5
5
5.5
6
2
2.5
3
250 mA
3.5
4
4.5
5
5.5
TPS60501
TPS60500
TPS60503
EFFICIENCY
vs
INPUT VOLTAGE
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
10 mA
60
200 mA
100 mA
50
250 mA
40
1.53
250 mA
70
Efficiency – %
70
150 mA
60
50
150 mA
40
100 mA
30
30
20
50 mA
VO Adjusted to 0.8 V,
Co = 47 µF,
20
10
10
4.5
5
5.5
VI – Input Voltage – V
Figure 7
6
6.5
0
1.5
2
2.5 3
Co = 10 µF,
1.54
200 mA
80
80
1.55
10 mA
90
3.5 4
6.5
Figure 6
EFFICIENCY
vs
INPUT VOLTAGE
100
6
VI – Input Voltage – V
Figure 5
100
4
0
6.5
VI – Input Voltage – V
Figure 4
90
3.5
100 mA
40
20
1.7
200 mA
150 mA
50
30
–40°C
10 mA
100 mA
90
250
IO – Output Current – mA
EFFICIENCY
vs
INPUT VOLTAGE
Efficiency – %
VI(min) – Input Voltage – V
85°C
3.7
TPS60500
IO – Output Current – mA
Efficiency – %
3.8
MINIMUM INPUT VOLTAGE
vs
OUTPUT CURRENT
1.6
6
3.9
Figure 2
VO Threshold:
VO nom –3% = 0.776 V
0
3.5
25°C
IO – Output Current – mA
2.6
2.4
–40°C
4
3.3
0
Figure 1
2.5
4.1
3.4
1.8
250
VO Threshold:
VO nom –3% = 3.201 V
4.2
VO – Output Voltage – V
V I(min) – Input Voltage – V
TPS60502
MINIMUM INPUT VOLTAGE
vs
OUTPUT CURRENT
VI(min) – Input Voltage – V
3.40
TPS60503
MINIMUM INPUT VOLTAGE
vs
OUTPUT CURRENT
4.5 5
VI – Input Voltage – V
Figure 8
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5.5 6 6.5
1.52
VI = 3.6 V
1.51
VI = 5 V
1.5
1.49
1.48
VI = 3.3 V
1.47
1.46
1.45
0.1
1
10
100
IO – Output Current – mA
Figure 9
1000
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
TYPICAL CHARACTERISTICS
TPS60500
TPS60501
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VO– Output Voltage – V
VO – Output Voltage – V
VI = 3.6 V
1.81
1.80
1.79
VI = 3.3 V
1.78
VO Adjusted to 0.8 V
0.85
VI = 5 V
1.82
3.36
0.86
Co = 10 µF,
1.83
1.77
1.76
Co = 10 µF
0.84
VI = 3.6 V
0.83
VI = 5 V
0.82
0.81
0.80
VI = 2.4 V
0.79
VI = 3.3 V
3.32
3.30
3.28
3.26
3.24
0.78
3.22
1.75
0.77
1.74
0.1
1
10
100
3.20
0.76
0.1
1000
1
IO – Output Current – mA
10
100
0.1
1000
Figure 11
QUIESCENT CURRENT
vs
INPUT VOLTAGE
45
90
100
TPS60503
TPS60502
EFFICIENCY
vs
OUTPUT CURRENT
EFFICIENCY
vs
OUTPUT CURRENT
90
VI = 3.6 V
80
1000
VI = 3.3 V
80
40
VI = 5 V
TA = 85°C
70
TA = –40°C
VI = 3.6 V
60
70
Efficiency – %
Efficiency – %
TA = 25°C
30
10
Figure 12
VI = 3.3 V
35
1
IO – Output Current – mA
IO – Output Current – mA
Figure 10
50
VI = 5 V
60
50
40
25
40
30
20
1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 5.8 6.3
20
0.1
1
VI – Input Voltage – V
10
100
30
0.1
1000
1
Figure 14
100
90
10
100
1000
IO – Output Current – mA
IO – Output Current – mA
Figure 13
Figure 15
TPS60501
TPS60500
EFFICIENCY
vs
OUTPUT CURRENT
EFFICIENCY
vs
OUTPUT CURRENT
80
VI = 5 V
VI = 3.3 V
VI = 2.4 V
70
Efficiency – %
80
Efficiency – %
Quiescent Current – µ A
VI = 5 V
3.34
VO – Output Voltage – V
1.84
TPS60502
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
70
60
50
60
VI = 3.6 V
50
VI = 5 V
40
40
30
30
20
0.1
VO Adjusted to 0.8 V
1
10
100
1000
20
IO – Output Current – mA
0.1
1
10
100
1000
IO – Output Current – mA
Figure 16
Figure 17
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7
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
TYPICAL CHARACTERISTICS
VO – OUTPUT VOLTAGE (RIPPLE) – V
OUTPUT VOLTAGE (RIPPLE)
vs
TIME
VI = 3.3 V
VO = 1.5 V
IO = 100 mA
TA = 25°C
Co = 10 µF,
Co = 10 µF,
IO = 50 mA
VO = 1.5 V
TA = 25°C
VO
LOAD TRANSIENT RESPONSE
Co = 10 µF,
VI = 3.3 V
VO = 1.5 V
TA = 25°C
50 mV/division
50 mV/division
VO
10 mV/division
VI = 2.5 V to 3.5 V to 2.5 V
1 V/division
1 µs / division
Figure 18
8
LINE TRANSIENT RESPONSE
10 µs / division
Figure 19
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IO = 15 mA to 135 mA to 15 mA
100 mA/division
10 µs / division
Figure 20
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
PRINCIPLES OF OPERATION
The TPS6050x charge pumps provide a regulated output voltage in the range of 0.8 V to 3.3 V from an input
voltage of 1.8 V to 6.5 V. The devices use switched capacitor fractional conversion to achieve high efficiency
over the entire input and output voltage range. Regulation is achieved by sensing the output voltage and
enabling the internal switches as needed to maintain the selected output voltage. This skip-mode regulation is
used over a load range from 0 mA to 150 mA. At a higher output current, the device works in a linear regulation
mode.
The TPS6050x circuits consist of an oscillator, a voltage reference, an internal resistive feedback circuit (fixed
voltage version only), an error amplifier, two charge pump stages with MOSFET switches, a shutdown/start-up
circuit, and a control circuit.
short-circuit current limit and thermal protection
When the output voltage is lower than 0.6 V, the output current is limited to 300 mA typically. The device also
has a thermal protection which reduces the output current when the temperature of the chip exceeds 150°C.
The output current declines to 0 mA when the chip temperature rises to 160°C.
enable
Driving EN high disables the converter. This disables all internal circuits, reducing input current to only 0.05µA.
Leakage current drawn from the output pin OUT is a maximum of 1 µA. The device exits shutdown once EN
is set low (see start up procedure described below). The typical no-load start-up time is 80 µs. When the device
is disabled, the load is isolated from the input, an important feature in battery-operated products because it
extends the battery shelf life.
start-up procedure
The device is enabled when EN is set from logic high to logic low. The charge pump stages immediately start
switching to transfer energy to the output. In start-up until the output voltage has reached 0.6 V, the input current
is limited to 300 mA typically.
power good detector
The power good (PG) output is an open-drain output on all TPS6050x devices. The PG output pulls low when
the output is out of regulation. When the output rises to within 97% of regulation, the power good output goes
high. In shutdown, power good is pulled low. In normal operation, an external pullup resistor is typically used
to connect the PG pin to VO or VI. If the PG output is not used, it should remain unconnected.
VO
V(NOM)
VIT
td,r
PG
1
td,r
t
td,f
0
t
EN
1
0
t
Figure 21. Power Good Timing Diagram
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9
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
PRINCIPLES OF OPERATION
The TPS6050x devices use fractional conversion to achieve high efficiency over a wide input and output voltage
range. Depending on the input to output voltage ratio and output current, internal circuitry switches between an
LDO mode, a 2/3x mode, a 0.5x mode, and a 1/3x mode.
LDO conversion mode
In the LDO mode, the flying capacitors are no longer used for transferring energy. The switches 1, 2, 5, and 6
are closed and connect the input directly with the output. This mode is automatically selected if the input to output
voltage ratio does not allow the use of another conversion mode with higher efficiency. In LDO mode, the
regulation is done by switching off MOSFET 2 and 6 until the output current reaches the linear-skip current (150
mA typ). At a higher output current, the output voltage is regulated by controlling the resistance of the switch.
The minimum input to output voltage difference required for regulation is 1 V.
VIN
SW1
SW3
C1F
+
SW2
SW5
SW7
C2F
+
SW9
SW4
SW6
SW8
OUT
+
Co
Figure 22. LDO Conversion Mode
2/3x conversion mode
In the first cycle, the two flying capacitors are connected in parallel and are charged up in series with the output
capacitor. In the second cycle, the flying capacitors are connected in series. This mode provides higher
efficiency than the LDO mode because the current into VIN is only 2/3 of the output current. The mode is
automatically selected if the input voltage is higher than 3/2 of the selected output voltage.
VIN
SW1
SW2
VIN
SW3
C1F
+
SW4
SW5
SW9
SW6
SW1
SW7
C2F
+
SW2
SW8
SW3
C1F
+
SW4
SW5
SW9
SW6
SW7
C2F
+
SW8
OUT
+
Phase 1: Charging of Flying Caps
OUT
+
Co
Phase 2: Discharging of Flying Caps
Figure 23. 2/3x Conversion Mode
10
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Co
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
PRINCIPLES OF OPERATION
0.5x conversion mode
This conversion mode is internally selected if the input to output voltage ratio is greater than two (e.g. 3.6 V to
1.5 V conversion). In the 0.5x mode, the flying capacitors and the switches always work in parallel, which
reduces the resistance of the circuit compared to the other modes. In the first cycle, the flying capacitors are
charged in series with the output capacitors. In the second cycle, the flying capacitors are connected in parallel
with the output capacitor, which discharges the flying capacitors.
VIN
SW1
SW2
SW3
C1F
+
SW4
SW5
SW9
SW6
VIN
SW1
SW7
C2F
+
SW2
SW8
SW3
C1F
+
SW4
SW5
SW9
SW6
SW7
C2F
+
SW8
OUT
+
OUT
+
Co
Phase 1: Charging of Flying Caps
Co
Phase 2: Discharging of Flying Caps
Figure 24. 0.5x Conversion Mode
1/3x conversion mode
This mode was implemented to provide high efficiency even with an input to output voltage ratio greater than
three (e.g. 5 V to 1.5 V conversion). In the first cycle, the two flying capacitors are charged in series with the
output capacitor. In the next step, the flying capacitors which are charged to VIN/3, are connected in parallel
to the output capacitor.
VIN
SW1
SW2
SW3
C1F
+
SW4
SW5
SW9
SW6
VIN
SW1
SW7
C2F
+
SW2
SW8
SW3
C1F
+
SW4
SW5
SW9
SW6
SW7
C2F
+
SW8
OUT
+
Phase 1: Charging of Flying Caps
OUT
+
Co
Co
Phase 2: Discharging of Flying Caps
Figure 25. 1/3x Conversion Mode
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11
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
DESIGN PROCEDURE
capacitor selection
Designed specifically for space-critical battery-powered applications, the complete converter requires only four
external capacitors. The capacitor values are closely linked to the required output current, output noise, and
ripple requirements. The input capacitor improves system efficiency by reducing the input impedance, and it
also stabilizes the input current. The value of the output capacitor, Co, influences the stability of the voltage
regulator. The minimum required capacitance for Co is 4.7 µF. Depending on the maximum allowed output ripple
voltage and load current, larger values can be chosen. For an output current greater than 150 mA, a minimum
output capacitor of 22 µF is required. Table 1 shows ceramic capacitor values recommended for low output
voltage ripple.
Table 1. Recommended Capacitors
MANUFACTURER
PART NUMBER
SIZE
CAPACITANCE
TYPE
Taiyo Yuden
LMK212BJ105KG
LMK212BJ225MG
EMK316BJ225KL
LMK316BJ475KL
JMK316BJ106KL
0805
0805
1206
1206
1206
1 µF
2.2 µF
2.2 µF
4.7 µF
10 µF
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
TDK
C2012X5R1C105M
C2012X5R1A225M
C2012X5R0J106M
0805
0805
0805
1 µF
2.2 µF
10 µF/6.3 V
Ceramic
Ceramic
Ceramic
Table 2 contains a list of manufacturers of ceramic capacitors. Ceramic capacitors provide the lowest output
voltage ripple because they typically have the lowest ESR-rating.
Table 2. Recommended Capacitor Manufacturers
MANUFACTURER
CAPACITOR TYPE
INTERNET
Taiyo Yuden
X7R/X5R ceramic
www.t–yuden.com
TDK
X7R/X5R ceramic
www.component.tdk.com
Vishay
X7R/X5R ceramic
www.vishay.com
Kemet
X7R/X5R ceramic
www.kemet.com
APPLICATION INFORMATION
typical application circuit for fixed voltage and adjustable voltage versions
Figure 26 shows the typical operation circuit. The TPS60501 to TPS60503 devices use an internal resistor
divider for sensing the output voltage. The FB pin must be connected externally with the output. For maximum
output current and best performance, 4 ceramic capacitors are recommended. For lower currents or higher
allowed output voltage ripple, other capacitors can also be used. It is recommended that the output capacitor
has a minimum value of 4.7 µF. This value is necessary to maintain a stable operation of the system. Flying
capacitors lower than 1 µF can be used, but this decreases the maximum output power. This means that the
device works in linear mode with lower output currents. The device works in the linear mode for an output current
of greater than 150 mA. With an output current greater than 150 mA, an output capacitor of ≥22 µF must be used.
Figure 26 shows that two 10-µF capacitors can also be used in parallel.
12
www.ti.com
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
APPLICATION INFORMATION
C1F
1 µF
8
C1F
1 µF
C2F
1 µF
6
3
8
4
OUT
5
1
+ Co
10 µF
Cc
10 pF
R
GND
9
PG
O
+
(R1 ) R2)
R2
5
FB
VFB
VFB = 0.8 V
V
V
O
1.5 V
10
R
EN
GND
9
ǒ Ǔ
+C
o
10 µF
VIN
OFF/ON
2
max 150 mA
7
TPS60503
1
R2
R1 + R2
V
OUT
Ci
2.2 µF
R1
10
EN
OFF/ON
INPUT
2.5 V to 6.5 V
VO
TPS60500
FB
4
max 150 mA
7
VIN
Ci
2.2 µF
3
C1F– C1F+ C2F–C2F+
C1F– C1F+ C2F– C2F+
INPUT
1.8 V to 6.5 V
6
C2F
1 µF
PG
2
–R2
FB
Nominal Output Voltage Equation
Possible E24 Resistor Combination
1.2 V
R1 = 0.5R2
R1 = 100 kΩ, R2 = 200 kΩ (1.20 V)
1.5 V
R1 = 0.875R2
R1 = 160 kΩ, R2 = 180 kΩ (1.51 V)
1.6 V
R1 = R2
Any
1.8 V
R1 = 1.25R2
R1 = 150 kΩ, R2 = 120 kΩ (1.80 V)
2.5 V
R1 = 2.125R2
R1 = 510 kΩ, R2 = 240 kΩ (2.50 V)
R1 = 470 kΩ, R2 = 220 kΩ (2.51 V)
C1F
1 µF
8
6
C2F
1 µF
3
4
C1F– C1F+ C2F– C2F+
INPUT
3.15 V to 6.5 V
OUT
5
max 250 mA
7
+ C
out1
10 µF
VIN
TPS60503
Ci
4.7 µF
FB
1
+ C
out2
10 µF
1.5 V
10
R
EN
OFF/ON
GND
9
PG
2
Power supply with 1,4 mm maximum height for 250-mA output current
Figure 26. Typical Operating Circuit
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13
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
APPLICATION INFORMATION
DSP supply with sequencing
This application shows a power supply for a typical DSP. DSPs usually have core voltages in the 1-V to 2.5-V
range, whereas the voltage at the I/O-pins (I/O voltage) is typically 3.3 V to interface with external logic and
converters. Therefore, a power supply with two output voltages is required. The application works with an input
voltage in the range of 3.5 V to 6.5 V. The maximum output current is 150 mA on each output.
The supply is enabled by pulling the enable pin (EN of the TPS60503) to GND. The step-down charge pump
starts and its power good (PG) output goes high. This enables the LDO which powers the I/O lines and generates
a reset signal for the DSP. Figure 27 shows the timing diagram of the start-up/shutdown procedure.
VI/O
V(NOM)
VIT
TPS77133
VIN
VIN
VI
10 MΩ
1 MΩ
OUT
OUT
FB
EN RESET
GND
3.3 V
10 µF†
TPS60503
VIN
47 µF
1 MΩ
ENABLE
GND
EN
C1F–
VI/O
RESET
PG
FB
OUT
C1F+
1.5 V
t
RS‡
1
0
PG
1
td
td
t
td
V(CORE)
10 µF†
0
1 µF
t
EN
1
C2F+
C2F–
GND
t
V(CORE)
V(NOM)
VIT
47 kΩ
1 µF
0
t
† Recommended value for stability, DSP may require higher capacitance.
‡ RS is the RESET output of the TPS77133.
Figure 27. DSP Supply With Sequencing
14
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TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
APPLICATION INFORMATION
LC-post filter
If the output voltage ripple of the stepdown charge pump is to high, an LC post filter can be used.
C1F
1 µF
8
C2F
1 µF
6
3
4
C1F– C1F+ C2F– C2F+
INPUT
2.5 V to 6.5 V
OUT
5
+ C
o
10 µF
VIN
Ci
2.2 µF
TPS60503
FB
1
L(P) max 150 mA
7
VP(out)
C(P)
10
R
EN
OFF/ON
PG
2
GND
9
Figure 28. LC-Post Filter
Table 3. Measurement Results on Different C(fly), C(P), L(P) Combinations; BW = 500 MHz
CI
[µF]
C(XF)
[µF]
CO
[µF]
CERAMIC
CERAMIC
CERAMIC
50
2.2
0.22
4.7
—
50
2.2
0.22
4.7
—
5
150
4.7
1
10
5
250
4.7
1
2 x 10
5
100
4.7
1
10
VI
[V]
IO
[mA]
5
5
C(P)
[µF]
VO
[V]
TYPICAL
VP(Out)
VPP[mV]
TYPICAL
VO(RMS)
[mV]
0.1 (X7R)
3.3
50
8
0.1 (X7R)
1.5
30
9
—
0.1 (X7R)
1.5
50
6
—
0.1 (X7R)
1.5
45
8
0.1
0.1 (X7R)
1.5
20
4
L(P)
( )
[µH]
CERAMIC
power supply with dynamic voltage scaling
Dynamic voltage scaling of the core can be used to reduce power consumption of a digital signal processor
(DSP). During the periods, in which the maximum DSP performance is not required, the core voltage can be
reduced when the DSP operates at a lower clock-rate. This idea is called runtime power control (RPC) and is
supported by modern DSPs. RPC extends battery-life time in handheld applications, like MP3 players, digital
cameras, PDA.
The supply of DSPs is separated into I/O interface and core supply. Interface is mostly powered by a 3.3-V
system supply, whereas core supply achieves voltages far below 1.5 V. The TPS60500 is powered by the 3.3-V
system supply. The DSP itself selects the applied core voltage.
The core voltage is switched between 1.5 V and 1.1 V by changing the feedback resistor network. A MOSFET
modifies the voltage divider at the feedback (FB) pin by switching a resistor. In this application, a general
purpose MOSFET BSS138 is used with a VGS(th) of 1.6 V. A DSP 3.3-V I/O port drives the gate. The feedback
resistor network consists of R2, R3 and R4. C(ff) is the fast forward capacitor for improved line regulation.
www.ti.com
15
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
APPLICATION INFORMATION
power supply with dynamic voltage scaling (continued)
General requirements for the application:
D
D
D
D
1.5 V ±0.08 V
1.1 V +0.1 V –0.05 V
3 V to 3.3 V
150 mA (10R load)
Output voltage1 (DSP core):
Output voltage 2 (DSP core):
Input voltage:
Output current:
C1F
1 µF
C2F
1 µF
8
6
3
4
C1F– C1F+ C2F– C2F+
Input
3.3 V
OUT
5
Co
10 µF
VIN
Ci
2.2 µF
TPS60500
FB
1
7
10
C(ff)
150 pF
R2
R3
R4
T1
R1
EN
1.5 V / 1.1 V
150 mA
DVS in
OFF/ON
PG
GND
2
R5
330 kΩ
9
BSS138
C6
470 pF
Figure 29. Dynamic Voltage Scaling Application
To keep current through the adjustment resistor network as low as possible, the resistors are calculated to:
Vout1 adjusted by R2 and R3
R3 +
(1)
Vout1 = 1.1 V,
R2 = 180 kΩ,
Vref = 0.80 V,
→R3 = 470 kΩ
V FB
V out1*V FB
R2
(2)
Vout2 adjusted by R2 and Rx = R3||R4
Rx +
V FB
ǒVout2 * VFBǓ
1 + 1 ) 1
R3 R4
Rx
16
Vout2 = 1.5 V,
→Rx = 206 kΩ
R2
³ R4 +
1
1 * 1
Rx R3
→R4 = 360 kΩ
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(3)
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
APPLICATION INFORMATION
internet audio power supply
The input voltage from a single or dual NiCd, NiMH or alkaline cell is boosted to 3.3 V. This voltage is used as
system supply for the application and as an input voltage for the step-down charge pump which is used to
provide the core voltage for a DSP.
L1
10 µH
Ci
10 µF
7
SW
6
VOUT
VBAT
Co
22 µF
R1
9
LBI
LBO
R2
Single or dual
NiCd,
NiMH or
Alkaline Cell
8
R5
R3
Low Battery
Output
10
TPS61010
1
VO = 3.3 V
IO ≥ 100 mA
5
FB
EN
ADEN
COMP
GND
Cc1
10 pF
9
C1F
1 µF
R4
R(C)
2
100 kΩ
Cc2
10 nF
C2F
1 µF
8
6
3
4
C1F– C1F+ C2F– C2F+
OUT
5
Co
10 µF
VIN
Ci
2.2 µF
TPS60503
FB
1
7
VO = 1.5 V
IO ≤ 150 mA
10
R
EN
OFF/ON
PG
2
GND
Power Good
Output
9
Figure 30. Internet Audio Power Supply
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17
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
APPLICATION INFORMATION
layout and board space
C1F
C2F
All capacitors should be soldered as close as possible to the IC. A PCB layout proposal for a two-layer board
is shown in Figure 31. Care has been taken to connect all capacitors as close as possible to the circuit to achieve
optimized output voltage ripple performance.
Figure 31. Recommended PCB Layout for TPS6050x (top layer)
Figure 32. Recommended PCB Layout for TPS6050x (bottom layer)
18
www.ti.com
TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002
MECHANICAL DATA
DGS (S-PDSO-G10)
PLASTIC SMALL-OUTLINE PACKAGE
0,27
0,17
0,50
10
0,08 M
6
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
1
0°–ā6°
5
3,05
2,95
0,69
0,41
Seating Plane
1,07 MAX
0,15
0,05
0,10
4073272/B 08/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-187
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19
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