TI 74HC148

SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
D
D
D
SN54HC148 . . . J OR W PACKAGE
SN74HC148 . . . D OR N PACKAGE
(TOP VIEW)
Encode Eight Data Lines to 3-Line Binary
(Octal)
Applications Include:
– n-Bit Encoding
– Code Converters and Generators
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
4
5
6
7
EI
A2
A1
GND
description
The ’HC148 feature priority decoding of the inputs
to ensure that only the highest-order data line is
encoded. These devices encode eight data lines
to 3-line (4-2-1) binary (octal). Cascading circuitry
(enable input EI and enable output EO) has been
provided to allow octal expansion without the
need for external circuitry. Data inputs and outputs
are active at the low logic level.
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
EO
GS
3
2
1
0
A0
5
4
NC
VCC
EO
SN54HC148 . . . FK PACKAGE
(TOP VIEW)
6
7
NC
EI
A2
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
GS
3
NC
2
1
A1
GND
NC
A0
0
The SN54HC148 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC148 is characterized for
operation from –40°C to 85°C.
4
NC – No internal connection
FUNCTION TABLE
OUTPUTS
INPUTS
EI
0
1
2
3
4
5
6
7
A2
A1
A0
GS
EO
H
X
X
X
X
X
X
X
X
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
X
X
X
X
X
X
X
L
L
L
L
L
H
L
X
X
X
X
X
X
L
H
L
L
H
L
H
L
X
X
X
X
X
L
H
H
L
H
L
L
H
L
X
X
X
X
L
H
H
H
L
H
H
L
H
L
X
X
X
L
H
H
H
H
H
L
L
L
H
L
X
X
L
H
H
H
H
H
H
L
H
L
H
L
X
L
H
H
H
H
H
H
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
logic symbol†
HPRI/BIN
0
1
2
3
4
5
6
7
10
11
12
13
1
2
3
4
0/Z10
10
1/Z11
11
2/Z12
12
3/Z13
13
4/Z14
14
5/Z15
15
6/Z16
16
7/Z17
17
≥1
15
18
a
1a
EI
5
V18
2a
ENa
4a
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
14
9
7
6
EO
GS
A0
A1
A2
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
logic diagram (positive logic)
0
10
15
14
1
2
11
4
6
7
EI
A0
13
1
7
5
GS
12
9
3
EO
A1
2
3
4
6
A2
5
Pin numbers shown are for the D, J, N, and W packages.
POST OFFICE BOX 655303
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3
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
SN54HC148
VCC
Supply voltage
VIH
High-level input voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VIL
Low-level input voltage
VI
VO
Input voltage
Output voltage
tt
Input transition (rise and fall) time
TA
4
SN74HC148
MIN
NOM
MAX
MIN
NOM
MAX
2
5
6
2
5
6
1.5
1.5
3.15
3.15
4.2
4.2
0.5
0
0.5
0
1.35
0
1.35
0
1.8
0
1.8
0
0
0
VCC
VCC
0
VCC
VCC
VCC = 2 V
VCC = 4.5 V
0
1000
0
1000
0
500
0
500
VCC = 6 V
0
400
0
400
–55
125
–40
85
Operating free-air temperature
POST OFFICE BOX 655303
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V
V
0
VCC = 4.5 V
VCC = 6 V
UNIT
V
V
V
ns
°C
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
IOH = –20 µA
VOH
VI = VIH or VIL
IOH = –4 mA
IOH = –5.2 mA
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 4 mA
IOL = 5.2 mA
II
ICC
VI = VCC or 0
VI = VCC or 0,
IO = 0
MIN
TA = 25°C
TYP
MAX
MIN
MAX
SN74HC148
MIN
2V
1.9
1.998
1.9
1.9
4.5 V
4.4
4.499
4.4
4.4
6V
5.9
5.999
5.9
5.9
4.5 V
3.98
4.3
3.7
3.84
6V
5.48
5.8
5.2
MAX
UNIT
V
5.34
2V
0.002
0.1
0.1
0.1
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
6V
±0.1
±100
±1000
±1000
nA
8
160
80
µA
3
10
10
10
pF
6V
Ci
SN54HC148
2 V to 6 V
V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
SN54HC148
SN74HC148
TO
(OUTPUT)
VCC
2V
69
180
270
225
1–7
A0, A1, or A2
4.5 V
23
36
54
45
6V
21
31
46
38
EO
0 7
0–7
GS
tpd
d
A0, A1, or A2
EI
GS
EO
tt
TA = 25°C
TYP
MAX
FROM
(INPUT)
Any
MIN
MIN
MAX
MIN
MAX
2V
60
150
225
190
4.5 V
20
30
45
38
6V
17
26
38
33
2V
75
190
285
240
4.5 V
25
38
57
48
6V
21
32
48
41
2V
78
195
295
245
4.5 V
26
39
59
49
6V
22
33
50
42
2V
57
145
220
180
4.5 V
19
29
44
36
6V
16
25
38
31
2V
66
165
250
205
4.5 V
22
33
50
41
6V
19
28
43
35
2V
28
75
110
95
4.5 V
8
15
22
19
6V
6
13
19
16
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UNIT
ns
ns
5
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
operating characteristics, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load
TYP
UNIT
35
pF
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
Input
VCC
50%
50%
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
50%
10%
tPHL
90%
90%
tr
Input
50%
10%
90%
90%
tr
tPHL
VCC
50%
10% 0 V
Out-of-Phase
Output
90%
tf
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN54HC148, SN74HC148
8-LINE TO 3-LINE PRIORITY ENCODERS
SCLS109D – MARCH 1984 – REVISED MAY 1997
APPLICATION INFORMATION
16-Line Data (active low)
0 1 2 3 4 5 6 7 8
8 9 10 11 12 13 14 15
0 1 2 3 4 5 6 7 EI
0 1 2 3 4 5 6 7 EI
’HC148
’HC148
EO A0
A1
A2 GS
EO
A0
A1
A2
Enable
(active low)
GS
’HC08
0
1
2
Priority Flag
(active low)
3
Encoded Data (active low)
16-Line Data (active low)
0 1 2 3 4 5 6 7 8
8 9 10 11 12 13 14 15
0 1 2 3 4 5 6 7 EI
0 1 2 3 4 5 6 7 EI
’HC148
’HC148
EO A0
A1
A2 GS
EO
A0
A1
A2
Enable
(active low)
GS
’HC00
0
1
2
Priority Flag
(active high)
3
Encoded Data (active high)
Figure 2. Priority Encoder for 16 Bits
Since the ’HC148 is a combinational logic circuit, wrong addresses can appear during input transients. Moreover, a
change from high to low at EI can cause a transient low on GS when all inputs are high. This must be considered when
strobing the outputs.
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• DALLAS, TEXAS 75265
7
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Copyright  1998, Texas Instruments Incorporated