Ordering number : ENA1360 Bi-CMOS IC LV5654T 4-Channel Switching Regulator Controller Overview The LV5654T is a 4-channel switching regulator controller. Features • Low-voltage (3V) operation. • Independent standby functions for each of the four channels. • Synchronous rectification : channel 1 and channel 2. • Reference voltage precision : ±1%. • Is capable of driving MOS transistors. • Supports inverting step-up operation (channel 3). Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage 1 VCC max VCC pin -0.3 to 16 V Maximum supply voltage 2 VBVIAS max VBIAS pin -0.3 to 18 V Maximum clock input voltage VCLKIN max CLKIN pin 5.5 V Allowable power dissipation Pd max Independent IC 0.4 W Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +125 °C Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage 1 VCC VCC pin 3 to 15 V Supply voltage 2 VBIAS VBIAS pin 3 to 15 V Clock input voltage VCLKIN CLKIN pin Timing resistor RT 7 to 30 Timing capacitor CT 100 to 1000 Triangle wave frequency fOSC 5 0.1 to 1.3 V kΩ pF MHz Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. D2408 MS PC 20081030-S00001 No.A1360-1/10 LV5654T Electrical Characteristics at Ta = 25°C, VCC = VBIAS = 3.6V, SCP = 0V Parameter Symbol Ratings Conditions min typ Unit max Error amplifier 1 IN+ pin internal bias voltage VB Value added to the error amplifier 0.504 0.51 0.516 V 0.2 V offset at the error amplifier + side Output low voltage ch1 to ch4 VLow FB voltage IN- = 2.0V, IFB = 20µA Output high voltage ch1 to ch4 VHi FB IN- = 0V IFB1 = -20µA 2.0 V Error amplifier 2 IN3-RE pin offset voltage VOF Output low voltage VLow FB3RE IN3-RE = 2.0V, IFB = 20µA Output high voltage VHi FB3RE IN3-RE = -10mV, IFB = 500µA -6 6 0.2 2.0 mV V V Protection circuit Threshold voltage VSCP SCP pin current ISCP Short circuit detection signal pin VSCPOUT 1.1 1.25 1.4 Open collector V µA 4 0.2 V ISCPOUT = 100µA Software start block (ch1 to ch4) CSOFT = 0V 3.2 4 4.8 µA 160 200 240 kΩ Soft start current ch1 to ch4 ISF Soft start resistance ch1 to ch4 RSF ch1 to ch2 Duty MAX 1-2 Out monitor, IN- = 0V 100 80 85 90 % 80 85 90 % Fixed duty Maximum on duty 1-2 % Maximum on duty 3 ch3 Duty MAX 3 Out monitor, IN- = 0V Maximum on duty 4 ch4 Duty MAX 4 Out monitor, IN- = 0V OUT pin high side on resistance ROUT SOUR IO = 10mA 25 Ω OUT pin high side on resistance ROUT SINK IO = 10mA 10 Ω Current setting pin voltage VT RT RT = 10kΩ 0.57 V Output current IOH CT 190 µA Output current ratio ∆IO CT CT pin, rise/fall 2.5 Oscillation frequency fOSC1 RT = 10kΩ, CT = 270pF 510 Output block 1 to 6 Triangle wave oscillator block kHz Reference voltage block Reference voltage VREF Line regulation VLN REF 1.240 VCC = 3V to 15V V 10 mV Control circuit On state voltage VON CTL OFF state voltage VOFF CTL 2.0 0.6 V V Pin input current IIN CTL 60 µA Standby circuit On voltage VON STBY 2.0 Off voltage VOFF STBY Pin input current IIN STBY VSTBY = 2V VCC current consumption ICC IN1- to IN4- = 1V Standby mode current consumption IOFF V 0.6 V 60 µA 5 mA 1 µA All circuits VSTBY = VCTL = 0V 4 IOFF = ICC + IBIAS No.A1360-2/10 LV5654T Package Dimensions unit : mm (typ) 3253B 9.75 0.5 5.6 7.6 19 36 1 18 0.15 0.18 0.08 (1.0) (0.63) 1.2max (0.5) SANYO : TSSOP36(275mil) Pin Assignment VBIAS 1 36 OUT2 OUT3 2 35 OUT2N OUT4 3 34 GND_P (VS) SCPOUT 4 33 OUT1 32 OUT1N STBY4 6 31 CSOFT1 STBY3 7 30 CSOFT2 STBY2 8 29 CSOFT3 STBY1 9 SCP 10 CTL 11 LV5654T CLKIN 5 28 CSOFT4 27 VCC 26 IN1- IN4- 12 25 FB1 FB4 13 24 IN2- IN3+RE 14 23 FB2 IN3-RE 15 22 VREF FB3RE 16 21 CT FB3 17 20 RT IN3- 18 19 GND_S Top view No.A1360-3/10 LV5654T Block Diagram and Sample Application Circuit VREF SCP SCP_OUT Signal system power supply VCC Pre-output stage VBIAS power supply FB1A + + + - IN1- OUT1 Step-down FB1A (DOWN) FB1 CSOFT1 OUT1N VO1 3.3V/100mA FB2A + + + - IN2- OUT2 Step-down FB2A (DOWN) FB2 CSOFT2 OUT2N VO2 3.3V/100mA FB3A IN3-RE IN3+RE FB3R IN3FB3 + + + + - FB3A OUT3 CSOFT3 VO3 -4V/100mA FB4A FB4A IN4- Inversion (INVERT) + - + + - VO4 6V/100mA OUT4 FB4 CSOFT4 GND_P (VS) Step-up (UP) ON/OFF setting GND_S STBY1 STBY2 STBY3 STBY4 STBY CTL CLKIN OSC RT CT The CLKIN pin must be connected to GND, when the external clock synchronization (CLKIN) is not used. No.A1360-4/10 LV5654T Pin Function Block ch1 DOWN (Step-down) ch2 DOWN (Step-down) ch3 (Inversion) ch4 Step-up (UP) POWER CONTROL OSC Pin No. Pin Name Functions 9 STBY1 Standby input. H/ch1 ; ON, L/ch1 ; OFF. 26 IN1- Error amplifier Inverting input. 25 FB1 Error amplifier output. 31 CSOFT1 Soft start setting capacitor connection. Connect to GND through a capacitor. 33 OUT1 Output. External transistor P-channel gate connection. 32 OUT1N Output. External transistor N-channel gate connection. 8 STBY2 Standby input. H/ch2 ; ON, L/ch2 ; OFF. 24 IN2- Error amplifier Inverting input. 23 FB2 Error amplifier output. 30 CSOFT2 Soft start setting capacitor connection. Connect to GND through a capacitor. 36 OUT2 Output. External transistor P-channel gate connection. 35 OUT2N Output. External transistor N-channel gate connection. 7 STBY3 Standby input. H/ch3 ; ON, L/ch3 ; OFF. 14 IN3+RE Inversion amplifier, + (noninverting) input. 15 IN3-RE Inversion amplifier, - (Inverting) input. 16 FB3RE Inversion amplifier output. 18 IN3- Error amplifier, - (Inverting) input. 17 FB3 Error amplifier output. 29 CSOFT3 Soft start setting capacitor connection. Connect to GND through a capacitor. 2 OUT3 Output. External transistor P-channel gate connection. 6 STBY4 Standby input. H/ch4 ; ON, L/ch4 ; OFF. 12 IN4- Error amplifier Inverting input. 13 FB4 Error amplifier output. 28 CSOFT4 Soft start setting capacitor connection. Connect to GND through a capacitor. 3 OUT4 Output. External transistor N-channel gate connection. 27 VCC Power supply input (signal system). 1 VBIAS Power supply input (pre-output stage). 19 GND_S Ground (signal system). 34 GND_P (VS) Ground (pre-output stage). 22 VREF Reference voltage output. 11 CTL Output control. 10 SCP Connection pin for the delay time setting capacitor of short circuit detection circuit. 4 SCPOUT SCP_OUT pin (SCP output). 21 CT Triangle wave oscillation frequency setting capacitor connection. 20 RT Triangle wave oscillation frequency setting resistor connection. 5 CLKIN External clock input. No.A1360-5/10 LV5654T Equivalent Circuits Pin No. Pin Name 11 CTL 9 STBY1 8 STBY2 7 STBY3 6 STBY4 Equivalent Circuit CTRL/STBY* 120kΩ 30kΩ GND_S 26 24 18 12 IN1IN2- VREG (Internal constant voltage) IN3IN4- IN*- 500Ω 5kΩ 5kΩ GND_S 25 FB1 23 FB2 17 FB3 13 FB4 VREG (Internal constant voltage) 20Ω FB* 500Ω GND_S 14 15 IN3+RE IN3-RE VREG (Internal constant voltage) IN3+RE IN3-RE 500Ω 500Ω 5kΩ 5kΩ GND_S 16 FB3R VREG (Internal constant voltage) FB3R GND_S 31 CSOFT1 30 CSOFT2 29 CSOFT3 28 CSOFT4 VREG (Internal constant voltage) 500Ω CSOFT* 10kΩ 200kΩ GND_S Continued on next page. No.A1360-6/10 LV5654T Continued from preceding page. Pin No. Pin Name 33 OUT1 32 OUT1N 36 OUT2 35 OUT2N 2 OUT3 3 OUT4 Equivalent Circuit VBIAS VOUT* VOUT*N GND_P (VS) 20 RT VREG (Internal constant voltage) 500Ω RT 500Ω GND_S 21 CT VREG (Internal constant voltage) CT GND_S 10 SCP VREG (Internal constant voltage) 1.5kΩ SCP 13kΩ GND_S 4 SCP_OUT VREG (Internal constant voltage) SCP_OUT GND_S Continued on next page. No.A1360-7/10 LV5654T Continued from preceding page. Pin No. Pin Name 22 VREF Equivalent Circuit VREG (Internal constant voltage) VREF 14.8kΩ GND_S 5 CLKIN VREG (Internal constant voltage) CLKIN 300Ω GND_S 27 VCC 1 VBIAS 19 GND_S 34 GND_P (VS) VCC VBIAS GND_S GND_P (VS) No.A1360-8/10 LV5654T Notes (1) Soft start time setting method The soft start time is set with the capacitor connected between CSOFT* and GND_S. This IC has an independent soft start function for each channel, so a capacitor must be connected for each channel to set the soft start (time). (Description of soft start operation) (Outline of soft start pin) CSOFT* [V] CSOFT* voltage VREG (Internal constant voltage) VB (= 0.515 [V] (TYP)) CSOFT* T [s] 200kΩ Soft start time (Tsoft [s]) CSOFT pin charging starts The output voltage reaches the set voltage (Output voltage constant) GND_S VB (TYP, 0.515 [V]) (2) Setting the oscillation frequency The internal oscillation frequency is set by the resistor connected to the RT pin and the capacitor connected to the CT pin. The waveform generated on CT is a triangular wave with the charging/discharging waveform determined by RT and CT. 1 fOSC = 1.32 × CT × RT [Hz] The actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set. (3) External input CLK function (CLK_IN) Switching operation can be synchronized with external clock input (CLK_IN) by using the CLK_IN pin. • External clock (CLK_IN) frequency and input level When using external clock (CLK_IN) input, input a frequency equal to the internal oscillation frequency +20% or more to CLK_IN. In addition, the CLK_IN configuration is shown in the figure “CLK_IN (input) equivalent circuit (outline)” below. The 0.8V reference voltage and CLK_IN are compared to determine the edges, so input a signal of 0.8V or more (VCC voltage or less) as the external clock (CLK_IN). • External/internal clock switching Set the CTL pin Low before switching between the external clock and the internal clock. Switching clocks when running may give rise to output voltage fluctuations. • Maximum ON duty The maximum ON duty (Duty_MAX*) of channel 3 to channel 4 is the 85% (typ.) setting. When using the external clock (CLK_IN), the maximum ON duty (Duty_MAX*) becomes smaller, so care must be taken for the set output voltage. (CLK_IN (input) equivalent circuit (outline)) CLK_IN 0.8V No.A1360-9/10 LV5654T (4) SCP function • Description of operation When any one of FB1 to FB4 goes High due to the load being shorted or other reason, charging to the SCP pin starts. If output does not recover during the set time Tscp and the SCP pin voltage exceeds the threshold voltage, the protection circuit (SCP) operates, and all channel outputs are turned OFF. The SCP_OUT pin set from High to Low. All outputs are latched OFF by the protection circuit (SCP). This latched state (output OFF) is canceled by setting the CTL pin Low or by turning the power supply off. When not using the protection function (SCP), the SCP pin must be shorted to GND_S with a line that is as short as possible. • SCP_OUT The SCP_OUT pin functions to notify an external microcontroller or other component of the output status (Low when SCP operates). The output configuration is an open drain output, and a pull-up resistor is used. When not used, leave this pin open. • Switching time The SCP_OUT switching time is set by the capacitor connected to the SCP pin. (SCP charging operation) (SCP and SCP_OUT operation) ⋅When STBY* is regarded as High (the output is turned on by setting CTL Low to High). SCP [V] Charging with Iscp = 4 [µA] 1.25 [V] (TYP) CTL SCP tscp Output short circuit T [s] Capacitor charging starts with the load being shorted Threshold voltage 1.25V (TYP) SCP_OUT SCP operation SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of December, 2008. Specifications and information herein are subject to change without notice. PS No.A1360-10/10