Ordering number : ENA1362 Bi-CMOS LSI LV5655VB 3-channel Switching Regulator Controller Overview The LV5655VB is a 3-channel switching regulator controller. Features • Low-voltage (3V) operation • Reference voltage precision : ±1% • Standby circuit (CTL : Controls operation of all channels) • Synchronous rectification: channel 1 and channel 2 (selected by SYN voltage) • Independent soft start function for each channel Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC max -0.3 to 16 Allowable power dissipation Pd max 0.72 W Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +125 °C Mounted on a specified board* V * Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Recommended Operating Conditions at Ta = 25°C Parameter Symbol Supply voltage VCC Supply voltage VBIAS Oscillation frequency fOSC Conditions Ratings Unit 3 to 15 3 to 15 0.2 to 1.3 V V MHz Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 40809 MS PC 20090327-S00001 No.A1362-1/9 LV5655VB Electrical Characteristics at Ta = 25°C, VCC = VBIAS = 3.6V, SCP = 0V Parameter Symbol Ratings Conditions min typ Unit max Error amplifier 1 IN+ pin internal bias voltage VB Value added to the error amplifier offset at Output low voltage ch1 to ch3 VLow FB the error amplifier + side voltage IN- = 2.0V, IFB = 20µA Output high voltage ch1 to ch3 VHi FB IN- = 0V, IFB1 = -20µA 0.504 0.51 0.516 0.2 2.0 V V V Protection circuit Threshold voltage VSCP SCP pin current ISCP 1.1 1.25 1.4 V µA 4 Software start block CSOFT* = 0V 3.2 4 4.8 µA 160 200 240 kΩ Soft start current ch1 to ch3 ISF Soft start resistance ch1 to ch3 RSF Maximum on duty 1 ch1 Duty MAX 1 IN- = 0V 100 Maximum on duty 2 ch2 Duty MAX 2 IN- = 0V 100 Maximum on duty 3 ch3 Duty MAX 3 IN- = 0V 80 OUT pin high side on resistance ROUT SOUR OUT pin low side on resistance ROUT SINK Fixed duty % % 85 90 % IO = -10mA 28 50 Ω IO = 10mA 18 35 Ω 730 kHz 10 mV Output block Triangle wave oscillator block Current setting pin voltage VT RT RT = 20kΩ Oscillation frequency fOSC RT = 20kΩ 0.56 460 600 V Reference voltage block Reference voltage VREF Line regulation VLN REF 1.240 VCC = 3V to 15V V SYN circuit On state voltage VON SYN OFF state voltage VOFF SYN Pin input current IIN SYN 2.0 V SYN* = 2V 0.6 V 60 µA Control circuit On state voltage VON CTL OFF state voltage VOFF CTL 2.0 Pin input current IIN STBY CTL = 2V VCC current consumption ICC IN1- to IN3- = 1V Standby mode current consumption IOFF CTL = 0V, IOFF = ICC + IBIAS V 0.6 V 60 µA 6 mA 1 µA All circuits 4.5 No.A1362-2/9 LV5655VB Package Dimensions unit : mm (typ) 3287 Pd max -- Ta Allowable power dissipation, Pd max --W 1.0 6.5 24 0.5 6.4 4.4 13 12 1 0.5 0.15 0.22 1.5max (0.5) Specified board: 114.3×76.1×1.6mm3 glass epoxy board. 0.8 0.72 0.6 0.4 0.29 0.2 0 -30 -20 0 20 40 60 80 85 100 0.1 (1.3) Ambient temperature, Ta -- °C SANYO : SSOP24(225mil) Pin Assignment 24 IN1- VREF 2 23 FB1 CSOFT4 3 22 IN2- CSOFT2 4 21 FB2 CSOFT3 5 20 IN3- SCP 6 VCC 7 SYN2 8 LV5655VB RT 1 19 FB3 18 GND_S 17 CLT (STBY) SYN1 9 16 VBIAS GND_P (VS) 10 15 OUT3 OUT1N 11 OUT1 12 14 OUT2N 13 OUT2 Top view No.A1362-3/9 LV5655VB Block Diagram and Sample Application Circuit VREF VREF SCP VCC SCP VBAT VBIAS FB1 IN1- + + + - OUT1 FB1 Step-down (DOWN) FB2 Step-down (DOWN) FB3 Step-down (DOWN) FB1 OUT1N CSOFT1 SYN1 L: Synchronous rectification H: Diode rectification SYN1 FB2 IN2- + + + - OUT2 FB2 OUT2N CSOFT2 SYN2 L: Synchronous rectification H: Diode rectification FB3 IN3- + - + + - SYN2 OUT3 FB3 CSOFT3 GND_P(VS) GND_S Output ON/OFF CLK(STBY) OSC (Oscillation circuit) RT No.A1362-4/9 LV5655VB Pin Function Block Pin No. Pin Name Functions ch1 24 IN1- (Step-down) 23 FB1 Error amplifier output. 3 CSOFT1 Soft start setting capacitor connection. Connect to GND through a capacitor. 12 OUT1 Output. External transistor P-channel gate connect. 11 OUT1N Output. External transistor N-channel gate connection. 9 SYN1 Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification. ch2 22 IN2- Error amplifier, - (Inverting) input. (Step-down) 21 FB2 Error amplifier output. 4 CSOFT2 Soft start setting capacitor connection. Connect to GND through a capacitor. 13 OUT2 Output. External transistor P-channel gate connect. 14 OUT2N Output. External transistor N-channel gate connection. 8 SYN2 Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification. ch3 20 IN3- Error amplifier, - (Inverting) input. (Step-down) 19 FB3 Error amplifier output. 5 CSOFT3 Soft start setting capacitor connection. Connect to GND through a capacitor. 15 OUT3 Output. External transistor P-channel gate connect. POWER CONTROL OSC Error amplifier, - (Inverting) input. 7 VCC Power supply input (signal system). 16 VBIAS Power supply input (pre-output stage). 18 GND_S Ground (signal system). 10 GND_P (VS) Ground (pre-output stage). 2 VREF Reference voltage output. Connect to GND through a capacitor. 17 CTL (STBY) Output control, H : all outputs ON, L : all outputs off. 6 SCP Connection pin for the delay time setting capacitor of short-circuit detection circuit (connect to GND). 1 RT Oscillation frequency setting resistor connection (connect to GND). No.A1362-5/9 LV5655VB Equivalent Circuits Pin No. Pin Name 17 CTL Description Equivalent Circuit CTL: Controls operation of all circuits. CTL Controls operation of all channels. 120kΩ High : ON Low : OFF 30kΩ GND_S 22 IN1IN2- 20 IN3- 24 Error amplifier inverting input. VREG (Internal constant voltage) The regulator output is divided by a resistor and connected to IN*- IN*- 500Ω 5kΩ 5kΩ GND_S 23 FB1 Error amplifier output. 21 FB2 These pins, in combination with IN*-, 19 FB3 configure the error amplifier filters VREG (Internal constant voltage) 20Ω FB* 500Ω GND_S 3 CSOFT1 Soft start. 4 CSOFT2 Connect to GND via a capacitor to set the 5 CSOFT3 soft start time. VREG (Internal constant voltage) 500Ω CSOFT* 10kΩ 200kΩ GND_S 12 OUT1 Output. 13 OUT2 Connect external PchFET. 15 OUT3 VBIAS OUT* GND_P (VS) 11 OUT1N Output. 14 OUT2N Connect external NchFET. VBIAS OUT*N GND_P (VS) Continued on next page. No.A1362-6/9 LV5655VB Continued from preceding page. Pin No. Pin Name 1 RT Description Equivalent Circuit Sets the oscillation frequency. VREG (Internal constant voltage) Connect to GND through a resistor. Constant voltage output (0.56V typ.) 500Ω RT 500Ω GND_S 6 SCP Connect to GND via a capacitor to set the VREG (Internal constant voltage) short circuit detection circuit delay time. 1.5kΩ SCP 13kΩ GND_S 9 SYN1 Channel 1 and channel 2 8 SYN2 synchronous/diode rectification switching. VREG (Internal constant voltage) Low : Synchronous rectification High : Diode rectification 120kΩ Switching operates independently for the SYN* L : Synchronous rectification H : Diode rectification corresponding channel. 30kΩ GND_S 23 VREF Internal constant voltage circuit output. VREG (Internal constant voltage) Connect a stabilizing capacitor. VREF 14.8kΩ GND_S 7 VCC 16 VBIAS Signal system power supply Power system power supply (Output stage) 18 GND_S 10 GND_P (VS1) Signal system GND Output stage GND (pre-stage) VCC VBIAS GND_S GND_P (VS) No.A1362-7/9 LV5655VB Notes (1) Soft start time setting method The soft start time is set with the capacitor connected between CSOFT* and GND_S. This IC has an independent soft start function for each channel, so a capacitor must be connected for each CSOFT to set the soft start time. (Description of soft start operation) (Outline of soft start pin) VREG (Internal constant voltage) CSOFT* [V] CSOFT* voltage VB (=0.515 [V] (TYP)) 4µA (ISF) CSOFT* 200kΩ (RSF) GND_S T [s] VB (0.515[V]) Soft start time (Tsoft [s]) CSOFT pin charging starts VB TSOFT = CSOFT × RSFIn ( ) RSF × ISF = 0.206 × 106 × CSOFT [s] The output voltage reaches the set voltage (Output voltage constant) (2) Setting the oscillation frequency The oscillation frequency is set by the resistor (RT resistor) connected to the RT pin. The RT pin is a constant voltage (0.56 [V] typ.) output, and the oscillation frequency is determined by the current run through the RT resistor and charging/discharging of the internal capacitor. fOSC [kHz] = 12 × 1E3 RT [kΩ] (Reference calculation formula) The internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set. (3) SCP (short circuit protection) function • Description of operation When any one of FB1 to FB4 goes High due to the load being shorted or other reason, charging to the SCP pin starts. If output does not recover during the set time Tscp and SCP pin voltage exceeds the threshold voltage, the protective circuit (SCP) operates and all channel outputs are turned OFF. All outputs are latched off by the protection circuit (SCP). This latched state (output OFF) is canceled by setting the CTL pin Low or by turning the power supply OFF. When not using the protection function (SCP), the SCP pin must be shorted to GND_S with a line that is as short as possible. The SCP operation time is set by the capacitor connected to the SCP pin. (SCP charging operation) (SCP function) SCP [V] Charging with Iscp = 4 [µA] CTL 1.25 [V] (TYP) Capacitor charging starts with the load being shorted Threshold voltage 1.25V (TYP) SCP tscp Output short circuit T [s] SCP operation Each output Output ON (Operating condition) Output OFF Time No.A1362-8/9 LV5655VB SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of April, 2009. Specifications and information herein are subject to change without notice. PS No.A1362-9/9