Freescale Semiconductor Technical Data Document Number: MRF7S21110H Rev. 1, 7/2008 RF Power Field Effect Transistors N - Channel Enhancement - Mode Lateral MOSFETs MRF7S21110HR3 MRF7S21110HSR3 Designed for CDMA base station applications with frequencies from 2110 to 2170 MHz. Suitable for CDMA and multicarrier amplifier applications. To be used in Class AB and Class C for PCN - PCS/cellular radio and WLL applications. • Typical Single - Carrier W - CDMA Performance: VDD = 28 Volts, IDQ = 1100 mA, Pout = 33 Watts Avg., Full Frequency Band, 3GPP Test Model 1, 64 DPCH with 50% Clipping, Channel Bandwidth = 3.84 MHz, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF. Power Gain — 17.3 dB Drain Efficiency — 32.5% Device Output Signal PAR — 6.1 dB @ 0.01% Probability on CCDF ACPR @ 5 MHz Offset — - 38 dBc in 3.84 MHz Channel Bandwidth • Capable of Handling 10:1 VSWR, @ 32 Vdc, 2140 MHz, 110 Watts CW Peak Tuned Output Power • Pout @ 1 dB Compression Point w 110 Watts CW Features • 100% PAR Tested for Guaranteed Output Power Capability • Characterized with Series Equivalent Large - Signal Impedance Parameters • Internally Matched for Ease of Use • Integrated ESD Protection • Greater Negative Gate - Source Voltage Range for Improved Class C Operation • Designed for Digital Predistortion Error Correction Systems • RoHS Compliant • In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel. 2110 - 2170 MHz, 33 W AVG., 28 V SINGLE W - CDMA LATERAL N - CHANNEL RF POWER MOSFETs CASE 465- 06, STYLE 1 NI - 780 MRF7S21110HR3 CASE 465A - 06, STYLE 1 NI - 780S MRF7S21110HSR3 Table 1. Maximum Ratings Symbol Value Unit Drain - Source Voltage Rating VDSS - 0.5, +65 Vdc Gate - Source Voltage VGS - 6.0, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg - 65 to +150 °C Case Operating Temperature TC 150 °C TJ 225 °C Symbol Value (2,3) Unit Operating Junction Temperature (1,2) Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 80°C, 109 W CW Case Temperature 78°C, 33 W CW RθJC 0.37 0.41 °C/W 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1955. © Freescale Semiconductor, Inc., 2007-2008. All rights reserved. RF Device Data Freescale Semiconductor MRF7S21110HR3 MRF7S21110HSR3 1 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22 - A114) 1B (Minimum) Machine Model (per EIA/JESD22 - A115) A (Minimum) Charge Device Model (per JESD22 - C101) IV (Minimum) Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 μAdc Zero Gate Voltage Drain Leakage Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate - Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) IGSS — — 1 μAdc Gate Threshold Voltage (VDS = 10 Vdc, ID = 270 μAdc) VGS(th) 1.2 2 2.7 Vdc Gate Quiescent Voltage (VDD = 28 Vdc, ID = 1100 mAdc, Measured in Functional Test) VGS(Q) 2 2.7 3.5 Vdc Drain - Source On - Voltage (VGS = 10 Vdc, ID = 2.7 Adc) VDS(on) 0.05 0.1 0.3 Vdc Reverse Transfer Capacitance (VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Crss — 7.95 — pF Output Equivalent Capacitance (VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Coss — 613 — pF Input Capacitance (VDS = 28 Vdc, VGS = 0 Vdc ± 30 mV(rms)ac @ 1 MHz) Ciss — 232 — pF Off Characteristics On Characteristics Dynamic Characteristics (1) Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1100 mA, Pout = 33 W Avg., f = 2112.5 MHz and f = 2167.5 MHz, Single - Carrier W - CDMA, 3GPP Test Model 1, 64 DPCH, 50% Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Power Gain Gps 16.5 17.3 19.5 dB Drain Efficiency ηD 31 32.5 39 % PAR 5.7 6.1 6.5 dB ACPR - 48 - 38 - 35 dBc IRL — - 15 — dB Output Peak - to - Average Ratio @ 0.01% Probability on CCDF Adjacent Channel Power Ratio Input Return Loss 1. Part internally matched both on input and output. (continued) MRF7S21110HR3 MRF7S21110HSR3 2 RF Device Data Freescale Semiconductor Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Typical Performances (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1100 mA, 2110 - 2170 MHz Bandwidth Video Bandwidth @ 90 W PEP Pout where IM3 = - 30 dBc (Tone Spacing from 100 kHz to VBW) ΔIMD3 = IMD3 @ VBW frequency - IMD3 @ 100 kHz <1 dBc (both sidebands) VBW MHz — 10 — Gain Flatness in 60 MHz Bandwidth @ Pout = 33 W Avg. GF — 0.325 — dB Average Deviation from Linear Phase in 60 MHz Bandwidth @ Pout = 110 W CW Φ — 0.772 — ° Delay — 1.9 — ns Part - to - Part Insertion Phase Variation @ Pout = 110 W CW, f = 2140 MHz, Six Sigma Window ΔΦ — 39.7 — ° Gain Variation over Temperature ( - 30°C to +85°C) ΔG — 0.011 — dB/°C ΔP1dB — 0.028 — dBm/°C Average Group Delay @ Pout = 110 W CW, f = 2140 MHz Output Power Variation over Temperature ( - 30°C to +85°C) MRF7S21110HR3 MRF7S21110HSR3 RF Device Data Freescale Semiconductor 3 R2 VBIAS VSUPPLY + R1 C2 + C3 C4 C5 C6 C8 + + C9 C10 + C11 + C12 C13 C14 Z6 Z5 Z7 RF INPUT Z1 Z2 Z3 Z9 Z11 Z12 C7 Z4 C1 Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 RF OUTPUT Z10 DUT 1.280″ x 0.084″ Microstrip 0.856″ x 0.084″ Microstrip 0.240″ x 0.280″ Microstrip 0.420″ x 0.880″ Microstrip 0.950″ x 0.0395″ Microstrip 0.526″ x 0.0940″ Microstrip 0.480″ x 1.050″ Microstrip Z8 Z9 Z10 Z11 Z12 PCB 0.370″ x 0.201″ Microstrip 0.386″ x 0.084″ Microstrip 0.196″ x 0.242″ Microstrip 0.105″ x 0.084″ Microstrip 1.267″ x 0.084″ Microstrip Arlon CuClad 250GX - 0300 - 55 - 22, 0.030″, εr = 2.55 Figure 1. MRF7S21110HR3(HSR3) Test Circuit Schematic Table 5. MRF7S21110HR3(HSR3) Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1 15 pF, Chip Capacitor ATC100B150JT500XT ATC C2 47 μF, 16 V Tantalum Capacitor T491D476K016AT Kemet C3 8.2 pF, Chip Capacitor ATC100B8R2CT500XT ATC C4, C13 2.2 μF, 50 V Chip Capacitors C1825C225J5RAC Kemet C5 1 μF, 50 V Tantalum Capacitor T491C105K050AT Kemet C6 5.1 pF Chip Capacitor ATC100B5R1CT500XT ATC C7 16 pF Chip Capacitor ATC100B160JT500XT ATC C8 6.8 pF Chip Capacitor ATC100B6R8BT500XT ATC C9, C10 22 μF, 35 V Tantalum Capacitors T491X226K035AT Kemet C11 0.1 μF Chip Capacitor C1206C104K5RAC Kemet C12 100 μF, 50 V Electrolytic Capacitor MCR63V477M13X26 Multicomp C14 470 μF, 63 V Electrolytic Capacitor MCR50V107M8X11 Multicomp R1 1 KΩ, 1/4 W Chip Resistor CRCW12061001FKEA Vishay R2 10 Ω, 1/3 W Chip Resistor CRCW121010R0FKEA Vishay MRF7S21110HR3 MRF7S21110HSR3 4 RF Device Data Freescale Semiconductor R1 C5 C8 R2 C6 C13 C14 C9 C10 C3 C11 C4 C1 CUT OUT AREA C2 C12 C7 Figure 2. MRF7S21110HR3(HSR3) Test Circuit Component Layout MRF7S21110HR3 MRF7S21110HSR3 RF Device Data Freescale Semiconductor 5 17.4 Gps, POWER GAIN (dB) 17.2 17 35 Gps 34 ηD 33 16.8 32 VDD = 28 Vdc, Pout = 33 W (Avg.), IDQ = 1100 mA 16.6 Single−Carrier W−CDMA, 3.84 MHz Channel 16.4 Bandwidth, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF 16.2 16 0 −0.5 −4 −1 PARC −1.5 15.8 15.6 2060 0 −8 −12 −16 −2 IRL 2080 2100 2120 2140 2160 2180 −2.5 2220 2200 −20 IRL, INPUT RETURN LOSS (dB) 36 PARC (dB) 17.6 ηD, DRAIN EFFICIENCY (%) TYPICAL CHARACTERISTICS f, FREQUENCY (MHz) 50 Gps 16.2 49 ηD 48 16 47 15.8 46 VDD = 28 Vdc, Pout = 70 W (Avg.), IDQ = 1100 mA 15.6 Single−Carrier W−CDMA, 3.84 MHz Channel 15.4 Bandwidth, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF 15.2 PARC 15 IRL 14.8 2060 2080 2100 2120 2140 2160 2180 −2 −2.5 −3 0 PARC (dB) Gps, POWER GAIN (dB) 16.4 −4 −8 −12 −3.5 2200 −4 2220 −16 IRL, INPUT RETURN LOSS (dB) 16.6 ηD, DRAIN EFFICIENCY (%) Figure 3. Output Peak - to - Average Ratio Compression (PARC) Broadband Performance @ Pout = 33 Watts Avg. f, FREQUENCY (MHz) Figure 4. Output Peak - to - Average Ratio Compression (PARC) Broadband Performance @ Pout = 70 Watts Avg. 19 −10 Gps, POWER GAIN (dB) 18 IMD, THIRD ORDER INTERMODULATION DISTORTION (dBc) IDQ = 1650 mA 1375 mA 1100 mA 17 825 mA 16 550 mA 15 VDD = 28 Vdc, f1 = 2135 MHz, f2 = 2145 MHz Two−Tone Measurements, 10 MHz Tone Spacing 14 13 VDD = 28 Vdc, f1 = 2135 MHz, f2 = 2145 MHz Two−Tone Measurements, 10 MHz Tone Spacing −20 IDQ = 550 mA −30 825 mA −40 1375 mA 350 mA −50 1100 mA −60 1 10 100 Pout, OUTPUT POWER (WATTS) PEP Figure 5. Two - Tone Power Gain versus Output Power 300 1 10 100 300 Pout, OUTPUT POWER (WATTS) PEP Figure 6. Third Order Intermodulation Distortion versus Output Power MRF7S21110HR3 MRF7S21110HSR3 6 RF Device Data Freescale Semiconductor −10 IMD, INTERMODULATION DISTORTION (dBc) VDD = 28 Vdc, IDQ = 1100 mA f1 = 2135 MHz, f2 = 2145 MHz Two−Tone Measurements, 10 MHz Tone Spacing −20 −30 −40 3rd Order −50 5th Order −60 7th Order −70 1 10 100 0 VDD = 28 Vdc, Pout = 90 W (PEP), IDQ = 1100 mA Two−Tone Measurements (f1 + f2)/2 = Center Frequency of 2140 MHz −10 −20 −30 IM3−L IM3−U −40 IM5−U IM5−L IM7−U −50 IM7−L −60 10 1 400 100 Pout, OUTPUT POWER (WATTS) PEP TWO−TONE SPACING (MHz) Figure 7. Intermodulation Distortion Products versus Output Power Figure 8. Intermodulation Distortion Products versus Tone Spacing OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) 1 60 Ideal 0 55 −1 50 −2 −1 dB = 31.27 W 45 −3 −2 dB = 45.15 W Actual −3 dB = 75 W −4 VDD = 28 Vdc, IDQ = 1100 mA f = 2140 MHz, Input Signal PAR = 7.5 dB −5 20 40 60 40 ηD, DRAIN EFFICIENCY (%) IMD, INTERMODULATION DISTORTION (dBc) TYPICAL CHARACTERISTICS 35 30 100 80 Pout, OUTPUT POWER (WATTS) 19 VDD = 28 Vdc, IDQ = 1100 mA, f = 2140 MHz, Single−Carrier W−CDMA, Input Signal PAR = 7.5 dB, ACPR @ ±5 MHz Offset in 3.84 MHz Integrated Bandwidth −10 18 −20 Uncorrected, Upper and Lower −30 DPD Corrected No Memory Correction −40 −50 −60 38 40 42 44 46 48 Gps 25_C 60 TC = −30_C 17 85_C 50 25_C 16 40 85_C 15 30 14 20 13 DPD Corrected with Memory Correction −70 36 70 −30_C VDD = 28 Vdc IDQ = 1100 mA f = 2140 MHz ηD 12 50 Pout, OUTPUT POWER (dBm) Figure 10. Digital Predistortion Correction versus ACPR and Output Power 1 10 100 ηD, DRAIN EFFICIENCY (%) 0 Gps, POWER GAIN (dB) ACPR, UPPER AND LOWER RESULTS (dBc) Figure 9. Output Peak - to - Average Ratio Compression (PARC) versus Output Power 10 0 300 Pout, OUTPUT POWER (WATTS) CW Figure 11. Power Gain and Drain Efficiency versus CW Output Power MRF7S21110HR3 MRF7S21110HSR3 RF Device Data Freescale Semiconductor 7 TYPICAL CHARACTERISTICS 108 18 IDQ = 1100 mA f = 2140 MHz MTTF (HOURS) Gps, POWER GAIN (dB) 17 16 15 107 106 14 28 V VDD = 24 V 32 V 105 13 0 40 80 120 160 200 90 110 130 150 170 190 210 230 250 TJ, JUNCTION TEMPERATURE (°C) Pout, OUTPUT POWER (WATTS) CW Figure 12. Power Gain versus Output Power This above graph displays calculated MTTF in hours when the device is operated at VDD = 28 Vdc, Pout = 33 W Avg., and ηD = 32.5%. MTTF calculator available at http:/www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. Figure 13. MTTF versus Junction Temperature W - CDMA TEST SIGNAL 100 −10 3.84 MHz Channel BW −20 10 1 −40 Input Signal −50 0.1 (dB) PROBABILITY (%) −30 W−CDMA. ACPR Measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF 0.01 0.001 −60 −70 −80 −ACPR in 3.84 MHz Integrated BW −90 0.0001 0 2 4 6 8 10 PEAK−TO−AVERAGE (dB) Figure 14. CCDF W - CDMA 3GPP, Test Model 1, 64 DPCH, 50% Clipping, Single - Carrier Test Signal −ACPR in 3.84 MHz Integrated BW −100 −110 −9 −7.2 −5.4 −3.6 −1.8 0 1.8 3.6 5.4 7.2 9 f, FREQUENCY (MHz) Figure 15. Single - Carrier W - CDMA Spectrum MRF7S21110HR3 MRF7S21110HSR3 8 RF Device Data Freescale Semiconductor Zo = 10 Ω Zload f = 2220 MHz f = 2060 MHz f = 2220 MHz f = 2060 MHz Zsource VDD = 28 Vdc, IDQ = 1100 mA, Pout = 33 W Avg. f MHz Zsource W Zload W 2060 2.2 - j5.1 2.3 - j4.0 2080 2.2 - j5.0 2.2 - j3.9 2100 2.1 - j4.9 2.1 - j3.8 2120 2.1 - j4.8 2.1 - j3.7 2140 2.1 - j4.7 2.0 - j3.5 2160 2.0 - j4.5 2.0 - j3.4 2180 2.0 - j4.4 2.0 - j3.3 2200 2.0 - j4.3 1.8 - j3.1 2220 2.0 - j4.2 1.8 - j3.0 Zsource = Test circuit impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Input Matching Network Z source Z load Figure 16. Series Equivalent Source and Load Impedance MRF7S21110HR3 MRF7S21110HSR3 RF Device Data Freescale Semiconductor 9 PACKAGE DIMENSIONS B G Q bbb 2X 1 M T A M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M−1994. 2. CONTROLLING DIMENSION: INCH. 3. DELETED 4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY FROM PACKAGE BODY. 3 B K 2 (FLANGE) D bbb T A M B M M M R (INSULATOR) bbb N M T A M B M ccc M T A M M aaa M T A M ccc B S (LID) H (LID) M T A M B M (INSULATOR) B M C F E A T A SEATING PLANE INCHES MIN MAX 1.335 1.345 0.380 0.390 0.125 0.170 0.495 0.505 0.035 0.045 0.003 0.006 1.100 BSC 0.057 0.067 0.170 0.210 0.774 0.786 0.772 0.788 .118 .138 0.365 0.375 0.365 0.375 0.005 REF 0.010 REF 0.015 REF MILLIMETERS MIN MAX 33.91 34.16 9.65 9.91 3.18 4.32 12.57 12.83 0.89 1.14 0.08 0.15 27.94 BSC 1.45 1.70 4.32 5.33 19.66 19.96 19.60 20.00 3.00 3.51 9.27 9.53 9.27 9.52 0.127 REF 0.254 REF 0.381 REF STYLE 1: PIN 1. DRAIN 2. GATE 3. SOURCE CASE 465 - 06 ISSUE G NI - 780 MRF7S21110HR3 (FLANGE) DIM A B C D E F G H K M N Q R S aaa bbb ccc 4X U (FLANGE) 4X Z (LID) B 1 K 2X 2 B (FLANGE) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M−1994. 2. CONTROLLING DIMENSION: INCH. 3. DELETED 4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY FROM PACKAGE BODY. D bbb M T A M B M N ccc M R (LID) M T A M B M ccc M T A M M B M aaa M T A M S (INSULATOR) bbb M T A (LID) B M (INSULATOR) B M H C 3 E A A F T (FLANGE) SEATING PLANE CASE 465A - 06 ISSUE H NI - 780S MRF7S21110HSR3 DIM A B C D E F H K M N R S U Z aaa bbb ccc INCHES MIN MAX 0.805 0.815 0.380 0.390 0.125 0.170 0.495 0.505 0.035 0.045 0.003 0.006 0.057 0.067 0.170 0.210 0.774 0.786 0.772 0.788 0.365 0.375 0.365 0.375 −−− 0.040 −−− 0.030 0.005 REF 0.010 REF 0.015 REF MILLIMETERS MIN MAX 20.45 20.70 9.65 9.91 3.18 4.32 12.57 12.83 0.89 1.14 0.08 0.15 1.45 1.70 4.32 5.33 19.61 20.02 19.61 20.02 9.27 9.53 9.27 9.52 −−− 1.02 −−− 0.76 0.127 REF 0.254 REF 0.381 REF STYLE 1: PIN 1. DRAIN 2. GATE 5. SOURCE MRF7S21110HR3 MRF7S21110HSR3 10 RF Device Data Freescale Semiconductor PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes • AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices REVISION HISTORY The following table summarizes revisions to this document. Revision Date Description 0 Sept. 2007 • Initial Release of Data Sheet 1 July 2008 • Added Input Signal in front of PAR for consistency throughout data sheet p. 2, 6, 7, 8 • Corrected Table 4, Typical Performances, Output Power Variation over Temperature value from 0.276 to 0.028, p. 3 • Updated Fig. 14, CCDF W - CDMA 3GPP, Test Model 1, 64 DPCH, 50% Clipping, Single - Carrier Test Signal, to better represent production test signal, p. 8 MRF7S21110HR3 MRF7S21110HSR3 RF Device Data Freescale Semiconductor 11 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. 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Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007-2008. All rights reserved. MRF7S21110HR3 MRF7S21110HSR3 Document Number: MRF7S21110H Rev. 1, 7/2008 12 RF Device Data Freescale Semiconductor