FREESCALE MRF7S18170HR3

Freescale Semiconductor
Technical Data
Document Number: MRF7S18170H
Rev. 0, 10/2006
RF Power Field Effect Transistors
MRF7S18170HR3
MRF7S18170HSR3
N - Channel Enhancement - Mode Lateral MOSFETs
Designed for CDMA base station applications with frequencies from 1805 to
1880 MHz. Suitable for CDMA and multicarrier amplifier applications. To be
used in Class AB and Class C for PCN - PCS/cellular radio and WLL
applications.
• Typical Single - Carrier W - CDMA Performance: VDD = 28 Volts, IDQ =
1400 mA, Pout = 50 Watts Avg., Full Frequency Band, 3GPP Test Model 1,
64 DPCH with 50% Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCDF.
Power Gain — 17.5 dB
Drain Efficiency — 31%
Device Output Signal PAR — 6.2 dB @ 0.01% Probability on CCDF
ACPR @ 5 MHz Offset — - 37 dBc in 3.84 MHz Channel Bandwidth
• Capable of Handling 5:1 VSWR, @ 32 Vdc, 1840 MHz, 170 Watts CW
Peak Tuned Output Power
• Pout @ 1 dB Compression Point w 170 Watts CW
Features
• 100% PAR Tested for Guaranteed Output Power Capability
• Characterized with Series Equivalent Large - Signal Impedance Parameters
• Internally Matched for Ease of Use
• Integrated ESD Protection
• Greater Negative Gate - Source Voltage Range for Improved Class C
Operation
• Designed for Digital Predistortion Error Correction Systems
• RoHS Compliant
• In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel.
1805 - 1880 MHz, 50 W AVG., 28 V
SINGLE W - CDMA
LATERAL N - CHANNEL
RF POWER MOSFETs
CASE 465B - 03, STYLE 1
NI - 880
MRF7S18170HR3
CASE 465C - 02, STYLE 1
NI - 880S
MRF7S18170HSR3
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain - Source Voltage
VDSS
- 0.5, +65
Vdc
Gate - Source Voltage
VGS
- 6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
- 65 to +150
°C
TC
150
°C
TJ
225
°C
Symbol
Value (2,3)
Unit
Case Operating Temperature
Operating Junction Temperature
(1,2)
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 84°C, 170 W CW
Case Temperature 79°C, 50 W CW
RθJC
0.27
0.30
°C/W
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access the MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes - AN1955.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
RF Device Data
Freescale Semiconductor
MRF7S18170HR3 MRF7S18170HSR3
1
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22 - A114)
IA (Minimum)
Machine Model (per EIA/JESD22 - A115)
B (Minimum)
Charge Device Model (per JESD22 - C101)
IV (Minimum)
Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
μAdc
Gate - Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
μAdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 372 μAdc)
VGS(th)
1.2
2
2.7
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, ID = 1400 mAdc)
VGS(Q)
—
2.7
—
Vdc
Fixture Gate Quiescent Voltage (1)
(VDS = 28 Vdc, ID = 1400 mAdc, Measured in Functional Test)
VGG(Q)
4
5.4
7.6
Vdc
Drain - Source On - Voltage
(VGS = 10 Vdc, ID = 3.72 Adc)
VDS(on)
0.1
0.15
0.3
Vdc
Reverse Transfer Capacitance
(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Crss
—
0.87
—
pF
Output Capacitance
(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Coss
—
703
—
pF
Off Characteristics
On Characteristics
Dynamic Characteristics (2)
Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, Pout = 50 W Avg., f = 1807.5 MHz and f =
1877.5 MHz, Single - Carrier W - CDMA, 3GPP Test Model 1, 64 DPCH, 50% Clipping, PAR = 7.5 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
Gps
16
17.5
19
dB
Drain Efficiency
ηD
29
31
—
%
5.8
5.7
6.2
6.2
—
—
ACPR
—
- 37
- 35
dBc
IRL
—
- 15
-9
dB
Output Peak - to - Average Ratio @ 0.01% Probability on CCDF
MRF7S18170HR3
MRF7S18170HSR3
Adjacent Channel Power Ratio
Input Return Loss
PAR
dB
1. VGG = 2 x VGS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit
schematic.
2. Part internally matched both on input and output.
(continued)
MRF7S18170HR3 MRF7S18170HSR3
2
RF Device Data
Freescale Semiconductor
Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Typical Performances (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, 1805 - 1880 MHz Bandwidth
Video Bandwidth
(Tone Spacing from 100 kHz to VBW)
ΔIMD3 = IMD3 @ VBW frequency - IMD3 @ 100 kHz <1 dBc (both
sidebands)
VBW
MHz
—
25
—
Gain Flatness in 75 MHz Bandwidth @ Pout = 170 W CW
GF
—
0.4
—
dB
Deviation from Linear Phase in 75 MHz Bandwidth @ Pout = 170 W CW
Φ
—
2.5
—
°
Delay
—
4.2
—
ns
Part - to - Part Insertion Phase Variation @ Pout = 170 W CW,
f = 1840 MHz
ΔΦ
—
15
—
°
Gain Variation over Temperature
ΔG
—
0.015
—
dB/°C
ΔP1dB
—
0.01
—
dBm/°C
Group Delay @ Pout = 170 W CW, f = 1840 MHz
Output Power Variation over Temperature
MRF7S18170HR3 MRF7S18170HSR3
RF Device Data
Freescale Semiconductor
3
Z16
R3
VBIAS
VSUPPLY
+
R2
RF
INPUT
C4
C3
C2
Z5
C10
Z2
Z3
Z4
C19
Z8
Z6
C1
C18
C11
C12
C13
Z7
R1
Z1
C17
Z9
Z10
Z11
Z12
C9
Z13
RF
OUTPUT
Z15
Z14
DUT
C20
C14
C15
C8
Z17
C5
Z1
Z2*
Z3*
Z4
Z5
Z6
Z7
Z8
Z9
0.410″ x 0.083″ Microstrip
0.480″ x 0.083″ Microstrip
0.710″ x 0.083″ Microstrip
0.180″ x 0.147″ Microstrip
0.850″ x 0.091″ Microstrip
0.383″ x 1.109″ Microstrip
1.110″ x 1.360″ Microstrip
0.480″ x 1.360″ Microstrip
0.060″ x 1.098″ Microstrip
Z10*
Z11*
Z12
Z13
Z14*
Z15*
Z16, Z17
PCB
C16
C6
C7
0.900″ x 0.161″ Microstrip
0.140″ x 0.161″ Microstrip
0.094″ x 0.220″ Microstrip
0.070″ x 0.220″ Microstrip
0.140″ x 0.083″ Microstrip
0.160″ x 0.083″ Microstrip
1.120″ x 0.080″ Microstrip
Taconic TLX8 - 0300, 0.030″, εr = 2.55
* Variable for tuning
Figure 1. MRF7S18170HR3 Test Circuit Schematic — NI - 880
Table 5. MRF7S18170HR3 Test Circuit Component Designations and Values — NI - 880
Part
Description
Part Number
Manufacturer
C1
0.8 pF Chip Capacitor
100B0R8BW
ATC
C2, C8, C9
6.8 pF Chip Capacitors
100B6R8BW
ATC
C3
100 pF Chip Capacitor
100B101JW
ATC
C4
100 nF Chip Capacitor
100B104JW
ATC
C5, C10
5.6 pF Chip Capacitors
100B5R6BW
ATC
C6, C7, C11, C12
10 μF Chip Capacitors
C5750X5R1H106MT
TDK
C13
470 μF, 63 V Electrolytic Capacitor, Radial
13661471
Philips
C14
0.5 pF Chip Capacitor
600B0R5BW
ATC
C15, C20
0.2 pF Chip Capacitors
100B0R2BW
ATC
C16, C17
4.7 pF Chip Capacitors
100B4R7BW
ATC
C18
2 pF Chip Capacitor
600B2R0BW
ATC
C19
0.3 pF Chip Capacitor
100B0R3BW
ATC
R1
10 W, 1/4 W Chip Resistor
232272461009
Phycomp
R2, R3
10 kW, 1/4 W Chip Resistors
232272461003
Phycomp
MRF7S18170HR3 MRF7S18170HSR3
4
RF Device Data
Freescale Semiconductor
R2
R3
C13
C4
C3
C2
C17
C10
C11
C12
R1
C9
C18
CUT OUT AREA
C1
C19
C20
C8
C15
C14
C5
C16
C6
C7
MRF7S18170H
Rev. 4
Figure 2. MRF7S18170HR3 Test Circuit Component Layout — NI - 880
MRF7S18170HR3 MRF7S18170HSR3
RF Device Data
Freescale Semiconductor
5
Z16
R3
VBIAS
VSUPPLY
+
R2
RF
INPUT
C4
C3
C2
Z5
C10
Z2
Z3
Z4
C19
Z8
Z6
C1
C18
C11
C12
C13
Z7
R1
Z1
C17
Z9
Z10
Z11
Z12
C9
Z13
RF
OUTPUT
Z15
Z14
DUT
C20
C14
C15
C8
Z17
C5
Z1*
Z2*
Z3*
Z4
Z5
Z6
Z7
Z8
Z9
0.500″ x 0.083″ Microstrip
0.290″ x 0.083″ Microstrip
0.810″ x 0.083″ Microstrip
0.180″ x 0.147″ Microstrip
0.850″ x 0.091″ Microstrip
0.383″ x 1.109″ Microstrip
1.110″ x 1.360″ Microstrip
0.480″ x 1.360″ Microstrip
0.060″ x 1.098″ Microstrip
Z10*
Z11*
Z12
Z13
Z14*
Z15*
Z16, Z17
PCB
C16
C6
C7
0.900″ x 0.161″ Microstrip
0.140″ x 0.161″ Microstrip
0.094″ x 0.220″ Microstrip
0.070″ x 0.220″ Microstrip
0.140″ x 0.083″ Microstrip
0.160″ x 0.083″ Microstrip
1.120″ x 0.080″ Microstrip
Taconic TLX8 - 0300, 0.030″, εr = 2.55
* Variable for tuning
Figure 3. MRF7S18170HSR3 Test Circuit Schematic — NI - 880S
Table 6. MRF7S18170HSR3 Test Circuit Component Designations and Values — NI - 880S
Part
Description
Part Number
Manufacturer
C1
0.8 pF Chip Capacitor
100B0R8BW
ATC
C2, C8, C9
6.8 pF Chip Capacitors
100B6R8BW
ATC
C3
100 pF Chip Capacitor
100B101JW
ATC
C4
100 nF Chip Capacitor
100B104JW
ATC
C5, C10
5.6 pF Chip Capacitors
100B5R6BW
ATC
C6, C7, C11, C12
10 μF Chip Capacitors
C5750X5R1H106MT
TDK
C13
470 μF, 63 V Electrolytic Capacitor, Radial
13661471
Philips
C14
0.5 pF Chip Capacitor
600B0R5BW
ATC
C15
0.2 pF Chip Capacitor
100B0R2BW
ATC
C16, C17
4.7 pF Chip Capacitors
100B4R7BW
ATC
C18
2 pF Chip Capacitor
600B2R0BW
ATC
C19
0.3 pF Chip Capacitor
100B0R3BW
ATC
C20
0.1 pF Chip Capacitor
100B0R2BW
ATC
R1
10 W, 1/4 W Chip Resistor
232272461003
Phycomp
R2, R3
10 kW, 1/4 W Chip Resistors
232272461009
Phycomp
MRF7S18170HR3 MRF7S18170HSR3
6
RF Device Data
Freescale Semiconductor
R2
R3
C13
C4
C3
C2
C17
C10
C11
C12
R1
C9
C18
C19
C20
CUT OUT AREA
C1
C8
C15
C14
C5
C16
C6
C7
MRF7S18170H
Rev. 4
Figure 4. MRF7S18170HSR3 Test Circuit Component Layout — NI - 880S
MRF7S18170HR3 MRF7S18170HSR3
RF Device Data
Freescale Semiconductor
7
Gps
Gps, POWER GAIN (dB)
17
34
ηD
16
32
15
30
VDD = 28 Vdc, Pout = 50 W (Avg.), IDQ = 1400 mA
Single−Carrier W−CDMA, 3.84 MHz Channel
Bandwidth, PAR = 7.5 dB @ 0.01% Probability (CCDF)
14
13
12
PARC
28
−5
−1
−8
−1.7
11
−2.4
−11
−14
IRL
10
1760 1780
1800 1820
1840 1860 1880 1900
−3.1
1940
1920
−17
IRL, INPUT RETURN LOSS (dB)
36
PARC (dB)
18
ηD, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
f, FREQUENCY (MHz)
44
VDD = 28 Vdc, Pout = 80 W (Avg.)
IDQ = 1400 mA, Single−Carrier W−CDMA
16
15
42
ηD
40
3.84 MHz Channel Bandwidth
PAR = 7.5 dB @ 0.01% Probability (CCDF)
14
13
12
PARC
38
−5
−2.7
−8
−3.4
11
−4.1
−11
−14
IRL
10
1760
1780 1800
1820
1840
1860
1880 1900
−4.8
1920 1940
−17
IRL, INPUT RETURN LOSS (dB)
Gps, POWER GAIN (dB)
17
46
Gps
PARC (dB)
18
ηD, DRAIN
EFFICIENCY (%)
Figure 5. Output Peak - to - Average Ratio Compression (PARC)
Broadband Performance @ Pout = 50 Watts Avg.
f, FREQUENCY (MHz)
Figure 6. Output Peak - to - Average Ratio Compression (PARC)
Broadband Performance @ Pout = 80 Watts Avg.
19
−10
1750 mA
18
Gps, POWER GAIN (dB)
IMD, THIRD ORDER
INTERMODULATION DISTORTION (dBc)
IDQ = 2100 mA
1400 mA
17
1050 mA
16
700 mA
15
VDD = 28 Vdc, f1 = 1835 MHz, f2 = 1845 MHz
Two−Tone Measurements, 10 MHz Tone Spacing
14
−20
IDQ = 700 mA
−30
1050 mA
2100 mA
−40
1750 mA
−50
1400 mA
VDD = 28 Vdc, f1 = 1835 MHz, f2 = 1845 MHz
Two−Tone Measurements, 10 MHz Tone Spacing
−60
1
10
100
Pout, OUTPUT POWER (WATTS) PEP
Figure 7. Two - Tone Power Gain versus
Output Power
400
1
10
100
400
Pout, OUTPUT POWER (WATTS) PEP
Figure 8. Third Order Intermodulation Distortion
versus Output Power
MRF7S18170HR3 MRF7S18170HSR3
8
RF Device Data
Freescale Semiconductor
−10
IMD, INTERMODULATION DISTORTION (dBc)
VDD = 28 Vdc, IDQ = 1400 mA
f1 = 1835 MHz, f2 = 1845 MHz
Two−Tone Measurements, 10 MHz Tone Spacing
−20
−30
−40
3rd Order
−50
5th Order
7th Order
−60
1
100
10
0
VDD = 28 Vdc, Pout = 170 W (PEP)
IDQ = 1400 mA, Two−Tone Measurements
(f1 + f2)/2 = Center Frequency of 1840 MHz
−5
−10
−15
−20
−25
IM3−U
−30
IM3−L
−35
IM5−U
−40
IM5−L
−45
−50
−55
IM7−L
IM7−U
10
1
400
100
Pout, OUTPUT POWER (WATTS) PEP
TWO−TONE SPACING (MHz)
Figure 9. Intermodulation Distortion Products
versus Output Power
Figure 10. Intermodulation Distortion
Products versus Tone Spacing
OUTPUT COMPRESSION AT THE 0.01%
PROBABILITY ON CCDF (dB)
1
50
Ideal
0
45
−1
40
−1 dB = 47.811 W
−2
35
−2 dB = 64.519 W
−3
30
−3 dB = 84.995 W
Actual
−4
25
VDD = 28 Vdc, IDQ = 1400 mA
f = 1840 MHz, Input PAR = 7.5 dB
−5
30
45
60
75
90
105
ηD, DRAIN EFFICIENCY (%)
IMD, INTERMODULATION DISTORTION (dBc)
TYPICAL CHARACTERISTICS
20
120
Pout, OUTPUT POWER (WATTS)
VDD = 28 Vdc, IDQ = 1400 mA, f = 1840 MHz
Single−Carrier W−CDMA, PAR = 7.5 dB, ACPR @
5 MHz Offset in 3.84 MHz Integrated Bandwidth
−30
−40
Uncorrected, Upper and Lower
−50
DPD Corrected, No Memory
Correction
−60
−70
40
DPD Corrected,
with Memory Correction
Gps
18
TC = −30_C
25_C
40
17
85_C
16
30
15
20
14
VDD = 28 Vdc
IDQ = 1400 mA
f = 1840 MHz
ηD
13
41
42
43
44
45
46
47
48
49
50
Pout, OUTPUT POWER (dBm)
Figure 12. Digital Predistortion Correction versus
ACPR and Output Power
60
−30_C 25_C
85_C 50
1
10
100
10
ηD, DRAIN EFFICIENCY (%)
19
−20
Gps, POWER GAIN (dB)
ACPR, UPPER AND LOWER RESULTS (dBc)
Figure 11. Output Peak - to - Average Ratio
Compression (PARC) versus Output Power
0
400
Pout, OUTPUT POWER (WATTS) CW
Figure 13. Power Gain and Drain Efficiency
versus CW Output Power
MRF7S18170HR3 MRF7S18170HSR3
RF Device Data
Freescale Semiconductor
9
TYPICAL CHARACTERISTICS
18
109
MTTF FACTOR (HOURS X AMPS2)
Gps, POWER GAIN (dB)
IDQ = 1400 mA
f = 1840 MHz
17
16
15
VDD = 24 V
28 V
100
107
32 V
106
90
14
0
108
200
300
110
130
150
170
190
210
230
250
TJ, JUNCTION TEMPERATURE (°C)
Pout, OUTPUT POWER (WATTS) CW
Figure 14. Power Gain versus Output Power
This above graph displays calculated MTTF in hours x ampere2
drain current. Life tests at elevated temperatures have correlated to
better than ±10% of the theoretical prediction for metal failure. Divide
MTTF factor by ID2 for MTTF in a particular application.
Figure 15. MTTF Factor versus Junction Temperature
W - CDMA TEST SIGNAL
100
−10
3.84 MHz
Channel BW
−20
10
1
−40
Output Signal
Input Signal
−50
0.1
(dB)
PROBABILITY (%)
−30
0.01
−70
W−CDMA. ACPR Measured in 3.84 MHz
Channel Bandwidth @ ±5 MHz Offset.
PAR = 7.5 dB @ 0.01% Probability on
CCDF
0.001
−80
2
4
6
−ACPR in 3.84 MHz
Integrated BW
−90
0.0001
0
−60
8
10
PEAK−TO−AVERAGE (dB)
Figure 16. CCDF W - CDMA 3GPP, Test Model 1,
64 DPCH, 50% Clipping, Single - Carrier Test Signal
−ACPR in 3.84 MHz
Integrated BW
−100
−110
−9
−7.2 −5.4 −3.6 −1.8
0
1.8
3.6
5.4
7.2
9
f, FREQUENCY (MHz)
Figure 17. Single - Carrier W - CDMA Spectrum
MRF7S18170HR3 MRF7S18170HSR3
10
RF Device Data
Freescale Semiconductor
Zo = 10 Ω
f = 1920 MHz
Zload
f = 1760 MHz
f = 1760 MHz
Zsource
f = 1920 MHz
VDD = 28 Vdc, IDQ = 1400 mA, Pout = 50 W Avg.
f
MHz
Zsource
W
Zload
W
1760
1.93 - j6.00
1.13 - j2.65
1780
1.95 - j6.10
1.05 - j2.45
1800
1.99 - j6.18
0.97 - j2.29
1820
1.95 - j6.22
0.90 - j2.12
1840
1.85 - j6.30
0.85 - j2.00
1860
1.71 - j6.26
0.81 - j1.84
1880
1.55 - j6.25
0.75 - j1.70
1900
1.39 - j6.20
0.70 - j1.54
1920
1.23 - j6.15
0.67 - j1.38
Zsource = Test circuit impedance as measured from
gate to ground.
Zload
= Test circuit impedance as measured
from drain to ground.
Output
Matching
Network
Device
Under
Test
Input
Matching
Network
Z
source
Z
load
Figure 18. Series Equivalent Source and Load Impedance
MRF7S18170HR3 MRF7S18170HSR3
RF Device Data
Freescale Semiconductor
11
ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS
60
61
58
P3dB = 53.8 dBm (240 W)
57
56
P1dB = 52.8 dBm (190 W)
55
54
Actual
53
VDD = 28 Vdc, IDQ = 1400 mA
Pulsed CW, 12 μsec(on),
10% Duty Cycle, f = 1840 MHz
52
51
59
P3dB = 54.65 dBm (290 W)
58
57
P1dB = 54.05 dBm
(254.1 W)
56
55
Actual
54
VDD = 32 Vdc, IDQ = 1400 mA
Pulsed CW, 12 μsec(on),
10% Duty Cycle, f = 1840 MHz
53
52
50
Ideal
P6dB = 55 dBm (316.23 W)
60
Pout, OUTPUT POWER (dBm)
P6dB = 54.1 dBm (257 W)
59
Pout, OUTPUT POWER (dBm)
Ideal
51
32
33
34
35
36
37
38
39
40
41
42
43
44
32
33
34
Pin, INPUT POWER (dBm)
36
37
38
39
40
41
42
43
44
Pin, INPUT POWER (dBm)
NOTE: Measured in a Peak Tuned Load Pull Fixture
NOTE: Measured in a Peak Tuned Load Pull Fixture
Test Impedances per Compression Level
3dB
35
Zsource
Ω
Zload
Ω
1.23 - j7.91
0.88 - j2.81
Figure 19. Pulsed CW Output Power
versus Input Power
Test Impedances per Compression Level
P3dB
Zsource
Ω
Zload
Ω
1.23 - j7.91
1.03 - j2.65
Figure 20. Pulsed CW Output Power
versus Input Power
MRF7S18170HR3 MRF7S18170HSR3
12
RF Device Data
Freescale Semiconductor
PACKAGE DIMENSIONS
B
4
G
2X
1
Q
bbb
M
T A
M
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M−1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION H IS MEASURED 0.030 (0.762) AWAY
FROM PACKAGE BODY.
4. RECOMMENDED BOLT CENTER DIMENSION OF
1.16 (29.57) BASED ON M3 SCREW.
M
B
(FLANGE)
3
K
2
bbb
D
T A
M
M
B
M
M
bbb
M
T A
M
B
M
ccc
M
T A
M
B
M
N
R
(INSULATOR)
ccc
M
T A
M
aaa
M
T A
M
B
S
(LID)
(LID)
M
(INSULATOR)
B
M
H
C
T
A
A
INCHES
MIN
MAX
1.335
1.345
0.535
0.545
0.147
0.200
0.495
0.505
0.035
0.045
0.003
0.006
1.100 BSC
0.057
0.067
0.175
0.205
0.872
0.888
0.871
0.889
.118
.138
0.515
0.525
0.515
0.525
0.007 REF
0.010 REF
0.015 REF
MILLIMETERS
MIN
MAX
33.91
34.16
13.6
13.8
3.73
5.08
12.57
12.83
0.89
1.14
0.08
0.15
27.94 BSC
1.45
1.70
4.44
5.21
22.15
22.55
19.30
22.60
3.00
3.51
13.10
13.30
13.10
13.30
0.178 REF
0.254 REF
0.381 REF
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
F
E
DIM
A
B
C
D
E
F
G
H
K
M
N
Q
R
S
aaa
bbb
ccc
SEATING
PLANE
CASE 465B - 03
ISSUE D
NI - 880
MRF7S18170HR3
(FLANGE)
B
1
B
(FLANGE)
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M−1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION H IS MEASURED 0.030 (0.762) AWAY
FROM PACKAGE BODY.
2
bbb
M
D
T A
M
B
M
M
bbb
M
T A
M
B
M
T A
M
B
ccc
M
N
ccc
R
(INSULATOR)
M
T A
M
S
(LID)
aaa
M
B
M
T A
M
B
(LID)
M
(INSULATOR)
M
H
C
F
E
T
A
A
SEATING
PLANE
(FLANGE)
CASE 465C - 02
ISSUE D
NI - 880S
MRF7S18170HSR3
DIM
A
B
C
D
E
F
H
K
M
N
R
S
aaa
bbb
ccc
INCHES
MIN
MAX
0.905
0.915
0.535
0.545
0.147
0.200
0.495
0.505
0.035
0.045
0.003
0.006
0.057
0.067
0.170
0.210
0.872
0.888
0.871
0.889
0.515
0.525
0.515
0.525
0.007 REF
0.010 REF
0.015 REF
MILLIMETERS
MIN
MAX
22.99
23.24
13.60
13.80
3.73
5.08
12.57
12.83
0.89
1.14
0.08
0.15
1.45
1.70
4.32
5.33
22.15
22.55
19.30
22.60
13.10
13.30
13.10
13.30
0.178 REF
0.254 REF
0.381 REF
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
MRF7S18170HR3 MRF7S18170HSR3
RF Device Data
Freescale Semiconductor
13
PRODUCT DOCUMENTATION
Refer to the following documents to aid your design process.
Application Notes
• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Oct. 2006
Description
• Initial Release of Data Sheet
MRF7S18170HR3 MRF7S18170HSR3
14
RF Device Data
Freescale Semiconductor
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MRF7S18170HR3 MRF7S18170HSR3
Document
Number:
RF
Device
DataMRF7S18170H
Rev. 0, 10/2006
Freescale
Semiconductor
15