FUJITSU MB1507

September 1995
Edition 4.0a
DATA SHEET
MB1507
SERIAL INPUT PLL FREQUENCY SYNTHESIZER
SERIAL INPUT PLL FREQUENCY SYNTHESIZER
WITH 2.0GHZ PRESCALER
The Fujitsu MB1507 is a single chip serial input PLL frequency synthesizer designed for
Broadcast Satelite tuner and cellular telephone applications.
It contains a 2.0 GHZ dual modulus prescaler which enables pulse swallow function, and an
analog switch to speed up lock up time.
It operates supply voltage of 5.0V typ. and dissipates 18mA typ. of current realized through the
use of Fujitsu’s unique U-ESBIC Bi-CMOS technology.
•
•
•
•
•
•
•
•
•
High operating frequency: fIN MAX=2.0GHZ (PIN MIN=–4dBm)
Pulse swallow function: 128/129 or 256/257
Low supply current: ICC=18mA typ.
Serial input 19-bit programmable divider consisting of:
Binary 8-bit swallow counter: 0 to 255
Binary 11-bit programmable counter: 16 to 2047
Serial input 15-bit programmable reference divider consisting of:
Binary 14-bit programmable reference counter: 8 to 16383
1-bit switch counter (SW) Sets divide ratio of prescaler
On-chip analog switch achieves fast lock up time
PLASTIC PACKAGE
FPT-16P-M06
2types of phase detector output
On-chip charge pump (Bipolar type)
Output for external charge pump
Wide operating temperature: –40°C to +85°C
PIN ASSIGNMENT
16-pin Plastic Flat Package (Suffix: –PF)
Power Supply Voltage
ØP
VP
3
14
fOUT
VCC
4
13
BISW
12
FC
DO
5
Value
Unit
GND
6
11
LE
–0.5 to +7.0
V
LD
7
10
Data
fIN
8
9
Clock
VCC to 10.0
V
–0.5 to VCC +0.5
V
Open-drain Voltage
VOOP
–0.5 to 8.0
V
Output Current
IOUT
+10
mA
Storage Temperature
TSTG
–55 to +125
°C
VP
Permanent device damage may occur if the above Absolute Maximum Ratings
are exceeded. Functional operation should be restricted to the conditions as
detailed in the operational sections of this data sheet. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
 1995
ØR
15
VCC
VOUT
Copyright
16
2
Symbol
Output Voltage
NOTE:
1
TOP VIEW
ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating
OSCIN
OSCOUT
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance circuit.
FUJITSU LIMITED and FUJITJU MICROELECTRONICS, INC.
1
MB1507
MB1507 BLOCK DIAGRAM
OSCIN
1
CRYSTAL
OSCILLATOR
OSCOUT
16-BIT SHIFT REGISTER
15 P
2
MONITOR
FREQUENCY
CHANGING
CIRCUIT
15-BIT LATCH
VP
VCC
16 R
PHASE
COMPARATOR
16-BIT SHIFT REGISTER
15-BIT LATCH
3
PROGRAMMABLE REFERENCE
DIVIDER
4
BINARY 14-BIT
REFERENCE COUNTER
CHARGE
PUMP
14 fOUT
ANALOG
SWITCH
13 BISW
fr
DO
S
W
LE
12 FC
DO
5
GND
6
LD
7
11 LE
CONTROL
1-BIT
LATCH
20-BIT SHIFT REGISTER
10 Data
20-BIT SHIFT REGISTER
9
19-BIT LATCH
8-BIT LATCH
fIN
8
PRESCALER
11-BIT LATCH
PROGRAMMABLE DIVIDER
BINARY 8-BIT
SWALLOW
COUNTER
BINARY 11-BIT
PROGRAMMABLE
COUNTER
CONTROL CIRCUIT
2
fp
Clock
MB1507
PIN DESCRIPTION
Pin No.
Pin Name
I/O
1
2
OSCIN
OSCOUT
I
O
Oscillator input.
Oscillator output.
A crystal is placed between OSCIN and OSCOUT.
3
VP
–
Power supply input for charge pump and analog switch.
4
VCC
–
Power supply voltage input.
5
DO
O
Charge pump output.
The characteristics of charge pump is reversed depending upon FC input.
6
GND
–
Ground.
7
LD
O
Phase comparator output.
Normally the output level is high level. While the phase difference of fr and fp exists, the output becomes low level.
8
fIN
I
Prescaler input.
The connection with VCO should be AC connection.
9
Clock
I
Clock input for 20-bit shift register and 16-bit shift register.
On rising edge of the clock shifts one bit of data into the shift registers.
Binary serial data input.
The last bit of the data is a control bit which specified destination of shift registers. When this bit is
high level and LE is high level, the data stored in shift register is transferred to 15-bit latch. When
this bit is low level and LE is high level, the data is transferred to 19-bit latch.
Description
10
Data
I
11
LE
I
12
FC
I
Phase select input of phase comparator (with pull up resistor).
When FC is low level, the characteristics of charge pump, phase comparator is reversed.
FC pin input signal controls fout pin (test pin) output level, fr or fp.
13
BISW
O
Analog switch output.
Usually BISW pin is set high-impedance state. When internal analog switch is ON (LE pin is high
level), this pin outputs internal charge pump output.
Monitor pin of phase comparator input.
fout pin outputs programmable reference divider output (fr) or programmable divider output (fp) depending upon FC pin input level.
FC=H: It is the same as fr output level.
FC=L: It is the same as fp output level.
14
fOUT
O
15
16
ØP
ØR
O
O
Load enable input (with pull up resistor).
When LE is high or open, the data stored in shift register is transferred into latch depending upon the
control bit. At the time, internal charge pump output to be connected to BISW pin because internal
analog switch becomes ON state.
Outputs for external charge pump.
The characteristics are reversed according to FC input.
∅P pin is N-channel open drain output.
3
MB1507
FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT
Serial data input is achieved by three inputs, such as Data pin, Clock pin and LE pin. Serial data input controls 15–bit programmable reference divider
and 19–bit programmable divider, respectively.
Binary serial data is input to Data pin.
On rising edge of clock shifts one bit of serial data into the internal shift registers and when load enable pin is high level or open, stored data is
transferred into latch depending upon the control bit.
Control data ”H” data is transferred into 15–bit latch.
Control data ”L” data is transferred into 19–bit latch.
THE DIVIDE RATIO SETTING
fVCO=[(MxN)+A]xfOSC÷R
fVCO: Output frequency of external voltage controlled oscillator (VCO)
M:
Preset modulus of external dual modulus prescaler (128 or 256)
N:
Preset divide ratio of binary 11-bit programmable counter (16 to 2047)
A:
Preset divide ratio of binary 8-bit swallow counter (0≤A≤255, A<N)
fOSC: Output frequency of the external reference frequency oscillator
R:
Preset divide ratio of binary 14-bit programmable reference counter (8 to 16383)
PROGRAMMABLE REFERENCE DIVIDER
Programmable reference divider consists of 16-bit shift register, 15-bit latch and 14-bit reference counter. Serial 16-bit data format is shown below.
Control bit
LSB
C
Divide ratio of prescaler setting bit
MSB
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
W
Divide ratio of programmable reference counter setting bit
14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO
Divide
Ratio
R
S
S
S
S
S
S
S
S
S
S
S
S
S
S
14
13
12
11
10
9
8
7
6
5
4
3
2
1
8
0
0
0
0
0
0
0
0
0
0
1
0
0
0
9
0
0
0
0
0
0
0
0
0
0
1
0
0
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
16383
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NOTES: Divide ratio less than 8 is prohibited.
Divide ratio: 8 to 16383
SW: This bit selects divide ratio of prescaler.
SW=H : 128/129
SW=L : 256/257
S1 to S14: These bits select divide ratio of programmable reference divider.
C: Control bit (sets as high level).
Data is input from MSB side.
4
MB1507
PROGRAMMABLE DIVIDER
Programmable divider consists of 20-bit shift register, 19-bit latch, 8-bit swallow counter and 11-bit programmable counter.
Serial 20-bit data format is shown below.
Control bit
LSB
C
MSB
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Divide ratio of swallow counter
setting bit
Divide ratio of programmable counter
setting bit
8-BIT SWALLOW COUNTER DIVIDE RATIO
Divide
Ratio
A
S
S
S
S
S
S
S
S
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
•
•
•
•
•
•
•
•
•
255
1
1
1
1
1
1
1
1
NOTE:
Divide ratio: 0 to 255
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO
Divide
Ratio
N
S
S
S
S
S
S
S
S
S
S
S
19
18
17
16
15
14
13
12
11
10
9
16
0
0
0
0
0
0
1
0
0
0
0
17
0
0
0
0
0
0
1
0
0
0
1
•
•
•
•
•
•
•
•
•
•
•
•
2047
1
1
1
1
1
1
1
1
1
1
1
NOTES: Divide ratio less than 16 is prohibited.
Divide ratio: 16 to 2047
S1 to S8: Swallow counter divide ratio setting bit. (0 to 255)
S9 to S19: Programmable counter divide ratio setting bit. (16 to 2047)
C: Control bit (sets to low level).
Data is input from MSB side.
5
MB1507
SERIAL DATA INPUT TIMING
t1, t2, t3, t4, t5≥1µs
Data
S19=MSB
*(SW)
S18
S11 S10
(S14)
(S7)
(S6)
S1=LSB
C: CONTROL BIT
(S1)
(C: CONTROL BIT)
Clock
LE
t1
t3
t2
t4
t5
NOTES: Parenthesis data is used for setting divide ratio of programmable reference divider.
On rising edge of clock shifts one bit of data into the shift register.
PHASE CHARACTERISTICS
VCO POLARITY
FC pin is provided to change phase polarity of phase comparator. Characteristics of internal charge pump output level (DO), phase comparator output level
FC=H or open
Note:
FC=L
DO
ØR
ØP
fout
DO
ØR
ØP
fout
fr>fp
H
L
L
(fr)
L
H
Z
(fp)
fr=fp
Z
L
Z
(fr)
Z
L
Z
(fp)
fr<fp
L
H
Z
(fr)
H
L
L
(fp)
Z=(High impedance)
Depending upon VCO polarity, FC pin should be set accordingly:
When VCO polarity are like 1 , FC should be set High or open circuit;
When VCO polarity are like 2 , FC should be set Low.
6
1
VCO OUTPUT FREQUENCY
(ØR, ØP) are reversed depending upon FC pin input level. Also, monitor pin
(fout) output level of phase comparator is controlled by FC pin input level.
2
VCO INPUT VOLTAGE
MB1507
PHASE DETECTOR OUTPUT WAVEFORM (FC=High)
fr
fP
LD
H
Z
DO
L
fr>fp
fr=fp
fr<fp
fr<fp
fr<fp
NOTES: Phase difference detection range: –2π to +2π
Spike appearance depends on charge pump characteristics. Also, the spike is output in order to diminish dead band.
When fr>fp or fr<fp, spike might not appear depending upon charge pump characteristics.
ANALOG SWITCH
ON/OFF of analog switch is controlled by LE input signal. When the analog switch is ON, internal charge pump output (DO) is connected to BISW pin.
When the analog switch is OFF, BI-SW pin is set to high-impedance state.
LE
Analog Switch
H(Changing the divide ratio of internal prescaler)
ON
L(Normal operating mode)
OFF
When an analog switch is inserted between LP1 and LP2, faster lock up time is achieved to reduce LPF time constant during PLL channel switching.
DO
CHARGE PUMP
LPF-1
ANALOG SW
LPF-2
VCO
BISW
(CONTROL SIGNAL LE)
7
MB1507
RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Unit
Min
Typ
Max
VCC
4.5
5.0
5.5
V
VP
VCC
—
8.0
V
Input Voltage
VI
GND
—
VCC
V
Operating Temperature
TA
–40
—
85
°C
Power Supply Voltage
HANDLING PRECAUTIONS
•
•
•
•
8
This device should be transported and stored in anti-static containers.
This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded. Cover
workbenches with grounded conductive mats.
Always turn the power supply off before inserting or removing the device from its socket.
Protect leads with a conductive sheet when handling or transporting PC boards with devices.
MB1507
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Power Supply Current
fin
Condition
Value
Min
Typ
Max
Unit
ICC
Note 1
—
18.0
—
mA
fin
Note 2
10
—
2000
MHz
Operating Frequency
OSCIN
fOSC
—
—
12
20
MHz
fin
Pfin
50Ω
–4
—
6
dBm
VOSC
—
0.5
—
—
VPP
VIH
—
VCCx0.7
—
—
V
VIL
—
—
—
VCCx0.3
V
IIH
—
—
1.0
—
µA
IIL
—
—
–1.0
—
µA
OSCIN
IOSC
—
—
"50
—
µA
LE, FC
ILE
—
—
–60
—
µA
4.4
—
—
V
—
—
0.4
V
—
—
1.1
µA
Input Sensitivity
OSCIN
High-level Input Voltage
Except fin
and OSCIN
Low-level Input Voltage
High-level Input Current
Data
Clock
Low-level Input Current
Input Current
High-level Output Current
Low-level Output Current
Except DO
and OSCOUT
High Impedance
Cutoff Current
Output Current
DO, ØP
Except DO
and OSCOUT
Analog Switch On Resistance
VOH
VCC=5V
VOL
IOFF
VP=VCC to 8V
VOOP=GND to 8V
IOH
—
–1.0
—
—
mA
IOL
—
1.0
—
—
mA
RON
—
—
25
—
Ω
NOTE 1: fin=2.0GHz, fOSC =12MHz X’tal VCC=5V. Inputs are grounded and outputs are open.
NOTE 2: AC coupling. Minimum operating frequency is measured with a capacitor 1000PF.
9
MB1507
TEST CIRCUIT (Prescaler Input Sensitivity)
VCC=5V
0.1µF
Vp=6V
X’tal
1000pF
P•G
50Ω
8
7
6
5
4
3
2
1
14
15
16
MB1507
9
10
11
12
13
Oscilloscope
10
MB1507
TYPICAL APPLICATION EXAMPLE
VPX(6V)
OUTPUT
LPF
VCO
10k
Charge Pump
Selection
(Internal or
external)
12k
FROM
CONTROLLER
12k
ØR
16
10k
ØP
15
fOUT
14
BISW
13
FC
12
LE
Data
Clock
11
10
9
6
7
8
47k
47k
MB1507
1
2
OSCIN
3
OSCOUT
4
Vp
5
VCC
GND
LD
fin
6V
100k
5V
C2
0.1µ
33k
LOCK
DETECTOR
0.01µ
Vp, VPX :
C1, C2 :
LE,FC :
ØP
:
VCC(5V)
1000p
X’tal
C1
DO
10k
8V max.
Depends on crystal oscillator
With pull up resistor
Open drain output
11
MB1507
PACKAGE DIMENSIONS
16-LEAD PLASTIC FLAT PACKAGE
(Case No. : FPT-16P-M06)
.089(2.25)MAX
(MOUNTING HEIGHT)
.002(0.05)MIN
(STAND OFF HEIGHT)
.400 +.010 (10.15+0.25 )
–0.20
–.008
INDEX
“B”
.018±.004
.050(1.27)
TYP
(0.45±0.10)
“A”
.004(0.10)
.350(8.89) REF
1991 FUJITSU LIMITED F16015S-2C
12
.307±.016
(7.80±0.40)
.209±.012
(5.30±0.30)
.268+.016(6.80+0.40 )
–0.20
–.008
.020±.008
(0.50±0.20)
Ø.005(0.13)
M
Details of “A” part
.016(0.40)
.008(0.20)
.007(0.18)
MAX
.027(0.68)
MAX
.006+.002(0.15 +0.05 )
–0.02
–.001
Details of “B” part
.006(0.15)
.008(0.20)
.007(0.18)
MAX
.027(0.68)
MAX
Dimensions in
inches (millimeters)
MB1507
All Rights Reserved.
Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical
semiconductor applications. Complete Information sufficient for construction purposes
is not necessarily given.
The information contained in this document has been carefully checked and is believed
to be reliable. However, Fujitsu assumes no responsibility for inaccuracies.
The Information contained in this document does not convey any license under the
copyrights, patent rights or trademarks claimed and owned by Fujitsu.
Fujitsu reserves the right to change products or specifications without notice.
No part of this publication may be copied or reproduced in any form or by any means, or
transferred to any third party without prior written consent of Fujitsu.
13
MB1507
For further information please contact:
Japan
FUJITSU LIMITED
Electronic Devices
International Operations Department
KAWASAKI PLANT, 1015 Kamikodanaka,
Nakahara–ku, Kawasaki–shi,
Kanagawa 211, Japan
Tel: (044) 754–3753
FAX: (044) 754–3332
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922–9000
FAX: (408) 432–9044/9045
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10,
63303 Dreieich-Buchschlag,
Germany
Tel: (06103) 690-0
FAX: (06103) 690-122
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LIMITED
No.51 Bras Basah Road,
Plaza By The Park,
#06-04 to #06-07
Singapore 0718
Tel: 336-1600
FAX: 336-1609
9501
 FUJITSU LIMITED Printed in Japan
14