FUJITSU MB39A103PV3

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27230-3E
ASSP For Power Manegement Applications
(DC/DC Converter for DSC/Camcorder)
4-ch DC/DC Converter IC
for low voltage
MB39A103
■ DESCRIPTION
The MB39A103 is a 4-channel DC/DC converter IC using pulse width modulation (PWM). This IC is ideal for up
conversion, down conversion, and up/down conversion.
Achievement of low voltage start-up (1.7 V or more) enables operation from low voltage.
4ch is built in TSSOP-30P/package. Each channel can be controlled, and soft-start.
This is an ideal power supply for high-performance portable devices such as digital still cameras.
This product is covered by US Patent Number 6,147,477.
■ FEATURES
•
•
•
•
•
•
•
•
•
•
Supports for down-conversion and up/down Zeta conversion (CH1)
Supports for up-conversion and up/down Sepic conversion (CH2 to CH4)
Low voltage start-up (CH4): 1.7 V
Power supply voltage range : 2.5 V to 11 V
Reference voltage : 2.0 V ± 1 %
Error amplifier threshold voltage : 1.24 V ± 1.5 %
Built-in totem-pole type output for MOS FET
Built-in soft-start circuit independent of loads
High-frequency operation capability: 1.5 MHz (Max)
External short-circuit detection capability by −INS terminal
■ PACKAGES
30-pin plastic TSSOP
32-pad plastic BCC
(FPT-30P-M04)
(LCC-32P-M15)
MB39A103
■ PIN ASSIGNMENTS
(TOP VIEW)
CS2
1
30
CS1
−INE2
2
29
−INE1
FB2
3
28
FB1
DTC2
4
27
DTC1
VCC
5
26
VCCO
CTL
6
25
OUT1
VREF
7
24
OUT2
RT
8
23
OUT3
CT
9
22
OUT4
GND
10
21
GNDO
CSCP
11
20
−INS
DTC3
12
19
DTC4
FB3
13
18
FB4
−INE3
14
17
−INE4
CS3
15
16
CS4
(FPT-30P-M04)
(Continued)
2
MB39A103
(Continued)
CS2
CS1
−INE1
FB1
VCC
−INE2
1
FB2
N.C.
DTC2
(TOP VIEW)
(Penetration diagram from surface)
32
31
30
29
28
27
26
23
OUT1
VREF
4
22
OUT2
RT
5
21
OUT3
CT
6
20
OUT4
GND
7
19
GNDO
CSCP
8
18
−INS
N.C.
9
17
DTC4
10
11
12
13
14
15
16
FB4
3
−INE4
CTL
CS4
VCCO
CS3
24
−INE3
2
FB3
DTC1
DTC3
25
(LCC-32P-M15)
3
MB39A103
■ PIN DESCRIPTION
Block
CH1
CH2
CH3
CH4
Pin No.
Symbol
I/O
25
DTC1
I
Dead time control terminal
28
26
FB1
O
Error amplifier output terminal
29
27
−INE1
I
Error amplifier inverted input terminal
30
28
CS1
⎯
Soft-start setting capacitor connection terminal
25
23
OUT1
O
Totem pole type output terminal
4
32
DTC2
I
Dead time control terminal
3
31
FB2
O
Error amplifier output terminal
2
30
−INE2
I
Error amplifier inverted input terminal
1
29
CS2
⎯
Soft-start setting capacitor connection terminal
24
22
OUT2
O
Totem pole type output terminal
12
10
DTC3
I
Dead time control terminal
13
11
FB3
O
Error amplifier output terminal
14
12
−INE3
I
Error amplifier inverted input terminal
15
13
CS3
⎯
Soft-start setting capacitor connection terminal
23
21
OUT3
O
Totem pole type output terminal
19
17
DTC4
I
Dead time control terminal
18
16
FB4
O
Error amplifier output terminal
17
15
−INE4
I
Error amplifier inverted input terminal
16
14
CS4
⎯
Soft-start setting capacitor connection terminal
22
20
OUT4
O
Totem pole type output terminal
9
6
CT
⎯
Triangular wave frequency setting capacitor
connection terminal
8
5
RT
⎯
Triangular wave frequency setting resistor
connection terminal
6
3
CTL
I
11
8
CSCP
⎯
20
18
−INS
I
26
24
VCCO
⎯
Output block power supply terminal
5
2
VCC
⎯
Power supply terminal
7
4
VREF
O
Reference voltage output terminal
21
19
GNDO
⎯
Output block ground terminal
10
7
GND
⎯
Ground terminal
TSSOP
BCC
27
OSC
Control
Power
4
Descriptions
Power supply control terminal
Short-circuit detection circuit capacitor connection
terminal
Short-circuit detection comparator inverted input
terminal
MB39A103
■ BLOCK DIAGRAM
Threshold voltage
accuracy ±1.5%
29
−INE1
Error
VREF
10 µA
Amp1
−
+
CS1 30
+
1.24 V
L priority
PWM
+Comp.1
+
−
FB1 28
Drive1
Pch
25 OUT1
IO = 130 mA
at VCCO = 4 V
Threshold voltage
accuracy ±1.5%
−INE2 2
Error
VREF
10 µA
Amp2
−
+
CS2 1
+
1.24 V
CH2
L priority
PWM
+Comp.2
+
−
Drive2
Nch
24 OUT2
L priority
FB2 3
IO = 130 mA
at VCCO = 4 V
DTC2 4
Threshold voltage
accuracy ±1.5%
−INE3 14
Error
VREF
10 µA
Amp3
−
+
CS3 15
+
1.24 V
CH3
L priority
PWM
+Comp.3
+
−
Drive3
Nch
23 OUT3
L priority
FB3 13
DTC3 12
IO = 130 mA
at VCCO = 4 V
Threshold voltage
accuracy ±1.5%
17
−INE4
Error
VREF
10 µA
Amp4
−
+
CS4 16
+
1.24 V
CH4
L priority
PWM
+Comp.4
+
−
Drive4
Nch
L priority
22 OUT4
21 GNDO
FB4 18
DTC4 19
IO = 130 mA
at VCCO = 4 V
VREF
100 kΩ
−INS 20
SCP
Comp.
−
+
1V
CSCP 11
26 VCCO
L priority
DTC1 27
Short detection
signal
(L: at short)
CH1
0.9 V
0.4 V
OSC
8 9
RT CT
H:
at SCP
SCP
UVLO2
Error Amp Power Supply
SCP Comp. Power Supply
Error Amp Reference
bias
1.24 V
Power
UVLO1
H:UVLO
release
Accuracy
±1%
5 VCC
VREF
VR1 ON/OFF
CTL
2.0 V
7
VREF
10
GND
6 CTL
H : ON (Power/ ON)
L : OFF (Standby mode)
VTH = 1.4 V
5
MB39A103
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Power supply voltage
VCC
Rating
Condition
Unit
Min
Max
VCC, VCCO terminals
⎯
12
V
Output current
IO
OUT1 to OUT4 terminals
⎯
20
mA
Peak output current
IOP
OUT1 to OUT4 terminals
Duty ≤ 5% (t = 1/fOSC×Duty)
⎯
400
mA
Power dissipation
PD
TA ≤ +25 °C (TSSOP-30P)
⎯
1390*
mW
TA ≤ +25 °C (BCC-32P)
⎯
980*
mW
−55
+125
°C
Storage temperature
⎯
TSTG
* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Min
1.7
Value
Typ
⎯
Max
11
2.5
4
11
−1
0
0
0
0
−15
100
39
11
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
500
100
24
0.1
0.1
⎯
⎯
0.1
1.0
µF
⎯
−30
+25
+85
°C
Symbol
Condition
Start power supply voltage
VCC
Power supply voltage
VCC
Reference voltage output current
IREF
VDTC
VCTL
IO
fOSC
CT
RT
CS
CSCP
VCC, VCCO terminals (CH4)
VCC, VCCO terminal s
(CH1 to CH4)
VREF terminal
−INE1 to −INE4 terminals
−INS terminal
DTC1 to DTC4 terminals
CTL terminal
OUT1 to OUT4 terminals
*
⎯
⎯
CS1 to CS4 terminals
⎯
CREF
TA
Input voltage
Control input voltage
Output current
Oscillation frequency
Timing capacitor
Timing resistor
Soft-start capacitor
Short-circuit detection capacitor
Reference voltage output
capacitor
Operating ambient temperature
VINE
Unit
V
V
0
mA
V
VCC − 0.9
V
VREF
VREF
V
11
V
+15
mA
1500
kHz
560
pF
130
kΩ
1.0
µF
1.0
µF
* : See “■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY”.
Note: Pin numbers referred after this part are present on TSSOP-30P PKG.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
6
MB39A103
■ ELECTRICAL CHARACTERISTICS
Symbol
Pin No
VREF
7
∆VREF
/VREF
7
TA = −30 °C to +85 °C
Line
Load
7
7
Threshold
voltage
VTH
22
Hysteresis
width
VH
22
Threshold
voltage
VTH
25
Hysteresis
width
VH
25
VTH
Under voltage
SoftUnder voltage
Triangular
Short-circuit lockout protection
start
lockout protection
circuit block
wave oscillator detection block
block
circuit block
(CH1 to CH3)
block [OSC]
[SCP]
[CS1 to CS4]
(CH4) [UVLO1]
[UVLO2]
Reference
voltage
block [Ref]
Parameter
Error amplifier
block
[Error Amp1 to
Error Amp4]
(VCC = VCCO = 4 V, TA = +25 °C)
Value
Conditions
Unit
Min
Typ
Max
⎯
1.98 2.00 2.02
V
Output voltage
Output voltage
temperature
stability
Input stability
Load stability
⎯
0.5*
⎯
%
VCC = 2.5 V to 11 V
VREF = 0 mA to −1 mA
−10
−10
⎯
⎯
+10
+10
mV
mV
VCC =
1.4
1.5
1.65
V
0.02
0.05
0.1
V
1.7
1.8
1.95
V
⎯
0.05
0.1
0.2
V
11
⎯
0.65
0.70
0.75
V
ICSCP
11
⎯
−1.4
−1.0
−0.6
µA
Reset voltage
VRST
25
VREF =
1.3
1.45
1.63
V
Oscillation
frequency
fOSC
22, 23, 24, 25
CT = 100 pF, RT = 24 kΩ
450
500
550
kHz
∆fOSC/
fOSC
22, 23, 24, 25
TA = −30 °C to +85 °C
⎯
1*
⎯
%
ICS
1, 15, 16, 30
CS1 to CS4 = 0 V
−14
−10
−6
µA
VTH
3, 13, 18, 28
FB1 to FB4 = 0.65 V
1.222 1.240 1.258
V
IB
2, 14, 17, 29
−INE1 to −INE4 = 0 V
−120
−30
⎯
nA
AV
3, 13, 18, 28
DC
⎯
100*
⎯
dB
BW
3, 13, 18, 28
AV = 0 dB
⎯
1.6*
⎯
MHz
Threshold
voltage
Input source
current
Frequency
temperature
stability
Charge current
Threshold
voltage
Input bias
current
Voltage gain
Frequency
bandwidth
⎯
VCC =
* : Standard design value
(Continued)
7
MB39A103
(Continued)
Symbol
Pin No
VOH
3, 13, 18, 28
⎯
1.7
1.9
⎯
V
VOL
3, 13, 18, 28
⎯
⎯
40
200
mV
ISOURCE
3, 13, 18, 28
FB1 to FB4 = 0.65 V
⎯
−2
−1
mA
ISINK
3, 13, 18, 28
FB1 to FB4 = 0.65 V
150
200
⎯
µA
VT0
22, 23, 24, 25
Duty cycle = 0 %
0.3
0.4
⎯
V
VT100
22, 23, 24, 25
Duty cycle = Dtr
⎯
0.9
1.0
V
IDTC
4, 12, 19, 27
DTC1 to DTC4 = 0.4 V
−2.0
−0.6
⎯
µA
ISOURCE
22, 23, 24, 25
Duty ≤ 5 %
(t = 1/fOSC×Duty)
OUT1 to OUT4 = 0 V
⎯
−130
−75
mA
ISINK
22, 23, 24, 25
Duty ≤ 5 %
(t = 1/fOSC×Duty)
OUT1 to OUT4 = 4 V
75
130
⎯
mA
ROH
22, 23, 24, 25
OUT1 to OUT4 = −15 mA
⎯
18
27
Ω
ROL
22, 23, 24, 25
OUT1 to OUT4 = 15 mA
⎯
18
27
Ω
Threshold
voltage
VTH
25
⎯
0.97
1.00
1.03
V
Input bias
current
IB
20
−INS = 0 V
−25
−20
−17
µA
VIH
6
IC Active mode
1.7
⎯
11
V
VIL
6
IC Standby mode
0
⎯
0.8
V
ICTLH
6
CTL = 3 V
5
30
60
µA
ICTLL
6
CTL = 0 V
⎯
⎯
1
µA
ICCS
5
CTL = 0 V
⎯
0
2
µA
ICCSO
26
CTL = 0 V
⎯
0
2
µA
ICC
5
CTL = 3 V
⎯
2.3
4.5
mA
General
Control block
[CTL]
Short-circuit
detection
comparator block
[SCP Comp.]
Output block
[Drive1 to Drive4]
PWM
comparator block
[PWM Comp.1 to
PWM Comp.4]
Error amplifier block
[Error Amp1 to
Error Amp4]
Parameter
Output voltage
Output source
current
Output sink
current
Threshold
voltage
Input current
Output source
current
Output sink
current
Output ON
resistor
CTL input
voltage
Input current
Standby
current
Power supply
current
*: Standard design value.
8
(VCC = VCCO = 4 V, TA = +25 °C)
Value
Conditions
Unit
Min
Typ
Max
MB39A103
■ TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage
Reference Voltage vs. Power Supply Voltage
5
TA = +25 °C
CTL = 3 V
Reference voltage VREF (V)
Power supply current ICC (mA)
5
4
3
2
1
0
TA = +25 °C
CTL = 3 V
VREF= 0 mA
4
3
2
1
0
0
2
4
6
8
10
12
0
2
Power supply voltage VCC (V)
4
6
8
10
12
Power supply voltage VCC (V)
Reference Voltage vs.
Operating Ambient Temperature
2.05
VCC = 4 V
CTL = 3 V
VREF= 0 mA
Reference voltage VREF (V)
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
1.95
−40
−20
0
20
40
60
80
100
Operating ambient temperature TA (°C)
Reference voltage VREF (V)
5
TA = +25 °C
VCC = 4 V
VREF= 0 mA
CTL = 3 V
4
3
2
1
0
0
2
4
6
8
10
CTL terminal voltage VCTL (V)
12
CTL terminal Current vs. CTL terminal Voltage
200
CTL terminal current ICTL (µA)
Reference Voltage vs. CTL terminal Voltage
TA = +25 °C
VCC = 4 V
160
120
80
40
0
0
2
4
6
8
10
12
CTL terminal voltage VCTL (V)
(Continued)
9
MB39A103
Triangular Wave Oscillation Frequency
vs. Timing Resistor
TA = +25 °C
VCC = 4 V
CTL = 3 V
1000
100
CT = 560 pF
CT = 39 pF
CT = 100 pF
CT = 220 pF
10000
Triangular wave oscillation
frequency fOSC (kHz)
Triangular wave oscillation
frequency fOSC (kHz)
10000
Triangular Wave Oscillation Frequency
vs. Timing Capacitor
10
TA = +25 °C
VCC = 4 V
CTL = 3 V
1000
100
RT = 130 kΩ
10
1
10
100
1000
10
100
Timing resistor RT (kΩ)
1.2
TA = +25 °C
VCC = 4 V
CTL = 3 V
RT = 24 kΩ
1.1
1.0
Upper
0.9
0.8
0.7
0.6
0.5
Lower
0.4
0.3
VCC = 4 V
1.1 CTL = 3 V
1 RT = 24 kΩ
CT = 100 pF
0.9
200
400
600
800 1000 1200 1400 1600
Triangular wave oscillation frequency fOSC (kHz)
Upper
0.8
0.7
0.6
0.5
Lower
0.4
0.3
0.2
−40
0.2
0
10000
Triangular Wave Upper and Lower Limit Voltage
vs. Operating Ambient Temperature
Triangular wave upper and
lower limit voltage VCT (V)
1.2
1000
Timing capacitor CT (pF)
Triangular Wave Upper and Lower Limit Voltage
vs. Triangular Wave Oscillation Frequency
Triangular wave upper and
lower limit voltage VCT (V)
RT = 11 kΩ
RT = 24 kΩ
RT = 56 kΩ
−20
0
20
40
60
80
100
Operating ambient temperature TA (°C)
Triangular wave oscillation
frequency fOSC (kHz)
Triangular Wave Oscillation Frequency
vs. Operating Ambient Temperature
560
VCC = 4 V
CTL = 3 V
RT = 24 kΩ
CT = 100 pF
540
520
500
480
460
440
−40
−20
0
20
40
60
80
100
Operating ambient temperature TA (°C)
(Continued)
10
MB39A103
(Continued)
40
AV
30
TA = +25 °C
VCC = 4 V
180
ϕ
20
90
10
0
0
−10
−20
−90
−30
10 kΩ
1 µF
+
2.4 kΩ
IN
30
CS1
10 kΩ
−40
1k
10 k
100 k
1M
28
+
+
OUT
1.24 V
Error Amp1
the same as other channels
−180
10 M
Frequency f (Hz)
Power Dissipation vs.
Operating Ambient Temperature
(TSSOP-30P)
Power Dissipation vs.
Operating Ambient Temperature
(BCC-32P)
Power dissipation PD (mW)
1600
Power dissipation PD (mW)
−INE1
29
−
1.5 V
100
240 kΩ
2.48 V
Phase φ (deg)
Error amplifier voltage gain AV (dB)
Error Amplifier Voltage Gain, Phase vs. Frequency
1400
1390
1200
1000
800
600
400
200
0
−40
−20
0
20
40
60
80
100
Operating ambient temperature TA (°C)
1000
980
800
600
400
200
0
−40
−20
0
20
40
60
80
100
Operating ambient temperature TA (°C)
11
MB39A103
■ FUNCTIONS
1. DC/DC Converter Functions
(1) Reference voltage block (Ref)
The reference voltage circuit generates a temperature-compensated reference voltage (2.0 V Typ) from the
voltage supplied from the VCC terminal (pin 5). The voltage is used as the reference voltage for the IC’s internal
circuitry.
The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal
(pin 7).
(2) Triangular-wave oscillator block (OSC)
The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to
the CT terminal (pin 9) and RT terminal (pin 8) to generate triangular oscillation waveform amplitude of 0.4 V to
0.9 V.
The triangular waveforms are input to the PWM comparator in the IC.
(3) Error amplifier block (Error Amp1 to Error Amp4)
The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition,
an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to
inverted input terminal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the
CS1 terminal (pin 30) to CS4 terminal (pin 16) which are the non-inverted input terminal for Error Amp. The use
of Error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is
independent of the output load on the DC/DC converter.
(4) PWM comparator block (PWM Comp.1 to PWM Comp.4)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The output transistor turns on while the error amplifier output voltage and DTC voltage remain higher than the
triangular wave voltage.
(5) Output block (Drive1 to Drive4)
The output block is in the totem pole type, capable of driving an external P-channel MOS FET (channel 1), and
N-channel MOS FET (channels 2 to 4).
12
MB39A103
2. Channel Control Function
The main or each channel is turned on and off depending on the voltage levels at the CTL terminal (pin 6), CS1
terminal (pin 30), CS2 terminal (pin 1), CS3 terminal (pin 15), and CS4 terminal (pin 16).
Channel On/Off Setting Conditions
CTL
CS1
CS2
CS3
CS4
Power
CH1
CH2
CH3
CH4
L
⎯*
⎯*
⎯*
⎯*
OFF
OFF
OFF
OFF
OFF
H
H
H
H
H
H
GND
High-Z
GND
GND
GND
High-Z
GND
GND
High-Z
GND
GND
High-Z
GND
GND
GND
High-Z
GND
High-Z
GND
GND
GND
GND
High-Z
High-Z
ON
ON
ON
ON
ON
ON
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
ON
ON
*: Undefined
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.)
The short-circuit detection comparator detects the Error Amp output voltage level of each channel, and if any
channel output voltage of Error Amp reaches the short-circuit detection voltage, the timer circuits are actuated
to start charging the external capacitor CSCP connected to the CSCP terminal (pin 11).
When the capacitor (CSCP) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the
dead time to 100 %.
In addition, the short-circuit detection from external input is capable by using −INS terminal (pin 20) on shortcircuit detection comparator (SCP Comp.) .
To release the actuated protection circuit, either the power supply turn off and on again or set the CTL terminal
(pin 6) to the “L” level to lower the VREF terminal (pin 7) voltage to 1.3 V (Min) or less. (See “■SETTING TIME
CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”.)
(2) Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect
to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the
CSCP terminal (pin 11) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the
undervoltage lockout protection circuit.
■ PROTECTION CIRCUIT OPERATING FUNCTION TABLE
This table refers to output condition when protection circuit is operating.
Operating circuit
OUT1
OUT2
OUT3
OUT4
Short-circuit protection circuit
H
L
L
L
Under voltage lockout protection circuit
H
L
L
L
13
MB39A103
■ SETTING THE OUTPUT VOLTAGE
• CH1 to CH4
VO
R1
−
R2
−INEx
Error
Amp
+
+
VO (V) =
1.24
R2
(R1 + R2)
1.24 V
CSx
x: Each channel No.
■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing capacitor (CT) connected to the CT terminal
(pin 9), and the timing resistor (RT) connected to the RT terminal (pin 8).
Moreover, it shifts more greatly than the calculated values according to the constant of timing resistor (RT) when
the triangular wave oscillation frequency exceeds 1 MHz. Therefore, set it referring to “Triangular Wave Oscillation
Frequency vs. Timing Resistor” and “Triangular Wave Oscillation Frequency vs. Timing Capacitor” in “■ TYPICAL
CHARACTERISTICS”.
Triangular oscillation frequency : fOSC
fOSC (kHz) =:
14
1200000
CT (pF) •RT (kΩ)
MB39A103
■ SETTING THE SOFT-START TIME
To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors
(CS1 to CS4) to the CS1 terminal (pin 30) to the CS4 terminal (pin 16), respectively.
Setting each CTLx from “H” to “L” switches to charge the external soft-start capacitors (CS1 to CS4) connected
to the CS1 terminal (pin 30) to CS4 terminal (pin 16) at 10 µA.
The error amplifier output (FB1 to FB4) is determined by comparison between the lower one of the potentials
at two non-inverted input terminals (1.24 V, CS terminal voltages) and the inverted input terminal voltage (−INE1
to −INE4).
The FB terminal voltage during the soft-start period (CS terminal voltage < 1.24 V) is therefore determined by
comparison between the −INE terminal and CS terminal voltages. The DC/DC converter output voltage rises in
proportion to the CS terminal voltage as the soft-start capacitor connected to the CS terminal is charged.
The soft-start time is obtained from the following formula:
Soft-start time: ts (time to output 100%)
ts (s) =: 0.124 × CSX (µF)
• Soft-Start Circuit
VO
VREF
10 µA
R1
−INEx
R2
L priority
Error Amp
−
CSx
CH ON/OFF signal
L: ON, H: OFF
+
+
1.24 V
CTLx
CSx
FBx
UVLO
x: Each channel No.
15
MB39A103
■ TREATMENT WITHOUT USING CS TERMINAL
When not using the soft-start function, open the CS1 terminal (pin 30), the CS2 terminal (pin 1), the CS3 terminal
(pin 15), the CS4 terminal (pin 16).
• Without Setting Soft-Start Time
“OPEN”
“OPEN”
1
CS2
CS1
30
“OPEN”
“OPEN”
15
16
CS3
CS4
16
MB39A103
■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP) to always compare the error amplifier′s output
level to the reference voltage.
While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output
remains at “L” level, and the CSCP terminal (pin 11) is held at “L” level.
If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage
to drop, the output of the short-circuit detection comparator on that channel goes to “H” level. This causes the
external short-circuit protection capacitor CSCP connected to the CSCP terminal (pin 11) to be charged at 1 µA.
Short-circuit detection time : tSCP
tSCP (s) =: 0.70 × CSCP (µF)
When the capacitor CSCP is charged to the threshold voltage (VTH =: 0.70 V), the latch is set and the external
FET is turned off (dead time is set to 100%). At this time, the latch input is closed and the CSCP terminal
(pin 11) is held at “L” level.
In addition, the short-circuit detection from external input is capable by using −INS terminal (pin 20) on the
short-circuit detection comparator (SCP Comp.). The short-circuit detection operation starts when −INS terminal
voltage is less than threshold voltage (VTH =: 1 V).
When the power supply is turn off and on again or VREF terminal (pin 7) voltage is less than 1.3 V (Min) by
setting CTL terminal (pin 6) to “L” level, the latch is released.
• Timer-latch short-circuit protection circuit
VO
FBx
R1
−
−INEx
Error
Amp
+
R2
1.24 V
VREF
−INS
−
20
SCP
Comp.
+
SCP
1V
+
+
+
+
−
1.1 V : FB1 to FB3
1.0 V : FB4
1 µA
To each channel
Drives
CTL
CSCP
11
CSCP
VREF
S
R
Latch
UVLO
x: Each channel No.
Note : When using self-power supply configuration in which the output from the CH4 DC/DC converter is connected
to the VCC, note that short-circuit detection is not possible in the CH4 DC/DC converter output.
17
MB39A103
■ TREATMENT WITHOUT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 11) to GND (pin
10) with the shortest distance.
• Treatment
18
without using CSCP terminal
10
GND
11
CSCP
MB39A103
■ SETTING THE DEAD TIME
When the device is set for step-up or inverted output based on the step-up or step-up/down Zeta conversion,
step-up/down Sepic conversion or flyback conversion, the FB terminal voltage may reach and exceed the triangular wave voltage due to load fluctuation. If this is the case, the output transistor is fixed to a full-ON state (ON
duty = 100 %). To prevent this, set the maximum duty of the output transistor. To set it, set the voltage at the
DTC terminal by applying a resistive voltage divider to the VREF voltage as shown below.
When the DTC terminal voltage is higher than the triangular wave voltage, the output transistor is turned on.
The maximum duty calculation formula assuming that triangular wave amplitude =: 0.5 V and triangular wave
lower voltage =: 0.4 V is given below.
DUTY (ON) Max=:
Vdt − 0.4 V
Rb
× 100 (%) , Vdt (V) =
0.5 V
Ra + Rb
× VREF
When the DTC terminal is not used, connect it directly to the VREF terminal (pin 7) as shown below (when no
dead time is set).
• When
using DTC to set dead time
Ra
DTCx
Rb
7
VREF
Vdt
x: Each channel No.
• When
no dead time is set
DTCx
7
VREF
x: Each channel No.
19
MB39A103
■ POWERR SUPPLY EXAMPLE USING CH4 FOR SELF-POWER SUPPLY
The MB39A103 can be started with the low input voltage (VIN ≥ 1.7 V) if the CH4 is used as a self-power supply.
An example of supply the power using the transformer is shown below.
• Power supply example using CH4 for self-power supply
VCCO
2
VIN
OUT4
22
−INE4
D
17
CS4
16
Error
Amp4
VREF
21
D
GNDO
−
+
+
VO4-1
15 V
VO4-2
5V
1.24 V
FB4
18
VO4-3
−7.5 V
5
VCC
Setting shown in the “■❨APPLICATION EXAMPLE” is as follows:
• Number of windings for VCC and VCCO is set to the value equivalent to VIN + 2.5 V.
CH1 to CH3 are operational on VCC ≥ 2.5 V; in order for the CH1 to CH3 to operate on VIN ≥ 1.7 V, the number
of windings should be set equivalent to VIN + 0.8 V or more for VCC and VCCO.
20
MB39A103
■ OPERATION EXPLANATION WHEN CTL TURNING ON AND OFF
When CTL is turned on, internal reference voltage VR and VREF generate. When VREF exceeds each threshold
voltage (VTH1, VTH2) of UVLO1 and UVLO2 (under voltage lockout protection circuit), UVLO1 and UVLO2 are
released, and the operation of output Drive circuit of each channel becomes possible.
When CTL is off, VR and VREF fall. When VREF decreases and UVLO1 and UVLO2 fall below each reset
voltage (VRST1, VRST2), UVLO operates and output Drive circuit of each channel is forcibly done the operation
stop, and makes the output off state.
For the period to reach to 2.0 V by VREF voltage after UVLO1 and UVLO2 are released by turning on CTL (refer
to a and b in “• Timing Chart”) and the period when VREF decreases from 2.0 V after turning off CTL until UVLO1
and UVLO2 operate (refer to a’ and b’ in “• Timing Chart”), VREF which is the reference voltage does not reach
2.0 V. Therefore, the bias voltage and the bias current in IC do not reach a prescribed value, and the speed of
response for IC has decreased.
Note : For this reason, when the input sudden change and the load sudden change occur in this period, IC cannot
respond immediately and the output might overshoot.
Therefore, impress the voltage to CTL terminal by which the VREF terminal voltage never stays in the abovementioned period.
• CTL Block Equivalent Circuit
H : at SCP
To CH1 to CH3 output Drive circuit
H : Possible to operate
L : Forcibly stop
SCP
To CS1 to CS3 charge/discharge
circuit
H : Possible to charge
L : Forcibly discharge
To CH4 output Drive circuit
H : Possible to operate
L : Forcibly stop
UVLO2
To CS4 charge/discharge circuit
H : Possible to charge
ErrorAmp Reference L : Forcibly discharge
1.24 V
H : UVLO release
UVLO1
bias
5
H : UVLO release
VREF
VR
Power
ON/OFF
CTL
6
VCC
CTL
7
VREF
21
MB39A103
• Timing Chart
VR = 1.24 V (Typ)
Error Amp
Reference
voltage VR
VTH1
VTH2
VRST2
VRST1
Reference
voltage VREF
b
UVLO1
VREF = 2.00 V (Typ)
UVLO1 release
b'
Valid UVLO1
a
UVLO2 release
a'
UVLO2
Valid UVLO2
CH4
output Drive
circuit control
Possible to operate
Fixed full-off
Fixed full-off
Possible to operate
CH1 to CH3
output Drive
circuit control
CTL terminal
voltage
22
Fixed full-off
Fixed full-off
1.5 V ± 0.2 V (Typ)
MB39A103
■ I/O EQUIVALENT CIRCUIT
〈〈Reference voltage block〉〉
〈〈Control block〉〉
〈〈Soft-start block〉〉
VREF
(2.0 V)
VCC 5
1.24 V
ESD
protection
element
7 VREF
+
−
ESD
protection
element
CTL 6
67
kΩ
CSx
77.3
kΩ
124
kΩ
104
kΩ
ESD
protection
element
GND
GND 10
GND
〈〈Triangular wave oscillator
block (CT)〉〉
〈〈Triangular wave oscillator
block (RT) 〉〉
〈〈Short-circuit detection block〉〉
VREF
(2.0 V)
VREF
(2.0 V)
VREF
(2.0 V)
0.7 V
2 kΩ
+
−
11 CSCP
CT 9
8 RT
GND
GND
GND
〈〈Short-circuit detection comparator block〉〉
〈〈Error amplifier block (CH1 to CH4) 〉〉
VCC
VCC
VREF
(2.0 V)
−INEx
CSx
1.24 V
VREF
(2.0 V)
−INS 20
100 kΩ
(1 V)
FBx
GND
GND
〈〈PWM comparator block (CH1 to CH4) 〉〉
VCC
FBX
〈〈Output block (CH1 to CH4) 〉〉
VCCO 26
OUTX
CT
DTCX
GNDO 21
GND
x: Each channel No.
23
MB39A103
■ APPLICATION EXAMPLE
R13R14 −INE1
29
A
3.3 kΩ12 kΩ 15 kΩ
R15
CS1
30
C20
R16
0.1 µF
1 kΩ
C21
28
0.1 µF
FB1
R17 18 kΩ
27
DTC1
R18 13 kΩ
R19R20 −INE2
2
B
3 kΩ22 kΩ 15 kΩ
R21
CS2
1
C22
R22
0.1 µF
1 kΩ
C23
0.1 µF FB2 3
R23 18 kΩ
4
DTC2
R24 13 kΩ
R25R26 −INE3
14
C
2.4 kΩ43 kΩ 15 kΩ
R27
CS3
15
C24
R28
0.1 µF
2 kΩ
C25
VIN
0.047 µF FB3 13
(1.7 V to 5 V) R29 33 kΩ
12
DTC3
R30 20 kΩ
R31R32 −INE4
17
D
2.4 kΩ43 kΩ 15 kΩ
R33
CS4
16
C26
R34
0.1 µF
2 kΩ
C27
0.047 µF FB4 18
R35
19
33 kΩ
DTC4
R36
−INS
20 kΩ
20
Charging
current
VO2
3.3 V, 500 mA
L3 C18 B
10 µH VC2
R12
OUT2 300 Ω
24
CH2
C16
4700 pF
C6
10 µF
VB1
L1
C4
D1
1 µF 22
µH
C3
4700 pF
4.7
µF
VB2
C17
1
µF
D7
C19
10 µF
Q5
L4
15 µH
C
D5
OUT3
23
CH3
C13
1 µF
T1
VO3-1
15 V, 10 mA
C14
D6 2.2 µF
C15
2.2
µF
VO3-2
5 V, 50 mA
Q4
OUT4
22
GNDO
21
CH4
D
D2
C8
1 µF
5
6
8
9
CT
fOSC
accuracy
±10%
C29
100 pF
7
VREF
C30
0.1 µF
T2
D4
C2
0.1 µF
CTL
10
GND
Q2
VO4-1
15 V, 10 mA
C9
VO4-2
2.2 µF
5 V, 50 mA
D3
C10
2.2 µF
VCC C32
2.2 µF D8
C28
0.01 µF
24
15 µH
25
OUT1
CH1
VO1
2.5 V,
250 mA
Q1 VC1
R4
C1
0.1 µF 150 Ω
CSCP
11
RT
R37
24 kΩ
A
C5
4.7 µF L2
VCCO
26
C11
2.2 µF
H : ON (Power ON)
L : OFF (Standby mode)
VTH = 1.4 V
VO4-3
−7.5 V, −5 mA
MB39A103
■ PARTS LIST
COMPONENT
ITEM
SPECIFICATION
VENDOR
PARTS No.
Q1,
Q2, Q4
Q5
PNP Tr
Nch FET
NPN Tr
VCEO = −12 V, IC = −3 A
VDS = 20 V, ID = 1.8 A
VCEO = 15 V, IC = 3 A
SANYO
SANYO
SANYO
CPH3106
MCH3405
CPH3206
D1, D7, D8
D2 to D6
Diode
Diode
VF = 0.4 V (Max) , at IF = 1 A
VF = 0.55 V (Max) , at IF = 0.5 A
SANYO
SANYO
SBS004
SB05-05CP
L1
L2
L3
L4
Inductor
Inductor
Inductor
Inductor
22 µH
15 µH
10 µH
15 µH
0.63 A, 160 mΩ
0.76 A, 120 mΩ
0.94 A, 67 mΩ
0.76 A, 120 mΩ
TDK
TDK
TDK
TDK
RLF5018T-220MR63
RLF5018T-150MR76
RLF5018T-100MR94
RLF5018T-150MR76
T1, T2
Transformer
⎯
⎯
SUMIDA
CLQ52 5388-T095
C1, C2, C30
C3, C16
C4, C8, C13
C5, C18
C6, C19
C9 to C11
C13, C17
C14, C15
C20 to C24, C26
C25, C27
C28
C29
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
0.1 µF
4700 pF
1 µF
4.7 µF
10 µF
2.2 µF
1 µF
2.2 µF
0.1 µF
0.047 µF
0.01 µF
100 pF
50 V
50 V
25 V
10 V
6.3 V
16 V
25 V
16 V
50 V
50 V
50 V
50 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C1608JB1H104K
C1608JB1H472K
C3216JB1E105K
C3216JB1A475M
C3216JB0J106K
C3216JB1C225K
C3216JB1E105K
C3216JB1C225K
C1608JB1H104K
C1608JB1H473K
C1608JB1H103K
C1608CH1H101J
R4
R12
R13
R14
R15, R21, R27
R16, R22
R17
R18
R19
R20
R23
R24
R25, R31
R26
R28, R34
R29, R35
R30, R36
R32
R33
R37
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
150 Ω
300 Ω
3.3 kΩ
12 kΩ
15 kΩ
1 kΩ
18 kΩ
13 kΩ
3 kΩ
22 kΩ
18 kΩ
13 kΩ
2.4 kΩ
43 kΩ
2 kΩ
33 kΩ
20 kΩ
43 kΩ
15 kΩ
24 kΩ
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-151-D
RR0816P-301-D
RR0816P-332-D
RR0816P-123-D
RR0816P-153-D
RR0816P-102-D
RR0816P-183-D
RR0816P-133-D
RR0816P-302-D
RR0816P-223-D
RR0816P-183-D
RR0816P-133-D
RR0816P-242-D
RR0816P-433-D
RR0816P-202-D
RR0816P-333-D
RR0816P-203-D
RR0816P-433-D
RR0816P-153-D
RR0816P-243-D
Note : SANYO
TDK
SUMIDA
ssm
: SANYO Electric Co., Ltd.
: TDK Corporation
: SUMIDA Electric Co., Ltd.
: SUSUMU Co., Ltd.
25
MB39A103
■ REFERENCE DATA
TOTAL Efficiency vs. Input Voltage
100
TA = +25 °C
VO1 = 2.5 V, 250 mA
VO2 = 3.3 V, 500 mA
VO3-1 = 15 V, 10 mA
VO3-2 = 5 V, 50 mA
VO4-1 = 15 V, 10 mA
VO4-2 = 5 V, 50 mA
VO4-3 = −7.5 V, −5 mA
fOSC = 500 kHz
TOTAL efficiency η (%)
95
90
85
80
75
70
65
60
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input voltage VIN (V)
Each CH Efficiency vs. Input Voltage
100
TA = +25 °C
Each CH efficiency η (%)
95
90
85
CH1
80
75
CH3
CH4
70
65
60
1.0
Note: Only concerned CH and CH4 (self-power
supply) are ON.
CH2
Include external SW Tr operating current
CH4 includes IC current consumption.
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input voltage VIN (V)
(Continued)
26
MB39A103
Conversion Efficiency vs. Load Current (CH1)
Conversion efficiency η (%)
100
TA = +25 °C
VIN = 3.6 V
95
90
CH2, CH3 : OFF
85
80
75
IO1 ≤ 80 mA: discontinuance mode
70
65
60
0
50
100
150
200
250
300
Load current IO1 (mA)
Conversion Efficiency vs. Load Current (CH2)
Conversion efficiency η (%)
100
TA = +25 °C
VIN = 3.6 V
95
90
CH1, CH3 : OFF
85
80
75
IO1 ≤ 120 mA: discontinuance mode
70
65
60
0
100
200
300
400
500
Load current lO2 (mA)
(Continued)
27
MB39A103
Conversion Efficiency vs. Load Current (CH3, CH4)
Conversion efficiency η (%)
100
TA = +25 °C
VIN = 3.6 V
VO3-1 = 10 mA
VO4-1 = 10 mA
VO4-3 = −5 mA
95
90
85
CH3
CH1, CH2 : OFF
80
75
CH4
CH1 to CH3 : OFF
70
Note: CH3 and CH4 are
discontinuance mode.
65
60
0
10
20
30
40
50
Load current IO3-2, IO4-2 (mA)
(Continued)
28
MB39A103
(Continued)
Switching Wave Form (CH1)
TA = +25 °C
VIN = 4 V
CTL = 3 V
VB1(V)
6
4
2
0
VC1(V)
5
0
−5
0
1
2
3
4
5
6
7
8
9
10
t (µs)
Switching Wave Form (CH2)
VB2 (V)
1
TA = +25 °C
VIN = 4 V
CTL = 3 V
0
−1
−2
VC2 (V)
10
5
0
0
1
2
3
4
5
6
7
8
9
10
t (µs)
29
MB39A103
■ USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ ORDERING INFORMATION
Part number
30
Package
MB39A103PFT
30-pin plastic TSSOP
(FPT-30P-M04)
MB39A103PV3
32-pad plastic BCC
(LCC-32P-M15)
Remarks
MB39A103
■ PACKAGE DIMENSIONS
30-pin plastic TSSOP
(FPT-30P-M04)
7.80±0.10(.307±.004)
"A"
Details of "A" part
0~8°
1.10(.043)
MAX
0.60±0.10
(.024±.004)
+0.20
4.40 –0.10
6.40±0.10
+.008
.173 –.004 (.252±.004)
INDEX
0.25(.010)
0.10±0.05
(.004±.002)
0.50(.020)
0.20±0.03
(.008±.001)
0.10(.004)
7.00(.276)
C
0.3865(.0152)
0.127±0.03
(.005±.001)
0.90±0.05
(.035±.002)
0.3865(.0152)
2001 FUJITSU LIMITED F30007SC-1-1
Dimensions in mm (inches)
Note: The values in parentheses are reference values.
(Continued)
31
MB39A103
(Continued)
32-pad plastic BCC
(LCC-32P-M15)
4.25(.167)TYP
0.50(.020)TYP
5.00±0.10(.197±.004)
25
0.80(.031)MAX
(Mount height)
17
INDEX AREA
1
4.25(.167)
TYP 0.50(.020)
TYP
0.50±0.10
(.020±.004)
5.00±0.10
(.197±.004)
0.075±0.025
(.003±.001)
(Stand off)
9
9
Details of "A" part
0.05(.002)
0.14(.006)
MIN
C0.2(.008)
25
3.00(.118)
REF
"C"
"A"
"B"
3.00(.118)REF
Details of "B" part
0.55±0.06
(.022±.002)
0.30±0.06
(.012±.002)
C
0.50±0.10
(.020±.004)
17
1
Details of "C" part
0.55±0.06
(.022±.002)
0.55±0.06
(.022±.002)
0.55±0.06
(.022±.002)
0.55±0.06
(.022±.002)
2005 FUJITSU LIMITED C32067S-c-1-1
Dimensions in mm (inches)
Note: The values in parentheses are reference values.
32
MB39A103
FUJITSU LIMITED
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F0511
© 2005 FUJITSU LIMITED Printed in Japan