FUJITSU MB85R2001_08

FUJITSU MICROELECTRONICS
DATA SHEET
DS05-13107-3Ea
Memory FRAM
CMOS
2 M Bit (256 K × 8)
MB85R2001
■ DESCRIPTIONS
The MB85R2001 is an FRAM (Ferroelectric Random Access Memory) chip consisting of 262,144 words × 8 bits
of non-volatile memory cells created using ferroelectric process and silicon gate CMOS process technologies.
The MB85R2001 is able to retain data without using a back-up battery, as is needed for SRAM.
The memory cells used in the MB85R2001 can be used for at least 1010 read/write operations, which is a significant
improvement over the number of read and write operations supported by Flash memory and E2PROM.
The MB85R2001 uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM.
■ FEATURES
•
•
•
•
•
•
Bit configuration
Read/write endurance
Operating power supply voltage
Operating temperature range
Data retention
Package
: 262,144 words × 8 bits
: 1010 times/bit (Min)
: 3.0 V to 3.6 V
: − 20 °C to + 85 °C
: 10 years ( + 55 °C)
: 48-pin plastic TSOP (1)
Copyright©2007-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.2
MB85R2001
■ PIN ASSIGNMENTS
(TOP VIEW)
A11
A9
NC
A8
A13
WE
CE2
A15
NC
VCC
NC
NC
GND
NC
NC
VCC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE
NC
GND
A10
CE1
NC
I/O8
I/O7
I/O6
I/O5
I/O4
VCC
NC
I/O3
I/O2
I/O1
NC
NC
NC
A0
A1
GND
A2
A3
(FPT-48P-M25)
■ PIN DESCRIPTIONS
Pin name
A0 to A17
I/O1 to I/O8
Address Input
Data Input/Output
CE1
Chip Enable 1 Input
CE2
Chip Enable 2 Input
WE
Write Enable Input
OE
Output Enable Input
VCC
Power Supply
GND
NC
2
Function
Ground
No Connection
MB85R2001
■ BLOCK DIAGRAM
to
·
·
·
Address Latch.
A0
Row Dec.
Ferro Capacitor Cell
A17
Column Dec.
intCE2
S/A
CE2
intOE
intWE
intCE2
intCE2
intCEB
WE
I/O1 to I/O8
OE
intCEB
I/O8
CE1
·
·
to
I/O1
3
MB85R2001
■ FUNCTION TRUTH TABLE
Operation Mode
Standby Pre-charge
Read
Read
(Pseudo-SRAM, OE control*1)
CE1
CE2
WE
OE
H
X
X
X
X
L
X
X
X
X
H
H
H
L
H
L
L
H
L
High-Z
Standby
(ISB)
H
L
Operation
(ICC)
H
L
Write
(Pseudo-SRAM, WE control*2)
Supply Current
Dout
H
Write
I/O1 to I/O8
Din
H
H
L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance
: Latch address and latch data at falling edge,
: Latch address and latch data at rising edge
*1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read.
*2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write.
4
MB85R2001
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Min
Max
Unit
Supply Voltage*
VCC
−0.5
+4.0
V
Input Voltage*
VIN
−0.5
VCC + 0.5
V
VOUT
−0.5
VCC + 0.5
V
TA
−20
+85
°C
Tstg
−40
+125
°C
Output Voltage*
Ambient Operating Temperature
Storage Temperature
* : All voltages are referenced to GND = 0 V.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Value
Min
Typ
Max
Unit
Supply Voltage*
VCC
3.0
3.3
3.6
V
Input Voltage (high)*
VIH
VCC x 0.8
⎯
VCC + 0.5
V
Input Voltage (low)*
VIL
−0.5
⎯
+0.8
V
Operating Temperature
TA
−20
⎯
+85
°C
* : All voltages are referenced to GND = 0 V.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
5
MB85R2001
■ ELECTRICAL CHARACTERISTICS
1. DC CHARACTERISTICS
Parameter
Symbol
Test Condition
(within recommended operating conditions)
Value
Unit
Min
Typ
Max
Input Leakage Current
|ILI|
VIN = 0 V to VCC
⎯
⎯
10
µA
Output Leakage Current
|ILO|
VOUT = 0 V to VCC,
CE1 = VIH or OE = VIH
⎯
⎯
10
µA
Supply Current
ICC
CE1 = 0.2 V, CE2 = VCC − 0.2 V,
IOUT = 0 mA*1
⎯
10
15
mA
⎯
10
50
µA
VCC x 0.8
⎯
⎯
V
⎯
⎯
0.4
V
CE1 ≥ VCC − 0.2 V
Standby Current
ISB
CE2 ≤ 0.2 V*2
OE ≥ VCC − 0.2 V, WE ≥ VCC − 0.2 V*2
Output Voltage (high)
VOH
IOH = − 2.0 mA
Output Voltage (low)
VOL
IOL = 2.0 mA
*1 : During the measurement of ICC , the Address, Data In were taken to only change once per active cycle.
IOUT : output current
*2 : All pins other than setting pins should be input at the CMOS level voltages such as H ≥ VCC − 0.2 V, L ≤ 0.2 V.
6
MB85R2001
2. AC CHARACTERISTICS
• AC TEST CONDITIONS
Supply Voltage
Operating Temperature
Input Voltage Amplitude
Input Rising Time
Input Falling Time
Input Evaluation Level
Output Evaluation Level
Output Impedance
: 3.0 V to 3.6 V
: −20 °C to +85 °C
: 0.3 V to 2.7 V
: 5 ns
: 5 ns
: 2.0 V / 0.8 V
: 2.0 V / 0.8 V
: 50 pF
(1) Read Operation
(within recommended operating conditions)
Parameter
Symbol
Value
Min
Max
Unit
Read Cycle Time
tRC
150
⎯
ns
CE1 Active Time
tCA1
120
⎯
ns
OE Active Time
tRP
120
⎯
ns
Pre-charge Time
tPC
20
⎯
ns
Address Setup Time
tAS
5
⎯
ns
Address Hold Time
tAH
50
⎯
ns
OE Setup Time
tES
5
⎯
ns
Output Hold Time
tOH
0
⎯
ns
Output Set Time
tLZ
30
⎯
ns
CE1 Access Time
tCE1
⎯
100
ns
CE2 Access Time
tCE2
⎯
100
ns
OE Access Time
tOE
⎯
100
ns
Output Floating Time
tOHZ
⎯
20
ns
(2) Write Operation
(within recommended operating conditions)
Parameter
Symbol
Value
Min
Max
Unit
Write Cycle Time
tWC
150
⎯
ns
CE1 Active Time
tCA1
120
⎯
ns
CE2 Active Time
tCA2
120
⎯
ns
Pre-charge Time
tPC
20
⎯
ns
Address Setup Time
tAS
5
⎯
ns
Address Hold Time
tAH
50
⎯
ns
Write Pulse Width
tWP
120
⎯
ns
Data Setup Time
tDS
0
⎯
ns
Data Hold Time
tDH
50
⎯
ns
Write Setup Time
tWS
5
⎯
ns
7
MB85R2001
(3) Power ON/OFF Sequence
(within recommended operating conditions)
Value
Symbol
Min
Typ
Max
CE1 level hold time for Power OFF
tpd
85
⎯
⎯
ns
CE1 level hold time for Power ON
tpu
85
⎯
⎯
ns
Parameter
Unit
3. Pin Capacitance
(f = 1 MHz, TA = +25 °C)
Parameter
Input Capacitance
Output Capacitance
8
Symbol
CIN
COUT
Test Condition
Value
Unit
Min
Typ
Max
VIN = GND
⎯
⎯
10
pF
VOUT = GND
⎯
⎯
10
pF
MB85R2001
■ TIMING DIAGRAMS
1. Read Cycle Timing 1 (CE1, CE2 Control)
tRC
tCA1
tPC
CE1
tCA2
CE2
tAS
A0 to A17
tAH
Valid
H or L
tES
tRP
OE
tCE1,
tCE2
tLZ
I/O1 to I/O8
tOHZ
tOH
High-Z
Valid
Invalid
Invalid
2. Read Cycle Timing 2 (OE Control)
tCA1
CE1
CE2
tCA2
tAS
A0 to A17
tAH
Valid
H or L
tRC
tPC
tRP
OE
tOE
tOH
tLZ
I/O1 to I/O8
tOHZ
High-Z
Valid
Invalid
Invalid
9
MB85R2001
3. Write Cycle Timing 1 (CE1, CE2 Control)
tWC
tCA1
tPC
CE1
CE2
tCA2
tAH
tAS
A0 to A17
Valid
H or L
tWS
tWP
WE
tDS
tDH
High-Z
Valid
Data In
H or L
4. Write Cycle Timing 2 (WE Control)
tCA1
CE1
tCA2
CE2
tAS
A0 to A17
tAH
Valid
H or L
tWC
tWP
tPC
WE
tDS
tDH
High-Z
Data In
10
Valid
H or L
MB85R2001
■ POWER ON/OFF SEQUENCE
tpd
tpu
VCC
VCC
CE2
CE2
3.0 V
3.0 V
VIH (Min)
VIH (Min)
1.0 V
1.0 V
VIL (Max)
VIL (Max)
CE2 ≤ 0.2 V
GND
GND
CE1 > VCC × 0.8∗
CE1
CE1 : Don't Care
CE1 > VCC × 0.8∗
CE1
* : CE1 (Max) < VCC + 0.5 V
Note : You can choose either of CE1 or CE2, or both for disenable control of the device.
■ NOTES ON USE
Data that is written prior to IR reflow is not guaranteed to be retained after IR reflow.
■ ORDERING INFOMATION
Part number
MB85R2001PFTN-GE1
Package
48-pin plastic TSOP(1)
(FPT-48P-M25)
11
MB85R2001
■ PACKAGE DIMENSIONS
48-pin plastic TSOP(1)
Lead pitch
0.50 mm
Package width ×
package length
12.00 × 12.40 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.20 mm MAX
Weight
0.37 g
Code
(Reference)
P-TSOP(1)48-12×12.4-0.50
(FPT-48P-M25)
48-pin plastic TSOP(1)
(FPT-48P-M25)
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max).
Note 2) *2 : These dimensions do not include resin protrusions.
Note 3) Pin widths and pin thicknesses include plating thickness.
Note 4) Pin widths do not include tie bar cutting burrs.
0.10±0.05
(Stand off)
(.004±.002)
LEAD No.
1
48
0.50(.020)
INDEX
+0.05
0.22 –0.04
+.002
.009 –.002
*1 12.00±0.10
(.472±.004)
24
0.10(.004)
M
25
1.13±0.07
(Mounting height)
(.044±.003)
14.00±0.20(.551±.008)
Details of "A" part
*2 12.40±0.10(.488±.004)
"A"
0˚~8˚
+0.05
0.08(.003)
C
0.145 –0.03
+.002
.006 –.001
2003 FUJITSU LIMITED F48043S-c-2-2
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
12
0.25(.010)
0.60±0.15
(.024±.006)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
MB85R2001
MEMO
13
MB85R2001
MEMO
14
MB85R2001
MEMO
15
MB85R2001
FUJITSU MICROELECTRONICS LIMITED
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of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information.
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Edited
Strategic Business Development Dept.