SAMSUNG S5T8610X01-Q0R0

PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
INTRODUCTION
64-QFP-1414
S5T8610 provides low cost digital communication solution in 900 MHz
wideband cordless phone. It replaces the compander of an analog wideband
cordless phone. It has internal analog-to-digital and digital-to-analog converters
to reduce system cost.
S5T8610 provides the full advantages of digital communication such as
security, higher resistance to noise, and lowest cost solution in today's digital
cordless phone ICs. Furthermore, S5T8610 offers error concealment at 16 kbps
ADPCM transmission to provide longer communication range.
FEATURES
•
Operating voltage range: 3.0V to 3.6V
•
System main clock: 36.8 MHz or 36.864 MHz
•
Serial host interface
•
Internal ADC and DAC for modem
•
Internal voice CODEC for ADPCM
•
8 Phase DPSK
•
24kbps/16kbps ADPCM
•
Error concealment for 16kbps ADPCM
•
Loop back test
•
Encryption/Decryption
•
DTMF Generator
•
Digital Volume Control
•
typical application
ISM band digital cordless phone
ORDERING INFORMATION
Device
++ S5T8610X01-Q0R0
++: Under development
Package
Operating Temperature
64-QFP-1414
-20 °C to +75 °C
1
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
BLOCK DIAGRAM
Data RAM
Clock
Generation
Unit
Control
Register
Unit
Host
Interface
Unit
DSP Unit
Voice
Codec
Interface
Unit
Voice
Codec
2
MODEM
ADC/DAC
Interface
Unit
12bits
ADC
12bits
DAC
Program
ROM
Timing
Correction
Unit
Stack
DSIU
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
VSSD_ADC
VDDD_ADC
REFL
REFH
VDDA_CDC
RXO
DTMF
VREFOUT
VSSA_CDC
TXI
AINFB
VSSD_CDC
VDDD_CDC
TD12
TD11
TD10
PIN CONFIGURATION
S5T8610
DCLP
(64-QFP-1414)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VDDD2
TD9
TD8
TD7
TD6
TD5
TD4
TD3
TD2
TD1
TD0
HWEB
HCLK
HDATA
RESET
VSSD2
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSELDR0
TSELDR1
TIDR
TODR
TINT
VDDD_OSC
OSCI
OSCO
VSSD_OSC
CKOUT
TEST0
TEST1
TEST2
TEST3
BER/JAM DET
VSSD1
VREF
AGND
VDDA_ADC
VSSA_ADC
RXI
VRT
VRB
TXO
VDDA_DAC
VSSA_DAC
VDDD_DAC
VSSD_DAC
VDDD1
TCLKDR
TSHFTDR
TUPDDR
3
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
PIN DESCRIPTION
4
Pin No
Symbol
I/O
Description
1
VREF
AI
Reference top (3.3V) for ADC
2
AGND
AI
Reference bottom (0V) for ADC
3
VDDA_ADC
AP
Analog power (3.3V) for ADC
4
VSSA_ADC
AG
Analog ground (0V) for ADC
5
RXI
AI
Analog input (input range: 0V to 3.3V) for ADC
6
VRT
AI
Voltage reference top (2.0V) for DAC
7
VRB
AI
Voltage reference bottom (0V) for DAC
8
TXO
AO
Analog voltage output for DAC
9
VDDA_DAC
AP
Analog power (3.3V) for DAC
10
VSSA_DAC
AG
Analog ground (0V) for DAC
11
VDDD_DAC
DP
Digital power (3.3V) for DAC
12
VSSD_DAC
DG
Digital ground (0V) for DAC
13
VDDD1
DP
Digital power (3.3V) for DSP core
14
TCLKDR
DI
Test clock
15
TSHFTDR
DI
Test scan shift enable
16
TUPDDR
DI
Test scan update
17
TSELDR0
DI
Test scan register selection 0
18
TSELDR1
DI
Test scan register selection 1
19
TIDR
DI
Test scan input
20
TODR
DO
Test scan output
21
TINT
DO
Interrupt check
22
CKOUT
DO
Test clock output
23
VDDD_OSC
DP
Digital power (3.3V) for oscillator block
24
OSCI
I
Oscillator input
25
OSCO
O
Oscillator output
26
VSSD_OSC
DG
Digital ground (0V) for oscillator block
27
TEST0
DI
Test
28
TEST1
DI
Test
29
TEST2
DI
Test
30
TEST3
DI
Test
31
SYNCH/BER/JAM
DO
Initial synchronization / BER (bit error rate) / jamming
detection output
32
VSSD1
DG
Digital ground (0V)
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
PIN DESCRIPTION (Continued)
Pin No
Symbol
I/O
Description
33
VSSD2
DG
Digital ground (0V)
34
RESET
DI
System reset (Reset: high, Normal: low)
35
HDATA
DB
Host data
36
HCLK
DI
Host interface clock
37
HWEB
DI
Host read/write signal (R: high, W: low)
38
TCK
DI
Test data input
39
TD0
DB
Test data input/output
40
TD1
DB
Test data input/output
41
TD2
DB
Test data input/output
42
TD3
DB
Test data input/output
43
TD4
DB
Test data input/output
44
TD5
DB
Test data input/output
45
TD6
DB
Test data input/output
46
TD7
DB
Test data input/output
47
TD8
DB
Test data input/output
48
VDDD2
DP
Digital power (3.3V) for DSP core
49
TD9
DB
Test data input/output
50
TD10
DB
Test data input/output
51
TD11
DB
Test data input/output
52
VDDD_CDC
AP
Digital power (3.3V) for CODEC
53
VSSD_CDC
AG
Digital ground (0V) for CODEC
54
AINFB
AO
Analog input gain control for CODEC
55
TXI
AI
ADC analog input for CODEC
56
VSSA_CDC
AG
Analog ground (0V) for CODEC
57
VREFOUT
AO
Vref output for CODEC (Vref = 1/2 VDD)
58
DTMF
AO
DTMF output for CODEC
59
RXO
AO
DAC analog output for CODEC
60
VDDA_CDC
AP
Analog power for CODEC
61
REFH
AI
Analog reference power (3.3V) for CODEC
62
REFL
AI
Analog reference ground (0V) for CODEC
63
VDDD_ADC
AP
Digital power (3.3V) for ADC
64
VSSD_ADC
AG
Digital ground (0V) for ADC
5
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Supply Voltage
VDD
-0.3 to 3.8
V
Input Voltage
VIN
-0.3 to 3.8
V
Storage Temperature Range
TSTG
-40 to 125
°C
Operating Temperature Range
TOPR
-25 to 75
°C
Symbol
Value
Unit
Supply Voltage
VDD
3.0 to 3.3
V
Operating Temperature Range
TOPR
-10 to 70
°C
ELECTRICAL CHARACTERISTICS
Recommended Operating Conditions
Characteristic
DC Characteristics
(Ta = 25°C, VDD = 3.3V, Unless otherwise specified)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Comment
Operating Voltage
VDD
-
3.0
-
3.6
V
-
Operating Current
IDD
-
-
30
-
mA
-
'H' Input Voltage1
VIH
-
0.8VDD
-
-
V
(1)
'L' Input Voltage1
VIL
-
-
-
0.2VDD
V
'H' Output Voltage1
VOH(1)
IOH = -1mA
VDD-0.2
-
-
V
'L' Output Voltage1
VOL(1)
IOL = 1mA
-
-
0.4
V
'H' Output Voltage2
VOH(2)
IOH = -1mA
VDD-0.2
-
VDD
V
'L' Output Voltage2
VOL(2)
IOL = 1mA
0
-
0.4
V
Input Leak Current1
ILKG1
VI = 0 to VDD
-10
-
10
µA
(4)
Input Leak Current2
ILKG2
VI = 0 to VDD
-10
-
10
µA
(5)
NOTES:
1. Related pins: All Input, Bi-direction pin (input mode)
2. Related pins: All Output pin
3. Related pins: All Bi-direction pin (output mode)
4. Related pins: All Input pin, Bi-direction pin (input mode) < expect OSCI pin>
5. Related pins: OSCI
6
(2)
(3)
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
DTMF Generator
(Ta = 25°C, VDD = 3.3V, Unless otherwise specified)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
VO(TONE)
RL=5kΩ
-14
-
-11
dBV
Column to Row Ratio
dBCR
RL=5kΩ
1
2
3
dB
THD (Dual Tone)
THD
RL=5kΩ, 1MHz bandwidth
-
-
5
%
Tone Output Level
8 kHz Sigma-Delta Voice CODEC
 Measure Bandwidth: 20Hz - 4kHz
 Input sine wave 1kHz, Fs = 8kHz
(Ta = 25°C, VDDA = 3.3V, Unless otherwise specified)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Resolution
RS
-
-
14
-
bits
Sampling Rate
SR
-
-
8
-
kHz
Signal to Distortion Ratio
SDR
0dB Input : Linear
70
75
−
dB
Offset Error
VOFS
-
-
-
± 20
mV
VIN
-
-
2
-
VPK-PK
Signal to Distortion Ratio
SDR
0dB Input : Linear
70
75
−
dB
Offset Error
VOFS
-
-
-
−
mV
Output Voltage Range
VOUT
0dB Volume
Control
-
20
-
mVrms
Min
Typ
Max
Unit
ADC analog Input Characteristics
Input Voltage Range
DAC analog Output Characteristics
12 Bit 500kHz ADC (Modem RX ADC)
(Ta = 25°C, VDDA = 3.3V, VREF = 3.3V, Unless otherwise specified)
Characteristic
Maximum Conversion Rate
Total Harmonic Distortion
Signal-to-Noise & Distortion Ratio
Input Voltage
Symbol
Test Conditions
Fc
data = 200kHz
−
−
500
kHz
THD
Fckin = 2.5MHz
AINT = 100kHz
−
-68
-60
dB
SNDR
Fckin = 2.5MHz
AINT = 100kHz
56
62
−
dB
−
−
3.3
VPK-PK
VIN
−
7
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
12 Bit 200kHz DAC (Modem TX DAC)
(Ta = 25°C, VDDA = 3.3V, VRT=2.0V, VRB = 0.0V, Load Cap = 25pF, Unless otherwise specified)
Characteristic
Symbol
Min
Typ
Max
Unit
Conditions
Fc
−
−
500
kHz
data = 200kHz
THD
−
-68
-60
dB
Fckin = 2.5MHz
AINT = 100kHz
Signal-to-Noise & Distortion Ratio
SNDR
56
62
−
dB
Fckin = 2.5MHz
AINT = 100kHz
Output Voltage
VOUT
−
−
2
VPK-PK
−
Maximum Conversion Rate
Total Harmonic Distortion
Host Interface Unit (HCLK, HDATA, HWEB)
(Ta = 25°C, VDD = 3.3V, Unless otherwise specified)
Characteristic
Symbol
Min
Typ
Max
Unit
Fck
−
−
1.67
MHz
Twck
750
−
−
ns
Setup Time
Ts
300
−
−
ns
Hold Time
Th
300
−
−
ns
Clock Frequency (1/Tck)
Clock Pulse Width
Tck=1/Fck
Twck Twck
HCLK
HDATA
MSB
LSB
Ts
HWEB
8
Th
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
HARDWARE DESCRIPTION
Voice Codec
S5T8610 offers an internal voice codec (ADC and DAC), with 14 bit resolution and sampling frequency of 8kHz.
Its electrical characteristics are shown in the previous section.
Modem Rx ADC
S5T8610 offers an internal ADC for the modem's receiver. The ADC has 12 bit resolution and can operate up to
a sampling rate of 500kHz. In S5T8610, the operating ADC sampling frequency is 48kHz. Its electrical
characteristics are shown in the previous section.
Modem Tx DAC
S5T8610 offers an internal DAC for the modem's transmitter. The DAC has 12 bit resolution and can operate up
to a sampling rate of 200kHz. In S5T8610, the operating DAC sampling frequency is 48kHz. Its electrical
characteristics are shown in the previous section.
Oscillator
 When inputting a pulse signal to the OSCI pin (36.8 MHz)
(Ta = 25°C, VDD = 3.3V, Unless otherwise specified)
Characteristic
Symbol
Min
Typ
Max
Unit
'H' level pulse width
Twh
−
13.6
−
ns
'L' level pulse width
Twl
−
13.6
−
ns
Pulse width
Tck
−
27.2
−
ns
Input 'H' level
Vih
0.8VDD
−
−
V
Input 'L' level
Vil
−
−
0.2VDD
V
Tr, Tf
−
−
0.8
ns
Rising & Falling time
Tck
Twh
Twl
Vih
Vih x 0.9
VDD/2
Vih x 0.1
Vil
Tr
Tf
9
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
Host Interface Unit
S5T8610 receives commands and parameters in serial format, starting from the MSB, from the host through the
host interface unit (HIU). The data is in byte units. The HIU has HWEB (Host Write Enable), HCLK (Host
Interface Clock), and HDATA (Host Data) pins. The maximum HBCK frequency is 4MHz. S5T8610 can accept
the host command every 20µsec.
Characteristic
Symbol
MIN
TYP
MAX
Unit
Fck
−
−
1.67
MHz
Twck
750
−
−
ns
Setup Time
Ts
300
−
−
ns
Hold Time
Th
300
−
−
ns
Clock Frequency (1/Tck)
Clock Pulse Width
Tck=1/Fck
Twck Twck
HCLK
HDATA
MSB
LSB
Ts
Th
HWEB
System Clock
S5T8610 operates only with 36.8 MHz or 36.864 MHz external clock.
Reset
S5T8610 provides power-on-reset circuit and RESET pin for external hardware reset. For power-on-reset, the
RESET signal is held normally low. For the external hardware reset, the device is in the reset state when the host
sets RESET signal to high. The device is in the operating state, when the host inputs low to the RESET pin.
10
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
FUNCTIONAL DESCRIPTION
The main feature of S5T8610 is the digital communication between the hand set and the base set. The device
accepts analog voice signal through the TXI pin. The analog signal is converted into digital signal by the internal
voice codec. The digital voice signal is then compressed by ADPCM into either 24kbps or 16kbps. The
compressed signal is then digitally modulated by 8 DPSK algorithm. The modulated signal is converted into
analog signal by internal modem DAC and finally output to the FM transmitter, through the TXO pin.
TXI
Voice ADC
Fs = 8kHz
ADPCM
Encoder
8 Phase DPSK
Modulator
Modem DAC
Fs = 48 kHz
TXO
At the receiving side, S5T8610 accepts the modem signal from the FM receiver, through the RXI pin, and
converts it into digital by internal modem ADC. The received signal is demodulated and decompressed into
digital voice signal. The digital voice signal is finally converted into analog by the internal voice codec, output,
through the RXO pin, to the external amplifier, and then to the speaker.
RXI
Modem ADC
Fs = 48kHz
8 Phase DPSK
Demodulator
ADPCM
Decoder
Voice DAC
Fs = 8 kHz
RXO
Initially S5T8610 is in the idle state after being reset by either the power-on-reset or external hardware reset. As
default, the S5T8610 is set to base set. For the base set, S5T8610 waits for the four bytes of the encryption ID.
For the hand set, S5T8610 must first receive the modem control command specifying the system is a hand set.
After receiving the modem control command, S5T8610 must receive four consecutive bytes of encryption ID for
encryption. S5T8610 can accept the first command from the host 72 µsec after a reset. After the first command,
the time between two consecutive commands must be at least 20µsec.
11
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
Reset
Reset
Not received
Not received
Encryption ID
byte 1
Not received
Received
Modem control
command
Not received
Encryption ID
byte 2
Not received
Received
Received
Not received
Received
Encryption ID
byte 2
Not received
Encryption ID
byte 4
Received
Received
Encryption ID
byte 1
Encryption ID
byte 3
Not received
Command specifies
the hand set
Received
Encryption ID
byte 3
Not received
Base set
Received
Encryption ID
byte 4
Received
Hand set
After specifying the hand or base set and encryption ID, the host can operate the S5T8610 in other modes by
sending the modem control command specifying the corresponding mode.
Reset
Hand set or base set
specified
Encryption ID specified
Modem control command
specifying the non modem
mode is received
Test mode
12
Loop back test
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
Encryption/Decryption
S5T8610 provides security by encryption. The encryption is achieved by using the scrambler within the modem.
Before starting an operation, the host must send encryption ID to the S5T8610. The encryption ID uniquely
initializes the scrambler. The encryption ID can be any number with 20 bit length which makes decoding by
others almost impossible (one in million). Although the test and the loop back test modes require the encryption
ID, the ID is not used for those functions.
S5T8610 only accepts data with length of 8 bits. The three MSB specify the command type. For encryption ID,
the three bits are 001. Therefore, the 20 bits are divided into four 8 bit words and sent in sequence from the host.
MSB
LSB
Bit 7
Bit 6
Bit 5
0
0
1
Bit 7
Bit 6
Bit 5
0
0
1
Bit 7
Bit 6
Bit 5
0
0
1
Bit 7
Bit 6
Bit 5
0
0
1
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
First 5 bits of the encryption ID
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Second 5 bits of the encryption ID
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Third 5 bits of the encryption ID
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Last 5 bits of the encryption ID
ADPCM
S5T8610 compresses voice signals by ADPCM with data rate of 24kbps or 16kbps. The default ADPCM rate is
24kbps. The 24kbps ADPCM has better sound quality than 16kbps ADPCM. However, S5T8610 does not provide
error detection and concealment for 24kbps because of the high data rate.
When the Received Signal Strength Indicator (RSSI) of RF module goes to high, the host can switch the ADPCM
data rate to 16kbps by sending the ADCPM control command. S5T8610 offers error detection and error
concealment for 16kbps ADPCM. This function provides longer communication range with security guaranteed.
By setting the BER_mute bit to 1, the modem is automatically set mute when the bit error rate is too high.
When the RSSI produces low signal or the BER pin shows indicates low bit error rate, the host can switch back
the ADPCM data rate to 24kbps to offer better sound quality.
13
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
Start
Run DCLP with
24 kbps ADPCM
No
RSSI produces
high signal?
Yes
DCLP tx mute on
Send FSK data
To indicate base set
(hand set) that ADPCM
is changed to 16 kbps
Set ADPCM to
16 kbps
DCLP tx mute off
Run DCLP with
16 kbps ADPCM
Hand set (base set) detects low signal and switches to 16 kbps ADPCM
Start
Run DCLP with
24 kbps ADPCM
No
Received FSK
data?
Data indicates that
ADPCM changed
to 16 kbps
Yes
Set ADPCM to
16 kbps
Run DCLP with
16 kbps ADPCM
Base set (hand set) changes to 16kbps ADPCM in response to the hand set (base set)
14
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
SYNCH/BER/JAM Pin
The SYNCH/BER/JAM pin is used for three purposes. The first is to signal the host that the initial synchronization
between the hand set and base set is established. The second, used only with 24kbps ADPCM, is to signal the
host that jamming is detected, with the pin finally showing the bit error rate (BER). The third function is used only
with 16kbps ADPCM operation mode.
ADPCM
First Pulse
Rest of Pulses
24kbps
Initial Synchronization
Jamming Detection
16kbps
Initial Synchronization
Bit Error Rate
After receiving the encryption ID from the host, the hand set and the base set modems exchange protocols to
establish initial synchronization between them. Immediately after the initial synchronization, the
SYNCH/BER/JAM pin produces high for 10msec. The pin normally produces low. Therefore, the first output of
the SYNCH/BER/JAM pin is always the high signal for 10msec, representing the initial synchronization.
While the 16kbps ADPCM is running, S5T8610 can detect error and indicate the BER through the
SYNCH/BER/JAM pin. When an error is detected, the pin is set high for a given time duration. The duration of
the high signal represents the BER range. After producing high, the pin produces low for 20msec before detecting
the next BER. The following table shows BER ranges with their assigned pulse duration. For BER lower than 1.99
× 10-8, the pin does not produce high since the error is insignificant.
BER
From
Symbol Error Rate
To
From
above 4.16 × 10-2
To
Above 2-3
Time Between Error
From
Pulse
Duration
To
below 1 msec
20 msec
4.16 × 10-2
2.08 × 10-2
2-3
2-4
1 msec
2 msec
40 msec
2.08 × 10-2
1.04 × 10-2
2-4
2-5
2 msec
4 msec
60 msec
1.04 × 10-2
5.21 × 10-3
2-5
2-6
4 msec
8 msec
80 msec
5.21 × 10-3
2.60 × 10-3
2-6
2-7
8 msec
16 msec
100 msec
2.60 × 10-3
1.30 × 10-3
2-7
2-8
16 msec
32 msec
120 msec
1.30 × 10-3
6.51 × 10-4
2-8
2-9
32 msec
64 msec
140 msec
6.51 × 10-4
3.26 × 10-4
2-9
2-10
64 msec
128 msec
160 msec
3.26 × 10-4
1.63 × 10-4
2-10
2-11
128 msec
256 msec
180 msec
1.63 × 10-4
8.14 × 10-5
2-11
2-12
256 msec
512 msec
200 msec
8.14 × 10-5
4.07 × 10-5
2-12
2-13
512 msec
1.024 sec
220 msec
4.07 × 10-5
2.03 × 10-5
2-13
2-14
1.024 sec
2.048 sec
240 msec
2.03 × 10-5
1.02 × 10-5
2-14
2-15
2.048 sec
4.096 sec
260 msec
1.02 × 10-5
5.09 × 10-6
2-15
2-16
4.096 sec
8.192 sec
280 msec
5.09 × 10-6
2.54 × 10-6
2-16
2-17
8.192 sec
16.384 sec
300 msec
2.54 × 10-6
1.27 × 10-6
2-17
2-18
16.384 sec
32.768 sec
320 msec
1.27 × 10-6
6.36 × 10-7
2-18
2-19
32.768 sec
1 min 5.5 sec
340 msec
15
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
BER
Symbol Error Rate
Time Between Error
Pulse
Duration
From
To
From
To
From
To
6.36 × 10-7
3.18 × 10-7
2-19
2-20
1 min 5.5 sec
2min 11.1 sec
360 msec
3.18 × 10-7
1.59 × 10-7
2-20
2-21
2 min 11.1 sec
4 min 22.1 sec
380 msec
1.59 × 10-7
7.95 × 10-8
2-21
2-22
4 min 22.1 sec
8 min 44.3 sec
400 msec
7.95 × 10-8
3.97 × 10-8
2-22
2-23
8 min 44.3 sec
17 min 28.6 sec
420 msec
3.97 × 10-8
1.99 × 10-8
2-23
2-24
17 min 28.6 sec 34 min 57.2 sec
440 msec
100 msec
20
msec
Next BER
BER of 3.33 x 10-3 detected
For 24kbps ADPCM, this pin produces high for 20msec when jamming is detected. After producing high, the BER
pin produces low for 20msec before detecting the next jamming. Jamming detection is not necessary for 16kbps
ADPCM, since BER can be used for detecting jamming.
20 20
msec msec
Jamming detection in 24 kbps ADPCM
DTMF Generator
In order to generate a DTMF signal, the host must set S5T8610 to DTMF mode. S5T8610 outputs the DTMF tone
through the DTMF pin. The RXO pin is set mute during the DTMF mode. The hand set and the base set still
communicate with each other so that the DTMF tones can be monitored.
S5T8610 generates the DTMF tone for 100msec when the tone code is received from the host. After generating
the tone for 100msec, the DTMF pin produces low for the next 50msec. After generating DTMF tones, the host
can set S5T8610 back to normal operation, ADPCM and modem, using the DTMF release command.
16
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
100 msec
50 msec
Typical DTMF tone generation
The single tone and continuous tone can be generated using the DTMF control command. The commands and
tables related to DTMF generation is shown in the Command Set section.
17
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
COMMAND SET
S5T8610 receives commands from the host through its HIU. The HIU only accepts commands with length of 1
byte.
Modem Control
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0
0
0
Rx_Mute
Tx_Mute
Bit 2
Bit 1
Bit 0
Modem Mode
Controls the operation of the modem. When Modem_Mode is set to test mode, the S5T8610 produces 9kHz sine
wave through the modem TXO pin. In the loop back test mode, the S5T86010 receives its own transmitted signal
by connecting modem TXO and RXI pins.
Modem Mode (Bit 2, Bit 1, and Bit 0)
 000: Base Set
 001: Hand Set
 010: Reserved
 011: Reserved
 100: Test Mode
9kHz sine wave is produced through the modem Tx pin.
Note that the receiver does not recognize the sine wave.
 101: Loop Back Test Mode
 Default: Base Set
Tx_Mute (Bit 3)

Modem Tx Mute On/Off

0: Mute Off

1: Mute On

Default: Mute Off
Rx_Mute (Bit 4)

Modem Rx Mute On/Off

0: Mute Off

1: Mute On

Default: Mute Off
18
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
Encryption ID
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
1
5 bits of the 20 bit encryption ID
The four consecutive encryption ID commands must be sent to S5T8610 at the beginning of an operation. The
four encryption ID commands are needed because the encryption ID is 20 bits wide.
ADPCM Control
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
Reserved
Reserved
BER_Mute
Voice_Mute
ADPCM_
Type
Controls ADPCM operation. In 16kbps ADPCM mode with Bit 2 set to 1, the voice output is automatically set
mute when the BER is too high. The default value is 0x40.
ADPCM Type (Bit 0)

0: 24kbps ADPCM

1: 16kbps ADPCM

Default: 24kbps ADPCM
Voice_Mute (Bit 1)

Voice Codec Mute On/Off

0: Mute Off

1: Mute On
–
Default: Mute Off
BER_Mute (Bit 2)

Voice output is set mute when BER is high

Applies only to 16kbps ADPCM

0: voice output is not set mute even when BER is too high

1: voice output is automatically set mute when BER is too high

Default: Mute Off
19
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
Digital Volume Control
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
1
Reserved
SPK3
SPK2
SPK1
SPK0
Controls the voice output volume of the ADPCM. The default volume is 0 dB, setting this command to 0x66.
DATA
Gain/
Output Level
SPK3
SPK2
SPK1
SPK0
Attenuation
0
0
0
0
-12 dB
5 mVrms
0
0
0
1
-10 dB
6 mVrms
0
0
1
0
-8 dB
8 mVrms
0
0
1
1
-6 dB
10 mVrms
0
1
0
0
-4 dB
13 mVrms
0
1
0
1
-2 dB
16 mVrms
0
1
1
0
0 dB (default)
20 mVrms
0
1
1
1
2 dB
26 mVrms
1
0
0
0
4 dB
33 mVrms
1
0
0
1
6 dB
42 mVrms
1
0
1
0
8 dB
53 mVrms
1
0
1
1
10 dB
67 mVrms
1
1
0
0
12 dB
84 mVrms
1
1
0
1
14 dB
108 mVrms
1
1
1
0
16 dB
135 mVrms
1
1
1
1
18 dB
170 mVrms
Voice Codec On/Off
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
1
0
0
1
0
VC_SW
This command is used for switching the internal voice coded on/off
VC_SW (Bit 0)

0: voice Codec power down

1: voice Codec power on (default)
20
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
DTMF Mode On/Off
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
1
0
0
1
1
DTMF_SW
The host sets S5T8610 into DTMF mode by sending this command with the LSB set to 1. S5T8610 still operates
the modem in DTMF mode so that the DTMF tones can be monitored. The host sets the S5T8610 back to normal
operation, in which the ADPCM and modem are running, by using this command with the LSB set to 0.
DTMF_SW (Bit 0)

0: Normal Mode (Default)

1: DTMF Mode
DTMF Tone Code
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
0
Reserved
TC3
TC2
TC1
TC0
The DTMF tone is generated for 100msec after receiving this command. The tone is generated through the
DTMF pin. The RXO pin is set mute during the DTMF generation mode. This command only operates when
S5T8610 is set to DTMF mode. When DTMF mode is not set, this command is ignored. Since S5T8610 must
receive this command to generate a DTMF tone, there is no default value.
DATA
DTMF Code
TC3
TC2
TC1
TC0
0
0
0
0
D
0
0
0
1
1
0
0
1
0
2
0
0
1
1
3
0
1
0
0
4
0
1
0
1
5
0
1
1
0
6
0
1
1
1
7
1
0
0
0
8
1
0
0
1
9
1
0
1
0
*
1
0
1
1
0
1
1
0
0
#
1
1
0
1
A
1
1
1
0
B
1
1
1
1
C
21
PRELIMINARY
S5T8610
22
DIGITAL CLP MODEM WITH ADPCM CODEC
high 1
high 2
high 3
high 4
low 1
1
2
3
A
low 2
4
5
6
B
low 3
7
8
9
C
low 4
*
0
#
D
Low Freq Indicator
Specified Freq (Hz)
Actual Freq (Hz)
% Error
low 1
697
703.125
0.88 %
low 2
770
765.625
0.57 %
low 3
852
859.375
0.87 %
low 4
941
937.5
0.37 %
High Freq Indicator
Specified Freq (Hz)
Actual Freq (Hz)
% Error
high 1
1209
1203.125
0.49 %
high 2
1336
1343.75
0.58 %
high 3
1447
1484.375
0.50 %
high 4
1633
1640.625
0.47 %
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
DTMF Level Control
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
1
Reserved
TL3
TL2
TL1
TL0
Controls output volume of the DTMF output tone. The default volume is 7.67dBm, setting this command to 0xAC.
DATA
Gain/
Output Level
TL3
TL2
TL1
TL0
Attenuation
0
0
0
0
-16.33 dBm
13.7 mVrms
0
0
0
1
-14.33 dBm
17.3 mVrms
0
0
1
0
-12.33 dBm
21.7 mVrms
0
0
1
1
-10.33 dBm
27.3 mVrms
0
1
0
0
-8.33 dBm
34.3 mVrms
0
1
0
1
-6.33 dBm
43.2 mVrms
0
1
1
0
-4.33 dBm
54.3 mVrms
0
1
1
1
-2.33 dBm
68.4 mVrms
1
0
0
0
-0.33 dBm
86.1 mVrms
1
0
0
1
1.67 dBm
108.5 mVrms
1
0
1
0
3.67 dBm
136.5 mVrms
1
0
1
1
5.67 dBm
171.8 mVrms
1
1
0
0
7.67 dBm
(default)
216.1 mVrms
1
1
0
1
9.67 dBm
273.5 mVrms
1
1
1
0
11.67 dBm
343.0 mVrms
1
1
1
1
13.67 dBm
431.5 mVrms
23
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
DTMF Control
Bit 7
Bit 6
Bit 5
Bit 4
1
1
0
Reserved
Bit 3
DTMF_Cont
Controls the DTMF generator. The default value is 0xC0.
DTMF_Mode (Bit 1 and Bit 0)
 00: Dual Tone
 01: Single Tone (Low Frequency Only)
 10: Single Tone (High Frequency Only)
 Default: Dual Tone
DTMF_Cont (Bit 3 and Bit 2)
 00: Generate DTMF tone for 100 msec followed by silence for 50 msec
 01: Generate DTMF tone continuously
 10: Stop generate the continuous DTMF tone
 Default: 00
24
Bit 2
Bit 1
Bit 0
DTMF_Mode
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
APPLICATION CIRCUIT
+3.6V(TXB+)
R38
10
C32
+5V
Q4
C1623Y
TP4
TP
C26
R31
27k
3.9N
R30
4.7k
TP4
TP
R29
10k
C25
3.3N
R28
22k
R35
33k
C30 1.5N
C23
10N
C24
10N
C27
R32
100N
6.8k
C28
33N
R33
13
6.8k
12
C19
R23
10uH
C14
10p
49
50
51
52
53
C15
1N
C16
20p
RESET
VSSD2
VSSD1
DET
1
2
3
4
5
2
1
MIC
MICROPHONE
R41
15
VDDA
48
R40
1k
47
46
VDDD
+3.6V
C43 C44
100N 100uF
45
6 5
4
B1
C34
1uF TK11233BM
1 2
3
44
R42
C36
4.7uF
15
C37
100N
C38
10uF
C39
100N
C40
10uF
C35
100N
43
42
41
40
39
38
37
R19
1k
HWEB
36
R18
1k
HCLK
35
R17
1k
HDATA
34
R16
1k
RESETB
33
32
BER/JAM
TS HFTDR
HDATA
31
TCLKDR
C20
10N
22N
Vref
TD10
TD11
TD12
VDDD_CDC
54
HCLK
X1
36.8MHz
L1
VSSD_CDC
55
56
57
58
59
60
61
HWEB
VDDD1
TUPDD R
C42
100N
AINFB
TXI
VSSA_CDC
VREFOUT
DTMF
RXO
VDDA_CDC
VSSD_DAC
TEST3
16
TD0
30
15
TD1
TEST2
R12
120k
TD2
29
C10
47N
TD3
TEST1
C11
100N
TD4
28
14
TD5
TEST0
13
TD9
TD6
27
12
CKOUT
VDDD
R10
120k
VDDD_DAC
26
C12
10µ F
R11
10k
11
+3.6V
VSSA_DAC
VSSD_OSC
10
VDDA_DAC
25
100N
R13
10
9
TXO
OSCO
+3.6V
100N
VRB
17
C13
8
27p
Vref
MOD in
C8
OSCI
C9
R8
22k
VDDD2
S5T8610
DIGITAL
CLP
MODEM
VRT
10k
1
SPEAKER
+3.3V
TD7
RXI
24
7
R9
120k
6
5
SP1
2
100p
R100 22k
R36 C31
C33
6.8k 47N
R34
C50
22uF
10k
R39
100N
U1D
R27
150
KA324
2.2k
C22
R26
10uF
2.2k
R24
C21
VDDD
VSSA_ADC
VDDD_OSC
6
23
5
C46
10uF
TD8
22
4
C47
100N
VDDA_ADC
TINT
C7
100N
AGND
21
C6
1uF
VREF
TODR
3
20
2
TIDR
R6
10k
1
VDDA
C48
100N
19
+3.3V
63
64
VDDA
C41
100N
R7
10k
VSSD_ADC
C3
100N
VDDD_ADC
100N
Vref
R1
10k
TSELDR1
Vref
R4
10k
TSELDR0
22N
100N
C1
62
C49
R3
22k
REFH
VDDD
27p
C4
REFL
C2
R5
6.8k C5
Demod
1.2N
Out
100k
R22 C18
1k 100N
R20
C17
100k
R25
10N
VDDD
10k
C45 100N
R21
100k
220k
18
R2
100p
C29
22uF R37
100
R15
1k
BER/JAM DET
L2
3.3uH
25
PRELIMINARY
S5T8610
DIGITAL CLP MODEM WITH ADPCM CODEC
NOTES
26
PRELIMINARY
DIGITAL CLP MODEM WITH ADPCM CODEC
S5T8610
PACKAGE DIMENSIONS
17.20 ± 0.30
0-8
14.00 ± 0.20
+ 0.10
14.00 ± 0.20
0.10 MAX
64-QFP-1414
0.80 ± 0.20
17.20 ± 0.30
0.15 - 0.05
#64
#1
0.35 ± 0.10
0.80
0.05 MIN
(1.00)
2.60 ± 0.10
2.80 MAX
NOTE: Dimensions are in millimeters.
27