Ordering number : ENN5844 Monolithic Linear IC LA76070 NTSC Color Television IC Overview Package Dimensions The LA76070 is an NTSC color television IC. In addition to providing IIC bus control based rationalization of IC control and the adjustment manufacturing process associated with the TV tube itself, it also includes all functions actually required in mass-produced television sets. As such, it is an extremely practical bus control IC. unit: mm 3128-DIP52S [LA76070] 0.25 * The LA7840/41 or LA7845N/46N is recommended as the vertical output IC for use with this product. 13.8 27 15.24 52 1 26 4.25 0.48 1.05 1.78 0.75 0.51min 3.8 • I 2 C bus control, VIF, SIF, Y, C, and deflection integrated on a single chip. 5.1max 46.0 Functions SANYO: DIP52S Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Rating Unit V4 max 9.6 V26 max 9.6 V Maximum power supply current I21 max 25 mA Maximum power supply voltage Ta ≤ 65°C* V Allowable power dissipation Pd max 1.3 W Operating temperature Topr –10 to +65 °C Storage temperature Tstg –55 to +150 °C Rating Units Note: *Provided on a printed circuit board: 83.2 × 86.0 × 1.6 mm, material: Bakelite Operating Conditions at Ta = 25°C Parameter Recommended power supply voltage Recommended power supply current Operating power supply voltage range Operating power supply current range Symbol Conditions V4 7.6 V26 7.6 V V I21 19 mA V4 op 7.3 to 7.9 V26 op 7.3 to 7.9 V V 121 op 16 to 25 mA Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 70999 RM (OT) No. 5844-1/27 LA76070 Electrical Characteristics at Ta = 25°C, VCC = V4 = V26 = 7.6 V, ICC = I21 = 19 mA Parameter Symbol Conditions Ratings min typ max Unit [Circuit Voltages and Currents] Horizontal power supply voltage IF power supply current (V4) Video, chroma, and vertical power supply current (V26) HVCC I4 (IFICC) IF AGC: 5 V I26 (YCVICC) 7.2 7.6 8.0 V 38 46 54 mA 79.5 93.5 107.5 mA Vdc [VIF Block] AFT output voltage with no signal VAFTn With no input signal 2.8 3.8 4.8 Video output voltage with no signal VOn With no input signal 4.7 4.9 5.1 APC pull-in range (U) fPU After APC and PLL DAC adjustment 1.0 APC pull-in range (L) fPL After APC and PLL DAC adjustment 1.0 Maximum RF AGC voltage VRFH CW = 91 dBµ, DAC = 0 7.7 8.2 9.0 Minimum RF AGC voltage VRFL CW = 91 dBµ, DAC = 63 0 0.2 0.4 RF AGC Delay Pt (@DAC = 0) RFAGC0 DAC = 0 RF AGC Delay Pt (@DAC = 63) RFAGC63 DAC = 63 Vdc MHz MHz 96 Vdc Vdc dBµ 86 dBµ Maximum AFT output voltage VAFTH CW = 93 dBµ, variable frequency 6.2 6.5 7.6 Vdc Minimum AFT output voltage VAFTL CW = 93 dBµ, variable frequency 0.5 0.9 1.2 Vdc AFT detection sensitivity VAFTS CW = 93 dBµ, variable frequency 33 25 17 mV/kHz VO 93 dBµ, 87.5% Video MOD 1.8 2.0 2.2 Vp-p VOtip 93 dBµ, 87.5% Video MOD 2.4 2.6 2.8 Vdc 43 46 dBµ Video output amplitude Synchronization signal tip level Input sensitivity Vi Output at –3 dB Video-to-sync ratio (@100 dBµ) V/S 100 dBµ, 87.5% Video MOD 2.5 3.0 Differential gain DG 93 dBµ, 87.5% Video MOD 2.4 2 10 % Differential phase DP 93 dBµ, 87.5% Video MOD 2 10 deg Video signal-to-noise ratio S/N CW = 93 dBµ 920 kHz beat level I920 V3.58 MHz/V920 kHz 55 58 dB –50 dB [Video and Switching Block] External video gain AUXG Stair step, 1 V p-p 5.5 6.0 6.5 dB External video sync signal tip voltage AUXS Stair step, 1 V p-p –0.2 0.0 +0.2 Vdc External video crosstalk AUXC 4.2 MHz, 1Vp-p Internal video output level INTO 93 dBµ, 87.5% Video MOD –0.1 0.0 +0.1 Vp-p 464 474 484 mVrms 50 dBµ 100 k Hz 0.5 % 60 dB [SIF Block] FM detector output voltage FM limiting sensitivity FM detector output bandwidth SOADJ SLS Output at –3 dB SF Output at –3 dB FM detector output total harmonic distortion STHD FM = ±25 kHz AM rejection ratio SAMR AM = 30 % SIF signal-to-noise ratio SSN 50 40 dB 60 dB [Audio Block] Maximum gain Adjustment range Frequency characteristics Muting Total harmonic distortion Signal-to-noise ratio AGMAX 1 kHz ARANGE –2.5 0.0 60 67 AF 20 kHz –3.0 AMUTE 20 kHz 75 ATHD ASN +2.5 dB dB +3.0 dB dB 1 kHz, 400 m Vrms, Vo1: MAX 0.5 DIN.Audio 65 75 dB dB [Chroma Block] ACC amplitude characteristics 1 ACCM1 Input: +6 dB/0 dB, 0 dB = 40 IRE 0.8 1.0 1.2 times ACC amplitude characteristics 2 ACCM2 Input: –14 dB/0 dB 0.7 1.0 1.1 times B-Y/Y amplitude ratio CLRBY 100 125 140 % Color control characteristics 1 CLRMN Color MAX/NOM 1.6 1.8 2.1 times Color control characteristics 2 CLRMM Color MAX/MIN 33 40 50 dB Continued on next page. No. 5844-2/27 LA76070 Continued from preceding page. Parameter Symbol Conditions Ratings min typ 1 Unit max Color control sensitivity CLRSE Tint center TINCEN TINT NOM –15 2 4 %/bit –3 Tint control maximum TINMAX TINT MAX 30 deg 45 60 Tint control minimum TINMIN TINT MIN –60 deg –45 –30 Tint control sensitivity TINSE 0.7 deg 2.0 deg/bit Demodulator output ratio R-Y/B-Y RB 0.75 0.85 0.95 Demodulator output ratio G-Y/B-Y GB 0.28 0.33 0.38 Demodulator angle B-Y/R-Y ANGBR 92 99 107 deg Demodulator angle G-Y/B-Y ANGGB 227 237 247 deg –42 –37 –30 dB +350 Hz –350 Hz Killer operating point KILL Chrominance VCO free-running frequency CVCOF Chrominance pull-in range (+) PULIN+ Chrominance pull-in range (–) PULIN– 0 dB = 40 IRE Deviation from 3.579545 MHz –350 350 Hz Auto-flesh characteristic 73° AF 073 5 10 20 deg Auto-flesh characteristic 118° AF 118 –7 0 +7 deg Auto-flesh characteristic 163° AF 163 –20 –10 –5 deg Overall video gain (Contrast set to maximum) CONT63 10 12 14 dB Contrast adjustment characteristic (Normal/maximum) CONT32 –7.5 –6.0 –4.5 dB Contrast adjustment characteristic (Minimum/maximum) CONT0 –17 –14 –11 dB Yf0 –6.0 –3.5 0.0 dB [Video Block] Video frequency characteristic Trap & D = 0 Chrominance trap level Trap & D = 1 Ctrap DC propagation ClampG Y delay, f0 = 1 YDLY Maximum black stretching gain Sharpness adjustment range –20 95 100 dB 105 430 % ns BKSTmax 6 13 20 IRE (normal) Sharp16 4 6 8 dB (max) Sharp31 9.0 11.5 14.0 dB (min) Sharp0 –6.0 –3.5 –1.0 dB RGBBLK 1.4 1.6 1.8 V Horizontal/vertical blanking output level [OSD Block] FSTH 0.9 1.2 1.7 V Red RGB output level OSD fast switch threshold ROSDH 220 250 280 IRE Green RGB output level GOSDH 220 250 280 IRE Blue RGB output level BOSDH 220 250 280 IRE Analog OSD R output level gain matching RRGB 1.5 1.9 2.3 Ratio Linearity LRRGB 45 50 60 % Analog OSD G output level gain matching GRGB 1.5 1.9 2.3 Ratio Linearity LGRGB 45 50 60 % Analog OSD B output level gain matching BRGB 1.5 1.9 2.3 Ratio Linearity LBRGB 45 50 60 % [RGB Output (cutoff and drive) Block] Brightness control (normal) BRT64 2.1 2.65 3.2 V High brightness (maximum) BRT127 15 20 25 IRE Low brightness (minimum) BRT0 –25 –20 –15 IRE Continued on next page. No. 5844-3/27 LA76070 Continued from preceding page. Parameter Cutoff control (Bias control) Drive adjustment Symbol Conditions Ratings min typ max (minimum) Vbias0 2.1 2.65 3.2 (maximum) Vbias127 2.45 3.0 3.55 Resolution Vbiassns 4 RBout127 2.9 Gout127 2.4 Maximum output Output attenuation Unit V V mV/Bit Vp-p Vp-p RBout0 7 9 11 dB Ssync 3 8 13 IRE ∆fH 15600 15734 15850 Hz fH PULL ±400 [Deflection Block] Sync separator sensitivity Horizontal free-running frequency deviation Horizontal pull-in range Horizontal output pulse saturation voltage V Hsat Horizontal output pulse phase HPHCEN Horizontal position adjustment range HPHrange Horizontal position adjustment maximum variability X-ray protection circuit operating voltage Hz 0 0.06 0.4 V 9.5 10.5 11.5 µs 4 bits ±2 HPHstep VXRAY 0.54 0.64 µs 530 ns 0.74 V [Vertical screen Size Adjustment] Vertical ramp output amplitude @32 Vsize32 VSIZE: 100000 0.47 0.82 1.17 Vp-p Vertical ramp output amplitude @0 Vsize0 VSIZE: 000000 0.13 0.48 0.83 Vp-p Vertical ramp output amplitude @63 Vsize63 VSIZE: 111111 0.80 1.15 1.50 Vp-p [Vertical screen Position Adjustment] Vertical ramp DC voltage @32 Vdc32 VDC: 100000 3.6 3.8 4.0 Vdc Vertical ramp DC voltage @0 Vdc0 VDC: 000000 3.2 3.4 3.6 Vdc Vertical ramp DC voltage @63 Vdc63 VDC: 111111 4.0 4.2 4.4 Vdc No. 5844-4/27 LA76070 LA76070 BUS: Initial Conditions Initial test conditions Initial test conditions Register (continued) Register T Enable 0 HEX Video SW 0 HEX Video Mute 1 HEX PLL Tuning 40 HEX Sync Kill 0 HEX Audio Mute 1 HEX AFC Gain 0 HEX APC Det Adjust 20 HEX Horizontal Phase 4 HEX V CD Mode 0 HEX IF AGC SW 0 HEX Vertical DC 20 HEX AFT Defeat 0 HEX Vertical Kill 0 HEX RF AGC Delay 20 HEX Col Kill 0 HEX Vertical Size 20 HEX Red Bias 00 HEX Green Bias 00 HEX Blue Bias 00 HEX Blanking Defeat 0 HEX Red Drive 7F HEX Blue Drive 7F HEX Color Difference Mode Enable 0 HEX Brightness Control 40 HEX Contrast Test Enable 0 HEX Contrast Control 40 HEX Trap & Delay Enable SW 0 HEX Auto Flesh 0 HEX Black Stretch Defeat 0 HEX Sharpness Control 10 HEX Tint Test Enable 0 HEX Tint Control 40 HEX Color Test Enable 0 HEX Color Control 40 HEX Vertical Test 0 HEX Video Level 4 HEX FM Level 10 HEX BNI Enable 0 HEX Audio SW 0 HEX Volume Control 00 HEX No. 5844-5/27 LA76070 LA76070 BUS: Control Register Descriptions Control register descriptions Register name Bits General descriptions T Enable 1 Disable the Test SW & enable Video Mute SW Video Mute 1 Disable video outputs Sync Kill 1 Force free-run mode AFC Gain 1 Select horizontal first loop gain Horizontal Phase 3 Align sync to flyback phase IF AGC SW 1 Disable IF and RF AGC AFT Defeat 1 Disable AFT output RF AGC Delay 6 Align RF AGC threshold Video SW 1 Select Video Signal (INT/EXT) PLL Tuning 7 Align IF VCO frequency Audio Mute 1 Disable audio outputs APC Det Adjust 6 Align AFT crossover V Count Down Mode 1 Select vertical countdown mode Vertical DC 6 Align vertical DC bias Vertical Kill 1 Disable vertical output Color Kill 1 Enable Color Killer Vertical Size 6 Align vertical amplitude Red Bias 7 Align Red OUT DC level Green Bias 7 Align Green OUT DC level Blue Bias 7 Align Blue OUT DC level Blanking Defeat 1 Disable RGB output blanking Red Drive 6 Align Red OUT AC level Drive Test 1 Enable drive DAC test mode Blue Drive 6 Align Blue OUT AC level Color Difference Mode Enable 1 Enable color difference mode Brightness Control 7 Customer brightness control Contrast Test 1 Enable Contrast DAC test mode Contrast Control 7 Customer Contrast control Trap & Delay-SW 1 Select luma filter mode Auto Flesh Enable 1 Enable autoflesh function Black Stretch Defeat 1 Disable black stretch Sharpness Control 5 Customer sharpness control Tint Test 1 Enable tint DAC test mode Tint Control 7 Customer tint control Color Test 1 Enable color DAC test mode Color Control 7 Customer color control Vertical Test 3 Select vertical DAC test modes Video Level 3 Align IF video level FM Level 5 Align WBA output level BNI Enable 1 Enable black noise inverter Audio SW 1 Select Audio Signal (INT/EXT) Volume Control 6 Customer volume control No. 5844-6/27 LA76070 LA76070 BUS: Control Register Truth Table Control register truth table Register name 0 HEX 1 HEX Test Enable Test Disable Audio Mute Active Mute Video Mute Active Mute Sync active Sync Killed T Enable Sync Kill Slow Fast IF AGC SW AFC Gain AGC active AGC Defeat AFT Defeat AFT active AFT Defeat BNI Enable BNI active BNI Defeat Count Down Mode Standard Non-Stand Vertical Kill Vrt active Vrt Killed F0 Select 3.58 trap 8.00 APF Auto Flesh Enable AF Off AF On Overload Enable Ovld Off Ovld On Tint DAC Test Normal Test Mode Color DAC Test Normal Test Mode Contrast DAC Test Normal Test Mode Drive DAC Test Normal Test Mode Blk Str On Blk Str Off Black Stretch Defeat Blanking Defeat Color Diff Mode Enable Vertical Test Blanking No Blank RGB Mode C Diff Mode Normal Ver Size Test No. 5844-7/27 LA76070 LA76070 Bit Map (‘96.08.01) IC address: BAH (101111010) Sub address MSB DATA LSB D0....D7 DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7 $00 * * * * T_Enable * Vid_Mute Sync_Kill 0 1 0 * * * * AFC Gain H_Phase IFAGC SW AFT DEF (tr2) 0 0 $03 VIDEO SW (tr3) 0 1 $04 * Aud_Mute (tr0) $01 (tr1) $02 0 (tr4) $05 0 $06 Ver_kill Col_kill (tr6) 0 0 $07 * $08 0 0 1 0 0 (tr11) 0 $0C C_Diff (tr12) 0 $0D Cot_Test 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G_Bias 0 0 0 B_Bias 0 0 0 Ver_Size 0 0 BLK_DEF Drv_Test 0 R_Bias 0 $0B 0 Ver_dc * (tr10) 0 APC DET ADJUST 1 0 (tr9) $0A 0 * (tr8) $09 1 * (tr5) (tr7) 0 PLL TUNING 1 V CD MODE 1 RF_AGC_Delay 0 R_Drive 1 1 1 1 B_Drive 1 1 1 1 Bright 1 0 0 0 Contrast (tr13) 0 1 0 $0E Trap & D_SW A Fresh Black ST (tr14) 0 0 0 $0F Tint_Test 0 0 Sharpness 1 0 Tint (tr15) 0 $10 Col_Test 1 0 0 0 (tr16) 0 1 0 0 0 $11 * * * * * Color (tr17) 0 V_test 0 $12 VIDEO LEVEL (tr18) 1 0 $13 N/I SW AUDIO SW (tr19) 0 0 0 0 0 0 0 0 0 0 FM LEVEL 0 1 0 VOLUME 0 0 0 No. 5844-8/27 LA76070 Measurement Conditions at Ta = 25°C, VCC = V4 = V26 = 7.6 V, ICC = I21 = 19 mA Parameter Symbol Measurement point Input signal Measurement method Bus conditions [Circuit Voltages and Currents] Horizontal power supply voltage HVCC 21 IF power supply current (pin 4) I4 (IFICC) 4 Video/vertical power supply current (pin 26) I26 (DEFICC) 26 No signal Apply a 19mA current to pin 21 and measure the pin 21 voltage at that time Initial conditions Apply a voltage of 7.6 V to pin 4 and measure (in mA) the DC current that flows into the IC. (Apply 5 V to the IF AGC.) Initial conditions Apply a voltage of 7.6 V to pin 26 and measure (in mA) the DC current that flows into the IC Initial conditions No. 5844-9/27 LA76070 VIF Block Input Signals and Measurement Conditions 1. All input signals are applied to PIF IN (pin 10) as shown in the measurement circuit diagrams. 2. The input signal voltage values are all the value of VIF IN (pin 10) as shown in the measurement circuit diagrams. 3. The table below lists the input signals and their levels. Input signal Waveform Condition SG1 45.75 MHz SG2 42.17 MHz SG3 41.25 MHz SG4 Variable frequency 45.75 MHz 87.5 % video modulation SG5 10-step staircase waveform (Subcarrier: 3.58 MHz) 45.75 MHz 87.5 % video modulation Sweep signal SG6 (APL: 50 IRE Sweep signal level: 40 IRE) 45.75 MHz SG7 87.5 % video modulation Flat field signal 4. Perform the following D/A converter adjustments in the order listed before testing. Item Measurement point Input signal Adjustment APC DAC 13 No signal, IF.AGC.DEF = 1 Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible PLL DAC 13 SG1, 93 dBµ Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible Video 45 SG7, 93 dBµ Set up the DAC value so that the pin 45 output level is as close to 2.0 V p-p as possible No. 5844-10/27 LA76070 Measurement Input signal point Parameter Symbol Measurement procedure Bus conditions AFT output voltage with no signal VAFTn 13 No signal Measure the pin 13 DC voltage when IF.AGC. DEF is "1" After performing the adjustments described in section 4 Video output voltage with no signal VOn 45 No signal Measure the pin 45 DC voltage when IF.AGC. DEF is "1" After performing the adjustments described in section 4 After performing the adjustments described in section 4 [VIF Block] fPU, fPL 45 SG4 93 dBµ Connect an oscilloscope to pin 45 and modify the SG4 signal to be a frequency above 45.75 MHz so that the PLL circuit becomes unlocked. (Beating will occur in this state.) Gradually lower the SG4 frequency and measure the frequency at which the PLL circuit locks. Similarly, modify the frequency to a value below 45.75 MHz so that the PLL circuit becomes unlocked. Gradually raise the SG4 frequency and measure the frequency at which the PLL circuit locks. Maximum RF AGC voltage VRFH 6 SG1 91 dBµ Set the RF AGC DAC to 0 and measure the pin After performing the adjustments 6 DC voltage described in section 4 Minimum RF AGC voltage VRFL 6 SG1 91 dBµ Set the RF AGC DAC to 63 and measure the pin 6 DC voltage After performing the adjustments described in section 4 RF AGC Delay Pt (@DAC = 0) RFAGC0 6 SG1 Set the RF AGC DAC to 0 and determine the input level such that the pin 6 DC voltage becomes 3.8 V ±0.5 V After performing the adjustments described in section 4 RF AGC Delay Pt (@DAC = 63) RFAGC63 6 SG1 Set the RF AGC DAC to 63 and determine the input level such that the pin 4 DC voltage becomes 3.8 V ±0.5 V After performing the adjustments described in section 4 Maximum AFT output voltage VAFTH 13 SG4 93 dBµ Set the SG4 signal frequency to 44.75 MHz and input that signal. Measure the pin 13 DC voltage at that time. After performing the adjustments described in section 4 Minimum AFT output voltage VAFTL 13 SG4 93 dBµz Set the SG4 signal frequency to 46.75 MHz and input that signal. Measure the pin 13 DC voltage at that time. After performing the adjustments described in section 4 AFT detection sensitivity VAFTS 13 SG4 93 dBµz Modify the SG4 frequency to determine the frequency deviation (∆f) such that the pin 13 DC voltage changes from 2.5 V to 5.0 V. VAFTS = 2500/∆f [mV/kHz] After performing the adjustments described in section 4 VO 45 SG7 93 dBµ Observe pin 45 with an oscilloscope and measure the p-p value of the waveform After performing the adjustments described in section 4 VOtip 45 SG1 93 dBµ Measure the pin 45 DC voltage After performing the adjustments described in section 4 APC pull-in range (U), (L) Video output amplitude Synchronization signal tip level Input sensitivity Vi 45 SG7 Observe pin 45 with an oscilloscope and measure the peak-to-peak value of the waveform. Next, gradually lower the input level to determine the input After performing the adjustments described in section 4 level such that the output becomes –3 dB below the video signal amplitude VO. Video-to-sync ratio (@ 100 dBµ) V/S 45 SG7 100 dBµ Observe pin 45 with an oscilloscope and determine the value of the Vy/Vs ratio by After performing the adjustments measuring the peak-to-peak value of the sync described in section 4 waveform (Vs) and the peak-to-peak value of the luminance signal (Vy). Differential gain DG 45 SG5 93 dBµ Measure pin 45 with a vectorscope After performing the adjustments described in section 4 Differential phase DP 45 SG5 93 dBµ Measure pin 45 with a vectorscope After performing the adjustments described in section 4 SG1 93 dBµ Pass the noise voltage that occurs on pin 45 through a 10 kHz to 4 MHz bandpass filter, measure that voltage (Vsn) with an rms voltmeter. Use that value to calculate 20 × log (1.43/Vsn). After performing the adjustments described in section 4 SG1 SG2 SG3 Input SG1 at 93 dBµ and measure the pin 12 DC voltage (V12).Mix three signals: SG1 at 87 dBµ, SG2 at 82 dBµ, and SG3 at 63 dBµ, and input that signal to VIF IN. Now, apply the V12 voltage to pin 12 using an external power supply. Measure the difference between the 3.58 MHz component and the 920 kHz component with a spectrum analyzer. After performing the adjustments described in section 4 Video signal-to-noise ratio 920 kHz beat level S/N I920 45 45 No. 5844-11/27 LA76070 Video Switch Block - Input Signals and Measurement Conditions 1. Unless otherwise indicated, these measurements are to be performed with no signal applied to PIF IN (pin 10) and with the D/A converter IF.ACG.SW set to "1". 2. The table below lists the input signals and their labels. Input signal Waveform Condition 10-step staircase waveform SG8 1 V p-p 4.2 MHz SG9 1 Vp-p Parameter Symbol Measurement Input signal point Measurement procedure Bus conditions [VIF Block] External video gain External video sync signal tip voltage External video crosstalk Internal video output level AUXG AUXS AUXC INT0 Pin 1 SG8 Observe pin 42 with an oscilloscope, measure the peak-to-peak value of the waveform, and perform the following calculation. AUXG = 20 × log (Vp-p) [dB] VIDEO.SW = "1" 42 Pin 1 SG8 Observe pin 42 with an oscilloscope and measure the synchronizing signal tip voltage in the waveform. Determine the voltage difference between this measured value and synchronizing signal tip level (VOtip) measured in the VIF block. VIDEO.SW = "1" 42 Pin 1 SG8 Measure the 4.2 MHz component in the pin 42 signal with a spectrum analyzer.Convert this measurement to a V peak-to-peak value and perform the following calculation. AUXG = 20 × log (1.4/Vp-p) [dB] VIDEO.SW = "0" 42 42 Observe pin 45 with an oscilloscope and Pin 10 measure the peak-to-peak value of the SG7 waveform. Determine the difference between (VIF block) this measured value and the video output 93 dBµ amplitude (VO) measured in the VIF block. After performing the adjustments described in section 4 IF. AGC. SW = "0" VIDEO. SW = "0" No. 5844-12/27 LA76070 SIF Block (FM Block) - Input Signals and Measurement Conditions Unless otherwise indicated, set up the following conditions for each of the following measurements. 1. Bus control condition: IF.AGC.DEF = 1 2. SW: IF1 = off 3. Apply the input signal to pin 49 and use a 4.5 MHz carrier signal. Parameter FM detector output voltage FM limiting sensitivity FM detector output bandwidth FM detector output total harmonic distortion AM rejection ratio SIF signal-to-noise ratio Symbol Measurement point Input signal Measurement procedure Bus conditions SOADJ 7 Adjust the DAC (FM.LEVEL) so that the pin 7 90 dBµ, FM detector output 1kHz component is as fm = 1 kHz, close to 474 mV rms as possible, and FM = ±25 kHz measure the output at that time in mV rms. Record this measurement as SV1. SLS 7 Determine the input level (in dBµ) such that fm = 1 kHz, the pin 7 FM detector output 1kHz component FM = ±25 kHz is –3 dB down from the SV1 value FM.LEVEL = adjusted value SF 7 Determine the modulation frequency 90 dBµ, bandwidth (Hz) that is –3 dB or higher relative FM = ±25 kHz to the pin 7 FM detector output SV1 value FM.LEVEL = adjusted value STHD 7 90 dBµ, Determine the total harmonic distortion in the fm = 1 kHz, pin 7 FM detector output 1kHz component FM = ±25 kHz FM.LEVEL = adjusted value SAMR SSN 7 7 90 dBµ, fm = 1 kHz, AM = 30% Measure the pin 7 FM detector output 1kHz component (in mV rms). Record this measured value as SV2 and perform the following calculation. SAMR = 20 × log (SV1/SV2) [dB] FM.LEVEL = adjusted value 90 dBµ, CW Set SW1:IF1 to the "ON" Measure the pin 7 noise level (in mV rms). Record this measured value as SV3 and perform the following calculation. SSN = 20 × log (SV1/SV3) [dB] FM.LEVEL = adjusted value Measurement procedure Bus conditions Audio Block - Input Signals and Test Conditions Parameter Maximum gain Variability range Frequency characteristics Muting Total harmonic distortion Signal-to-noise ratio Measurement point Input signal 51 1 kHz, CW 400m Vrms Measure the output pin 1kHz component (V1: mV rms) and perform the following calculation. AGMAX = 20 × log (V1/400) [dB] VOLUME = "111111" AUDIO.MUTE = "0" 51 1 kHz, CW 400m Vrms Measure the output pin 1kHz component (V2: mV rms) and perform the following calculation. AGMAX = 20 × log (V1/V2) [dB] VOLUME = "000001" AUDIO.MUTE = "0" 51 20 kHz, CW 400m Vrms Measure the output pin 20kHz component (V3: mV rms) and perform the following calculation. AF = 20 × log (V3/V1) [dB] VOLUME = "111111" AUDIO.MUTE = "0" AMUTE 51 20 kHz, CW 400m Vrms Measure the output pin 20kHz component (V4: mV rms) and perform the following calculation. AMUTE = 20 × log (V3/V4) [dB] VOLUME = "000000" AUDIO.MUTE = "0" ATHD 51 1 kHz, CW 400m Vrms Determine the total harmonic distortion in output pin 1kHz component VOLUME = "111111" AUDIO.MUTE = "0" Measure the noise level (DIN.AUDIO) on the output pin (V5: mV rms) and perform the following calculation. ASN = 20 × log (V1/V5) [dB] VOLUME = "111111" AUDIO.MUTE = "0" Symbol AGMAX ARANGE AF ASN 51 No signal No. 5844-13/27 LA76070 Chrominance Block - Input Signals and Measurement Conditions Unless otherwise indicated, set up the following conditions for each of the following measurements. 1. VIF and SIF blocks: No signal 2. Deflection block: Input a horizontal and vertical composite synchronizing signal, and assure that the deflection block is locked to the synchronizing signal. (Refer to the “Deflection Block - Input Signals and Measurement Conditions” section.) 3. Bus control conditions: All conditions set to the initial conditions unless otherwise specified. 4. Y input: No signal 5. C input: The C1IN input (pin 40) must be used. 6. The following describes the method for calculating the demodulation angle. B-Y axis angle = tan-1 (B (0)/B (270) + 270° R-Y axis angle = tan-1 (R (180)/R (90) + 90° G-Y axis angle = tan-1 (G (270)/G (180) + 180° R-Y axis B-Y axis G-Y axis 7. The following describes the method for calculating the AF angle. BR ... The ratio between the B-Y and R-Y demodulator outputs. θ ...... ANGBR: The B-Y/R-Y demodulation angle AFXXX = tan-1 [R-Y/B-YSin× θBR-Cosθ ] 8. Attach a TV crystal externally to pin 15. No. 5844-14/27 LA76070 Chrominance Input Signals C-1 X IRE signal (L-X) C-2 C-3 (However, if a frequency is specified that frequency must be used.) C-4 C-5 No. 5844-15/27 LA76070 Parameter Symbol Measurement point Input signal Measurement procedure Bus and other conditions [Chroma Block] Bout ACC amplitude characteristic 1 ACCM1 ACC amplitude characteristic 2 ACCM2 30 C-1 0 dB +6 dB Measure the output amplitudes when the chrominance signal input is 0 dB and when that input is +6 dB and calculate the ratio. ACCM1 = 20 × log (+6 dBdata/0dBdata) C-1 –14 dB Measure the output amplitude when the chrominance signal input is –14 dB and calculate the ratio. ACCM2 = 20 × log (–14 dBdata/0dBdata) Bout 30 YIN: L77 C-1: No signal B-Y/Y amplitude ratio CLRBY Measure the Y output level (Record this measurement as V1) C-2 Next, input a signal to CIN, and (with YIN a sync-only signal) measure the output level. (Record this measurement as V2) Calculate CLRBY from the following formula. CLRBY = 100 × (V2/V1) + 15% TR24: Saturation 01111111 Saturation 01000000 30 Color control characteristic 1 CLRMN 30 C-3 Measure V1: the output amplitude when the color control is maximum, and V2: the output amplitude when the color control is nominal. Calculate CLRMN as V1/V2. Color control characteristic 2 CLRMN 30 C-3 Measure V3: the output amplitude when the color control is minimum. Calculate CLRMM as CLRMN = 20 × log (V1/V3). TR28: Saturation 00000000 TR24: Saturation 01011010 Saturation 00100110 Color control sensitivity CLRSE 30 C-3 Measure V4: the output amplitude when the color control is 90, and V5: the output amplitude when the color control is 38. Calculate CLRSE from the following formula. CLRSE = 100 × (V4 – V5)/(V2 × 52) Tint center TINCEN 30 C-1 Measure all sections of the output waveform and calculate the B-Y axis angle TR23: Tint 00111111 Tint control maximum TINMAX 30 C-1 Measure all sections of the output waveform, calculate the B-Y axis angle, and calculate TINMAX from the following formula. TINMAX = <the B-Y axis angle> – TINCEN TR23: Tint 01111111 Tint control minimum TINMIN 30 C-1 Measure all sections of the output waveform, calculate the B-Y axis angle, and calculate TINMIN from the following formula. TINMIN = <the B-Y axis angle> – TINCEN TR23: Tint 00000000 C-1 Measure A1: the angle when the tint control is 85, TR23: Tint and A2: the angle when the tint control is 42, 01010101 and calculate TINSE from the following formula. 00101010 TINSE = (A1 – A2) /43 C-3 Measure Vb: the BOUT output amplitude, and Vr: the ROUT output amplitude. Determine RB = Vr/Vb. TR24: Saturation 01000000 C-3 Measure Vg: the GOUT output amplitude and determine GB = Vg/Vb TR24: Saturation 01000000 Tint control sensitivity Demodulation output ratio R-Y/B-Y TINSE 30 30 RB 28 Demodulation output ratio G-Y/B-Y GB 29 Continued on next page. No. 5844-16/27 LA76070 Continued from preceding page. Parameter Symbol Measurement point Input signal Measurement procedure C-1 Measure the BOUT and ROUT output levels, calculate the angles of the B-Y and R-Y axes, and determine ANGBR as <the R-Y angle> – <the B-Y angle>. Demodulation angle B-Y/R-Y ANGBR 30 28 Demodulation angle B-Y/G-Y ANGBG 29 C-1 Measure the GOUT output level, calculate the angle of the G-Y axis, and determine ANGBG as <the G-Y angle> – <the B-Y angle> KILL 30 C-3 Gradually lower the input signal level, and measure the input signal level at the point the output level falls under 150 mV p-p CVCOF 15 CIN No signal Measure the oscillator frequency f, and determine CVCOF from the following formula. CVCOF = f – 3579545 (Hz) Killer operating point Chrominance VCO free-running frequency Chrominance pull-in range (+) Chrominance pull-in range (–) PULIN + PULIN – 30 30 C–1 Gradually lower the input signal subcarrier frequency starting from 3.57545 MHz + 2000 Hz, and measure the frequency when the output waveform locks C–1 Gradually raise the input signal subcarrier frequency starting from 3.57545 MHz – 2000 Hz, and measure the frequency when the output waveform locks C–4 With Auto Flesh = 0, measure the level that corresponds to 73° for the BOUT and ROUT output waveforms, and calculate the angle AF073A. With Auto Flesh = 1, determine the angle AF073B in the same way. Calculate AF073 from the following formula. AF073 = AF073B – AF073A TR22: Auto flesh: 0******* TR22: Auto flesh: 1******* C–4 With Auto Flesh = 0, measure the level that corresponds to 118° for the BOUT and ROUT output waveforms, and calculate the angle AF118A. With Auto Flesh = 1, determine the angle AF118B in the same way. Calculate AF118 from the following formula. AF118 = AF118B – AF118A TR22: Auto flesh: 0******* TR22: Auto flesh: 1******* C–4 With Auto Flesh = 0, measure the level that corresponds to 163° for the BOUT and ROUT output waveforms, and calculate the angle AF163A. With Auto Flesh = 1, determine the angle AF163B in the same way. Calculate AF163 from the following formula. AF163 = AF163B – AF163A TR22: Auto flesh: 0******* TR22: Auto flesh: 1******* 30 Auto flesh characteristic 73° AF073 28 30 Auto flesh characteristic 118° AF118 28 30 Auto flesh characteristic 163° AF163 28 Bus and other conditions No. 5844-17/27 LA76070 Video Block - Input Signals and Measurement Conditions • C IN input signal * chrominance burst signal: 40 IRE • Y IN input signal 100 IRE: 714 mV *0 IRE signal (L-0): Standard NTSC synchronizing signal XIRE signal (L-X) CW signal (L-CW) Black stretch 0 IRE signal (L-BK) • R/G/B input signal RGB input signal 1 (O-1) RGB input signal 2 (O-2) No. 5844-18/27 LA76070 Symbol Measurement point Input signal Overall video gain (contrast: maximum) CONT127 30 L–50 Measure the output signal 50 IRE amplitude (CNTHB V p-p) and calculate CONT127 as 20 × log (CNTHB/0.357). Contrast max 1111111 Contrast adjustment characteristics (normal/maximum) CONT63 30 L–50 Measure the output signal 50 IRE amplitude (CNTCB V p-p) and calculate CONT63 as 20 × log (CNTCB/CNTHB). Contrast center 0111111 Contrast adjustment characteristics (minimum/maximum) CONT0 30 L–50 Measure the output signal 50 IRE amplitude (CNTLB V p-p) and calculate CONT0 as 20 × log (CNTLB/CNTHB). Contrast min 0000000 L–0 Measure the output signal 0 IRE DC level (BRTPL V) Brightness min 0000000 Contrast max 1111111 Measure the output signal 0 IRE DC level (DRVPH V) and the 100 IRE amplitude (DRVH V p-p), and calculate ClampG as 100 × (1 + (DRVPH - BRTPL)/DRVH). Brightness min 0000000 Contrast max 1111111 Parameter Measurement procedure Bus conditions and input signals [Video Block] Video frequency characteristics 30 DC propagation ClampG 30 L–100 Y delay YDLY 30 Measure the output signal 0 IRE DC level at point A when the black stretch function is BKST defeat on (1) defeated (off). Record this value as BKST1 (V). Maximum black stretching gain BKSTmax 30 L–BK Measure the output signal 0 IRE DC level at point A when the black stretch is enabled (on). Record this value as BKST2 (V). BKST defeat off (0) Calculate BKSTmax from the following formula. BKSTmax = 2 × 50 × (BKST1 – BKST2)/ CNTHB L–CW 30 Sharpness (peaking) L–CW L–CW Horizontal/vertical blanking output level RGBBLK 30 L–100 Measure the output signal blanking period DC level. Record that value as RGBBLK V. No. 5844-19/27 LA76070 Parameter Symbol Measurement point Input signal FSTH 30 L–0 O–2 Apply a voltage to pin 36 and determine the pin 36 voltage when the output signal switches to Pin 35: Apply O-2 the OSD signal L–50 Measure the output signal 50 IRE amplitude (CNTCR V p-p) L–0 O–2 Measure the OSD output amplitude (OSDHR V p-p) L–50 Measure the output signal 50 IRE amplitude (CNTCG V p-p) L–0 O–2 Measure the OSD output amplitude (OSDHG V p-p) L–50 Measure the output signal 50 IRE amplitude (CNTCB V p-p) L–0 O–2 Measure the OSD output amplitude (OSDHB V p-p) L–0 O–1 Measure the amplitude of points A (the 0.35 V section in the input signal O-1) and B (the 0.7 V Pin 36: 2.0 V section in the input signal O-1) in the output Pin 33: Apply O-1 signal and record those values as RGBLR and RGBHR V p-p, respectively Measurement procedure Bus conditions and input signals [OSD Block] OSD fast switch threshold Red RGB output level ROSDH 28 Pin 36: 2.0 V Pin 33: Apply O-2 Calculate ROSDH as 50 × (OSDHR/CNTCR) Green RGB output level GOSDH 29 Pin 36: 2.0 V Pin 34: Apply O-2 Calculate GOSDH as 50 × (OSDHG/CNTCG) Blue RGB output level BOSDH 30 Pin 36: 2.0 V Pin 35: Apply O-2 Calculate BOSDH as 50 × (OSDHB/CNTCB) 28 Analog OSD R output level Gain matching RRGB Calculate RRGB as RGBLR/CNTCR Linearity LRRGB Calculate LRRGB as 100 × (RGBLR/RGBHR) 29 Analog OSD G output level L–0 O–1 Measure the amplitude of points A (the 0.35 V section in the input signal O-1) and B (the 0.7 V Pin 36: 2.0 V section in the input signal O-1) in the output Pin 34: Apply O-1 signal and record those values as RGBLG and RGBHG V p-p, respectively Gain matching GRGB Calculate GRGB as RGBLG/CNTCG Linearity LGRGB Calculate LGRGB as 100 × (RGBLG/RGBHG) 30 Analog OSD B output level L–0 O–1 Measure the amplitude of points A (the 0.35 V section in the input signal O-1) and B (the 0.7 V Pin 36: 2.0 V section in the input signal O-1) in the output Pin 35: Apply O-1 signal and record those values as RGBLB and RGBHB V p-p, respectively Gain matching BRGB Calculate BRGB as RGBLB/CNTCB Linearity LBRGB Calculate LBRGB as 100 × (RGBLB/RGBHB) Parameter Symbol Measurement point Input signal Measurement procedure Bus conditions and input signals [RGB Output Block] (Cutoff and Drive Blocks) 28 Brightness control (normal) BRT63 29 30 (max) (min) BRT127 BRT0 L–0 Measure the output signal 0 IRE DC levels for the R output (28), G output (29), and B output (30). Record these values as BRTPCR, BRTPCG, and BRTPCB V, respectively. Contrast max 1111111 Calculate BRT63 as (BRTPCR + BRTPCG + BRTPCB)/3 Measure the output signal 0 IRE DC levels for Brightness max the B output (30). Record this value as BRTPHB. 1111111 30 Calculate BRT127 as 50 × (BRTPHB – BRTPCB)/CNTHB Measure the output signal 0 IRE DC levels for Brightness min the B output (30). Record this value as BRTPLB. 0000000 Calculate BRT0 as 50 × (BRTPLB – BRTPCB)/CNTHB No. 5844-20/27 LA76070 Parameter Symbol Measurement point Input signal Measurement procedure Bus and other conditions [RGB Output Block] (Cutoff and Drive Blocks) (minimum) Vbias0 L–50 (maximum) Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B Contrast max output (pin 30). Record these values as Vbias0 1111111 *(V).Here, * is R, G, and B, respectively. Vbias127 Bias (cutoff) control Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as Vbias128*(V). Here, * is R, G, and B, respectively. R bias max 1111111 G bias max 1111111 B bias max 1111111 Contrast max 1111111 Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as BAS80*. Here, * is R, G, and B, respectively. R bias: 1010000 G bias: 1010000 B bias: 1010000 Contrast max 1111111 Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as BAS48*(V). Here, * is R, G, and B, respectively. R bias: 0110000 G bias: 0110000 B bias: 0110000 Contrast max 1111111 28 29 30 Bias (cutoff) control resolution Vbiassns Vbiassns* = (BAS80* – BAS48*)/32 Drive adjustment: Maximum output RGBout127 Measure the output signal 100 IRE amplitudes for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as DRVH* (V p-p). Here, * is R, G, and B, respectively. 28 Output attenuation RGBout0 29 30 L–100 Contrast max 1111111 Brightness min 0000000 Contrast max 1111111 Measure the output signal 100 IRE amplitudes Brightness min for the R output (pin 28), G output (pin 29), and 0000000 B output (pin 30). Record these values as R drive min DRVL* (V p-p). 0000000 Here, * is R, G, and B, respectively. B drive min 0000000 RGBout0* = 20 × log (DRVH*/DRVL*) No. 5844-21/27 LA76070 Deflection Block - Input Signals and Measurement Conditions Unless otherwise indicated, set up the following conditions for each of the following measurements. 1. VIF and SIF blocks: No signal 2. C input: No signal 3. SYNC input: Horizontal and vertical composite synchronizing signal (40 IRE and other conditions, such as timing, must conform to the FCC broadcast standards.) Caution: The burst and chrominance signals must not be below the pedestal level. 4. Bus control conditions: All conditions set to the initial conditions unless otherwise specified. 5. The delay between the rise of the horizontal output (the pin 23 output) and the rise of the F.B.P IN (the pin 24 input) must be 9 µs. 6. Unless otherwise specified, pin 25 (the X-ray protection circuit input) must be connected to ground. Caution: Perform the following operation if horizontal pulse output has stopped. 1. The bus data T_ENABLE bit must be temporarily set to 0 and then set to 1. (If the X-ray protection circuit operates, an IC internal latch circuit will be set. To reset that latch circuit, the T_ENABLE bit must be temporarily set to 0, even if there is no horizontal output signal being output.) Notes on Video Muting If horizontal pulse output has stopped, perform the operation described in item 1. above and then set the video mute bit set to 0. (This is because the video mute bit is forcibly set to the mute setting when the T_ENABLE bit is set to 0 or when the Xray protection circuit operates. This also applies when power is first applied.) Parameter Symbol Measurement point Input signal Measurement procedure 37 SYNC IN: horizontal and vertical synchronizing signal Gradually lower the level of the synchronizing signal input to Y IN (pin 37) and measure the level of the synchronizing signal at the point synchronization is lost Bus conditions [Deflection Block] Sync separator circuit sensitivity Horizontal free-running frequency deviation Horizontal pull-in range Horizontal pulse output saturation voltage Ssync ∆fH fH PULL V Hsat 23 SYNC IN: No signal Connect a frequency counter to the pin 23 output (Hout) and measure the horizontal freerunning frequency. Calculate the deviation from the following formula. ∆fH = <measured value> – 15.734 kHz 37 SYNC IN: horizontal and vertical synchronizing signal Monitor the horizontal synchronizing signal input to Y IN (pin 37) and the pin 23 output (Hout), and measure the pull-in range by modifying the horizontal synchronizing signal frequency 23 SYNC IN: horizontal and Measure the voltage during the low-level period vertical in the pin 23 horizontal output pulse synchronizing signal No. 5844-22/27 LA76070 Parameter Symbol Measurement point Input signal Measurement procedure Bus conditions Measure the delay between the rise of the pin 23 horizontal output pulse and the fall of the Y IN horizontal synchronizing signal 23 Horizontal output pulse phase HPHCEN 37 Horizontal position adjustment range Horizontal position adjustment maximum deviation X-ray protection circuit operating voltage 23 HPHrange 37 23 HPHstep 37 23 VXRAY 25 SYNC IN: horizontal and vertical synchronizing signal SYNC IN: horizontal and vertical synchronizing signal SYNC IN: horizontal and vertical synchronizing signal SYNC IN: horizontal and vertical synchronizing signal Measure the delay between the rise of the pin 23 horizontal output pulse and the fall of the Y IN horizontal synchronizing signal when HPHASE is set to 0 and when it is set to 7, and calculate the difference between those measurements and HPHCEN Measure the delay between the rise of the pin 23 horizontal output pulse and the fall of the SYNC IN horizontal synchronizing signal as HPHASE is set to each value from 0 to 7, and calculate the amount of the change at each step. Find the step size with the largest change. Hphase: 000 Hphase: 111 Hphase: 000 to Hphase: 111 Connect a DC voltage source to pin 25 and gradually increase the voltage starting at 0 V. Measure the pin 25 DC voltage at the point that the pin 23 horizontal pulse output stops. No. 5844-23/27 LA76070 Parameter Symbol Measurement point Input signal Measurement procedure Bus conditions [Vertical screen Size Adjustment] Monitor the pin 17 vertical ramp output and measure the voltages at the line 22 and line 262. Vertical ramp output amplitude @32 Vsize32 17 SYNC IN: horizontal and vertical synchronizing signal Calculate Vsize32 from the following formula. Monitor the pin 17 vertical ramp output and measure the voltages at the line 22 and line 262. Calculate Vsize32 from the following formula. Vertical ramp output amplitude @0 Vsize0 17 SYNC IN: horizontal and vertical synchronizing signal VSIZE: 0000000 Monitor the pin 17 vertical ramp output and measure the voltages at the line 22 and line 262. Vertical ramp output amplitude @63 Vsize63 17 SYNC IN: horizontal and vertical synchronizing signal Calculate Vsize32 from the following formula. VSIZE: 1111111 No. 5844-24/27 LA76070 Parameter Symbol Measurement point Input signal Measurement procedure Bus conditions [Vertical screen Position Adjustment] Monitor the pin 17 vertical ramp output and measure the voltage at line 142 Vertical ramp DC voltage @32 Vdc32 17 SYNC IN: horizontal and vertical synchronizing signal Monitor the pin 17 vertical ramp output and measure the voltage at line 142 Vertical ramp DC voltage @0 Vdc0 17 SYNC IN: horizontal and vertical synchronizing signal VDC: 0000000 Monitor the pin 17 vertical ramp output and measure the voltage at line 142 Vertical ramp DC voltage @63 Vdc63 17 SYNC IN: horizontal and vertical synchronizing signal VDC: 1111111 No. 5844-25/27 * For adjusting the crystal oscillator characteristic LA76070 No. 5844-26/27 LA76070 Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of July, 1999. Specifications and information herein are subject to change without notice. PS No. 5844-27/27