EMIF08-1005M16 8-line IPAD™ low capacitance EMI filter and ESD protection in micro QFN package Features ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering: – Greater than -34 dB attenuation at frequencies from 900 MHz to 1.8 GHz ■ Cut-off frequency: 100 MHz ■ Very low PCB space consuming: 3.3 mm x 1.5 mm ■ Very thin package: 0.6 mm max. ■ High efficiency in ESD suppression on inputs pins (IEC 61000-4-2 level 4) ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration ■ Lead-free package 1 Micro QFN 16L 3.3 mm x 1.5 mm (bottom view) Figure 1. Basic cell configuration 100 Ω Input 1 Output 1 Typical line capacitance = 45 pF typ. @ 0 V Complies with following standards: ■ ■ IEC 61000-4-2 level 4 input and output pins – 15 kV (air discharge) – 8 kV (contact discharge) MIL STD 883G - Method 3015-7 Class 3B (all pins) Applications Where EMI filtering in ESD sensitive equipment is required: ■ LCD and camera for mobile phones ■ Computers and printers ■ Communication systems ■ MCU boards Description The EMIF08-1005M16 is an 8-line, highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference. This filter includes an ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 15 kV on the input or output pins. TM: IPAD is a trademark of STMicroelectronics February 2008 Rev 2 1/10 www.st.com Characteristics 1 EMIF08-1005M16 Characteristics Figure 2. Pin configuration (top view) Pin 1 Output 1 Pin 16 Input 1 Pin 2 Input 21 Table 1. Symbol VPP Tj 2/10 Output 2 Pin 15 Pin 3 Input 3 Output 3 Pin 14 Pin 4 Input 4 Output 4 Pin 13 Pin 5 Input 5 Output 5 Pin 12 Pin 6 Input 6 Output 6 Pin 11 Pin 7 Input 7 Output 7 Pin 10 Pin 8 Input 8 Output 8 Pin 9 Absolute ratings (limiting values) Parameter Value Unit ESD IEC 61000-4-2, air discharge ESD IEC 61000-4-2 contact discharge 15 15 kV Maximum junction temperature 125 °C Top Operating temperature range - 40 to + 85 °C Tstg Storage temperature range - 55 to + 150 °C EMIF08-1005M16 Table 2. Characteristics Electrical characteristics (Tamb = 25 °C) Symbol Parameter I IF VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic resistance IPP Peak pulse current RI/O Series resistance between Input and Output Cline Input capacitance per line Symbol VBR VCL VF VRM V IRM IR IPP Test conditions Min. Typ. Max. Unit VBR IR = 1 mA 6 8 10 V VF IF = 10 mA 0.5 1.0 1.5 V IRM VRM = 3 V per line 200 nA RI/O Tolerance ± 10% 90 100 110 Ω Cline VLINE= 0 V dc, VOSC = 30 mV, F = 1 MHz 38 45 52 pF Figure 3. S21 attenuation measurement 0.00 Figure 4. Analog cross talk measurements 0.00 dB dB - 10.00 - 30.00 - 20.00 - 60.00 - 30.00 - 90.00 - 120.00 - 40.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G 3.0G 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G f/Hz 3/10 Ordering information scheme EMIF08-1005M16 Figure 5. ESD response to IEC 61000-4-2 Figure 6. (+15 kV air discharge) on one input (Vin) and on one output (Vout) Figure 7. Line capacitance versus reverse voltage applied (typical value) 50.00 ESD response to IEC 61000-4-2 (- 15 kV air discharge) on one input (Vin) and on one output (Vout) CLINE (pF) 45.00 40.00 35.00 30.00 25.00 20.00 15.00 10.00 VLINE (V) 5.00 0.00 0 2 1 2 3 4 Ordering information scheme Figure 8. Ordering information scheme EMIF EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10 (pF) Package Mx = Micro QFN x leads 4/10 5 yy - xxx z Mx EMIF08-1005M16 3 Package information Package information ● Epoxy meets UL94, V0 In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Table 3. Micro QFN 3.3x1.5 16L dimensions Dimensions TOP VIEW Ref. D SIDE VIEW A1 A Inches Min. Typ. Max. A 0.50 0.55 0.60 0.020 0.022 0.024 A1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 D 3.20 3.30 3.40 0.126 0.130 0.134 D2 2.45 2.60 2.70 0.096 0.102 0.106 E 1.40 1.50 1.60 0.055 0.059 0.063 E2 0.20 0.35 0.45 0.008 0.014 0.018 INDEX AREA (D/2 x E/2) E Millimeters Min. Typ. Max. BOTTOM VIEW e b INDEX AREA (D/2 x E/2) EXPOSED PAD PIN # 1 ID E2 D2 L Figure 9. e K 0.40 K 0.20 L 0.20 0.016 0.008 0.30 0.40 0.008 0.012 0.016 Micro QFN 3.3x1.5 16L Figure 10. Marking footprint (dimensions in mm) 0.40 Dot : Pin 1 Identification X X= Marking WW= DataCode (week) Y=Data code(Year) P=Assembly plant 0.20 0.60 0.275 0.35 XX WW YP 2.60 5/10 Package information EMIF08-1005M16 Figure 11. Tape and reel specification Dot identifying Pin A1 location All dimensions in mm Note: 6/10 5.5 ± 0.1 12.00 ± 0.3 3.70 ± 0.1 0.80 ± 0.1 Ø 1.55 ± 0.05 4.00 ± 0.1 1.75 ± 0.1 2.00 ± 0.1 XX WW YP XX WW YP 1.70 ± 0.1 XX WW YP XX WW YP XX WW YP XX WW YP 4.00 ± 0.1 User direction of unreeling Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. EMIF08-1005M16 Recommendation on PCB assembly 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 12. Stencil opening dimensions L T b) W General design rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- ≥ 1.5 T L×W Aspect Area = ---------------------------- ≥ 0.66 2T ( L + W ) 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%. c) Stencil opening for leads: Opening to footprint ratio is 90%. Figure 13. Recommended stencil window position 5 µm 5 µm 570 µm 600 µm 15 µm 0.40 0.20 0.60 190 µm 15 µm 0.275 0.35 200 µm 2600 µm 350 µm 2.60 250 µm 50 µm 1820 µm Footprint 50 µm 390 µm 390 µm Stencil window Footprint 7/10 Recommendation on PCB assembly 4.2 4.3 4.4 8/10 EMIF08-1005M16 Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed 4. Solder paste with fine particles: powder particle size is 20-45 µm. Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. EMIF08-1005M16 4.5 Ordering information Reflow profile Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 6 90 to 150 sec 7 Time (min) 10-30 sec 90 sec max Note: Minimize air convection currents in the reflow oven to avoid component movement. 5 Ordering information Table 4. Ordering information Part number Marking Package Weight Base qty Delivery mode EMIF08-1005M16 H8(1) Micro QFN 7.2 mg 3000 Tape and reel (7”) 1. The marking can be rotated by 90° to differentiate assembly location 6 Revision history Table 5. Document revision history Date Revision Changes 24-Oct-2006 1 Initial release. 04-Feb-2008 2 Reformatted to current standards. Updated ECOPACK statement. Added Section 4: Recommendation on PCB assembly. 9/10 EMIF08-1005M16 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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