STMICROELECTRONICS EMIF02

EMIF02-SPK01M6
2-line IPAD™, EMI filter and ESD protection for speaker
Features
Pin 1
■
EMI symmetrical (I/O) low-pass filter
■
High efficiency in EMI filtering
■
Very low PCB space consumption:
1.0 mm x 1.45 mm
■
Pitch 0.5 mm
■
Very thin package: 0.6 mm max
■
High efficiency in ESD suppression
■
High reliability offered by monolithic integration
■
High reduction of parasitic elements through
integration and wafer level packaging
■
Lead-free package
Micro QFN 6 leads
1.45 mm x 1.00 mm
(bottom view)
Figure 1.
Complies with following standards
■
IEC 61000-4-2 level 4, input pins
– 15 kV (air discharge)
– 8 kV (contact discharge)
■
IEC 61000-4-2 level 1, output pins
– 2 kV (air discharge)
– 2 kV (contact discharge)
■
MILSTD883 Class 3B
■
SPKR in 1
6
SPKR out
GND
2
5
GND
SPKL in 3
4
SPKL out
Figure 2.
Application
Pin configuration (top view)
Basic cell configuration
Low-pass filter
Mobile telephones
Input
Output
Description
The EMIF02-SPK01M6 is a 2-line, highly
integrated device designed to suppress EMI/RFI
noise in all systems exposed to electromagnetic
interference.
GND
GND
GND
This filter includes ESD protection circuitry, which
prevents damage to the application when
subjected to ESD surges up to 15 kV.
TM: IPAD is a trademark of STMicroelectronics
September 2009
Doc ID 15845 Rev 2
1/11
www.st.com
11
Characteristics
EMIF02-SPK01M6
1
Characteristics
Table 1.
Absolute ratings (limiting values at Tamb = 25 °C unless otherwise specified)
Symbol
VPP
Tj
Parameter
Value
ESD discharge IEC 61000-4-2 air discharge on input pins
Air discharge
Contact discharge
ESD discharge IEC 61000-4-2 contact discharge on output pins
Air discharge
Contact discharge
MILSTD883 Class 3B
Unit
15
8
kV
2
2
8
Junction temperature
125
°C
Top
Operating temperature range
-30 to +85
°C
Tstg
Storage temperature range
-55 to +150
°C
Figure 3.
Electrical characteristics (definitions)
I
IPP
Symbol
VBR
VCL
IRM
VRM
IPP
IR
Parameter
Breakdown voltage
Clamping voltage
Leakage current @ VRM
Stand-off voltage
Peak pulse current
Breakdown current
=
=
=
=
=
=
VCL VBR VRM
IR
IRM
IRM
IR
VRM VBR VCL
V
IPP
Table 2.
Electrical characterisitcs (Tamb = 25 °C)
Symbol
Test conditions
Min.
Typ.
6
8
Max.
Unit
VBR
IR = 1 mA
IRM
VRM = 3 V per line
RI/O
Tolerance ± 20%
10
Ω
Cline
VR= 0, F = 1 MHz, VOSC = 30 mV, ±30%
220
pF
2/11
V
500
Doc ID 15845 Rev 2
nA
EMIF02-SPK01M6
Figure 4.
Characteristics
Attenuation measurement
0.00
S21 (dB)
-5.00
-10.00
-15.00
-20.00
-25.00
-30.00
F (Hz)
-35.00
300.0k
Figure 5.
1.0M
3.0M
10.0M
30.0M
100.0M 300.0M
ESD response to IEC 61000-4-2
Figure 6.
+15 kV air discharge on SPK R line
1.0G
3.0G
ESD response to IEC 61000-4-2
+15 kV air discharge on SPK L line
SPKL IN
SPKR IN
vi = 10 V/d
SPKL OUT
SPKR OUT
Figure 7.
vi = 10 V/d
vo = 10 V/d
vo = 10 V/d
100 ns/d
100 ns/d
ESD response to IEC 61000-4-2
Figure 8.
- 15 kV air discharge on SPK R line
ESD response to IEC 61000-4-2
- 15 kV air discharge on SPK Lline
vi = 10 V/d
vi = 10 V/d
SPKL IN
SPKR IN
vo = 10 V/d
vo = 10 V/d
SPKL OUT
SPKR OUT
100 ns/d
Doc ID 15845 Rev 2
100 ns/d
3/11
Ordering information scheme
2
EMIF02-SPK01M6
Ordering information scheme
Figure 9.
Ordering information scheme
EMIF
EMI filter
Number of lines
Information
xxx = application
zz = version
Package
Mx = Micro QFN x leads
4/11
Doc ID 15845 Rev 2
yy
-
xxx zz
Mx
EMIF02-SPK01M6
3
Package information
Package information
●
Epoxy meets UL94, V0
●
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 3.
Micro QFN 1.45 x 1.00 6L dimensions
Dimensions
D
N
Ref.
Millimeters
Inches
E
1
Min.
Typ.
Max.
Min.
A
0.50
0.55
0.60
0.020 0.022 0.024
A1
0.00
0.02
0.05
0.000 0.001 0.002
b
0.18
0.25
0.30
0.007 0.010 0.012
2
A
A1
1
2
L
k
Typ.
D
1.45
0.057
E
1.00
0.039
e
0.50
0.020
Max.
b
e
Figure 10. Footprint in mm [inches]
0.50
[0.020]
K
0.20
L
0.30
0.008
0.35
0.40
0.012 0.014 0.016
Figure 11. Marking
Dot : Pi n 1 Identification
K = Marking
0.25
[0.010]
0.60
[0.023]
0.30
1.60
[0.012] [0.063]
K
Doc ID 15845 Rev 2
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Package information
EMIF02-SPK01M6
Figure 12. Tape and reel specification
Dot identifying pin 1 location
φ 1.5 ±0.1
3.5 ±0.03
1.65
8.0 ±0.3
0.75
4.00 ±0.1
1.75 ±0.1
2.0 ±0.05
K
K
K
1.20
4.00
User direction of unreeling
Note:
6/11
Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin
1 mark is to be used for this purpose.
Doc ID 15845 Rev 2
EMIF02-SPK01M6
Recommendation on PCB assembly
4
Recommendation on PCB assembly
4.1
Stencil opening design
1.
General recommendation on stencil opening design
a)
Stencil Opening Dimensions: L (Length), W (Width), T (Thickness).
Figure 13. Stencil opening dimensions
L
T
b)
W
General Design Rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio = ----- ≥ 1.5
T
L×W
Aspect Area = ---------------------------- ≥ 0.66
2T ( L + W )
2.
Reference design
a)
Stencil opening thickness: 100 µm
b)
Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 14. Recommended stencil window position
7 µm
7 µm
620 µm
650 µm
15 µm
236 µm
15 µm
Footprint
250 µm
Stencil window
Footprint
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Recommendation on PCB assembly
4.2
4.3
4.4
8/11
EMIF02-SPK01M6
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component movement during high speed
4.
Solder paste with fine particles: powder particle size is 20-45 µm.
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering
3.
Standard tolerance of ± 0.05 mm is recommended.
4.
3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Doc ID 15845 Rev 2
EMIF02-SPK01M6
4.5
Recommendation on PCB assembly
Reflow profile
Figure 15. ST ECOPACK recommended soldering reflow profile for PCB mounting
Temperature (°C)
260°C max
255°C
220°C
180°C
125 °C
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
3°C/s max
3°C/s max
0
0
1
2
3
4
5
10-30 sec
90 to 150 sec
Note:
6
7
Time (min)
90 sec max
Minimize air convection currents in the reflow oven to avoid component movement.
Doc ID 15845 Rev 2
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Ordering information
5
EMIF02-SPK01M6
Ordering information
Table 4.
Ordering information
Order code
Marking
Package
Weight
Base qty
Delivery mode
EMIF02-SPK01M6
K(1)
Micro QFN
2.2 mg
3000
Tape and reel (7”)
1. The marking can be rotated by 90° to diferentiate assembly location
6
Revision history
Table 5.
10/11
Document revision history
Date
Revision
Changes
11-Sep-2009
1
Initial release
21-Sep-2009
2
Updated Figure 3.
Doc ID 15845 Rev 2
EMIF02-SPK01M6
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Doc ID 15845 Rev 2
11/11