STMICROELECTRONICS HD1750JL

HD1750JL
High Voltage NPN Power Transistor
for High Definition and New Super-Slim CRT Display
PRELIMINARY DATA
Features
■
STATE-OF-THE-ART TECHNOLOGY:
DIFFUSED COLLECTOR “ENHANCED
GENERATION“ EHVS1
■
WIDER RANGE OF OPTIMUM DRIVE
CONDITIONS
■
LESS SENSITIVE TO OPERATING
TEMPERATURE VARIATION
1
Applications
■
HORIZONTAL DEFLECTION OUTPUT FOR
DIGITAL TV, HDTV AND HIGH -END
MONITORS
2
3
TO-264
Internal Schematic Diagram
Description
The device uses a Diffused Collector in Planar
technology which adopts ”Enhanced High Voltage
Structure” (EHVS1) that was developed to fit
High-Definition CRT displays.
The new HD product series features improved
silicon efficiency, bringing updated performance to
Horizontal Deflection output stages.
Order codes
Part Number
Marking
Package
Packing
HD1750JL
HD1750JL
TO-264
TUBE
October 2005
rev.2
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www.st.com
10
HD1750JL
1 Electrical ratings
1
Electrical ratings
Table 1.
Absolute Maximum Rating
Symbol
Parameter
Value
Unit
VCES
Collector-Emitter Voltage (VBE = 0)
1700
V
VCEO
Collector-Emitter Voltage (IB = 0)
800
V
VEBO
Emitte-Base Voltage (IC = 0)
10
V
Collector Current
24
A
Collector Peak Current (tP < 5ms)
36
A
Base Current
12
A
IBM
Base Peak Current (tP < 5ms)
18
A
PTOT
Total dissipation at Tc = 25°C
200
W
Vins
Insulation Withstand Voltage (RMS) from all three Leads to External
Heatsink
2500
V
TSTG
Storage Temperature
-65 to 150
°C
150
°C
Value
Unit
0.625
°C/W
IC
ICM
IB
TJ
Table 2.
Symbol
RthJC
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Max. Operating Junction Temperature
Thermal Data
Parameter
Thermal Resistance Junction-Case____________________Max
HD1750JL
2
2 Electrical Characteristics
Electrical Characteristics
(TCASE = 25°C; unless otherwise specified)
Table 3.
Symbol
Electrical Characteristics
Parameter
ICES
Collector Cut-off Current
(V BE = 0)
IEBO
Emitter Cut-off Current
(IC = 0)
VCEO(sus) Collector-Emitter
Note: 1 Sustaining Voltage (IB = 0)
VEBO
VCE(sat)
Note: 1
VBE(sat)
Note: 1
hFE
ts
tf
ts
tf
Test Conditions
Min.
Typ.
VCE = 1700V
VCE = 1700V___
_TC = 125°C
VEB = 5V
Max.
Unit
0.2
2
mA
mA
10
μA
IC = 10mA
800
V
Emitter-Base Voltage (IC = 0)
IE = 10mA
10
V
Collector-Emitter Saturation
Voltage
IC = 12A _____
IB = 3A
Base-Emitter Saturation Voltage
IC = 12A _____
IB = 3A
DC Current Gain
INDUCTIVE LOAD
Storage Time
Fall Time
INDUCTIVE LOAD
Storage Time
Fall Time
IC = 1A _
0.95
____ VCE = 5V
IC = 12A ___
_ VCE = 5V
IC = 12A ___ _ __
IB(on) = 1.8A__ _
3
V
1.5
V
30
5.5
8.5
fh = 31250Hz
_IB(off) = -7.25A
VCE(fly) = 1320V __VBE(off) = -2.7V
3
300
3.6
450
μs
ns
1.6
110
2
220
μs
ns
LBB(on) = 0.8μH
IC = 6.5A
__ _ __ fh = 100kHz
IB(on) = 1.1A __ _ _IB(off) = -5.25A
VCE(fly) = 1220V __VBE(off) = -2.7V
LBB(on) = 0.25μH
Note: 1 Pulsed duration = 300 μs, duty cycle ≤1.5%.
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HD1750JL
2 Electrical Characteristics
2.1
Electrical Characteristics (Curves)
Figure 1.
Safe Operating Area
Figure 2.
Derating Curve
Figure 3.
Output Characteristics
Figure 4.
Reverse Biased SOA
Figure 5.
DC Current Gain
Figure 6.
DC Current Gain
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HD1750JL
2 Electrical Characteristics
Figure 7.
Collector-Emitter Saturation Voltage Figure 8.
Figure 9.
Power Losses
Figure 11. Inductive Load Switching Time
Base-Emitter Saturation Voltage
Figure 10. Power Losses
Figure 12. Inductive Load Switching Time
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3 Test circuit
3
Test circuit
Figure 13. Power Losses and Inductive Load Switching Test Circuit
Figure 14. Reverse Biased Safe Operating Area Test Circuit
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HD1750JL
HD1750JL
4
4 Package Mechanical Data
Package Mechanical Data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in compliance
with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also
marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are
available at: www.st.com
7/10
4 Package Mechanical Data
Table 4.
TO-264 Mechanical Data
Figure 15. TO-264 Drawing
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HD1750JL
HD1750JL
5
5 Revision History
Revision History
Date
Revision
Changes
02-May-2005
1
Initial release.
17-Oct-2005
2
Final document.
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HD1750JL
5 Revision History
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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
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