STMICROELECTRONICS L4971D013TR

L4971
1.5A STEP DOWN SWITCHING REGULATOR
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FEATURES
Figure 1. Package
UP TO 1.5A STEP DOWN CONVERTER
OPERATING INPUT VOLTAGE FROM 8V TO
55V
PRECISE 3.3V (±1%) INTERNAL
REFERENCE VOLTAGE
OUTPUT VOLTAGE ADJUSTABLE FROM
3.3V TO 50V
SWITCHING FREQUENCY ADJUSTABLE UP
TO 300KHz
VOLTAGE FEEDFORWARD
ZERO LOAD CURRENT OPERATION
INTERNAL CURRENT LIMITING (PULSEBYPULSE AND HICCUP MODE)
INHIBIT FOR ZERO CURRENT
CONSUMPTION
PROTECTION AGAINST FEEDBACK
DISCONNECTION
THERMAL SHUTDOWN
SOFT START FUNCTION
DIP8
SO16W
Table 1. Order Codes
Part Number
Package
L4971
DIP8
L4971D
SO16W
L4971D013TR
SO16 in Tape & Reel
A switching frequency up to 300KHz is achievable
(the maximum power dissipation of the packages
must be observed).
A wide input voltage range between 8V to 55V and
output voltages regulated from 3.3V to 50V cover
the majority of today’s applications.
Features of this new generations of DC-DC converter include pulse-by-pulse current limit, hiccup
mode for short circuit protection, voltage feedforward regulation, soft-start, protection against feedback loop disconnection, inhibit for zero current
consumption and thermal shutdown.
The device is available in plastic dual in line, DIP8
for standard assembly, and SO16W for SMD assembly.
DESCRIPTION
The L4971 is a step down monolithic power
switching regulator delivering 1.5A at a voltage between 3.3V and 50V (selected by a simple external
divider). Realized in BCD mixed technology, the
device uses an internal power D-MOS transistor
(with a typical Rdson of 0.25Ω) to obtain very high
efficency and high switching speed.
Figure 1. Block Diagram
Vi=8V to 55V
5
8
R1
20K
L4971
3
C1
220µF
63V
C7
220nF
C2
2.7nF
C5
100nF
2
4
1
7
R2
9.1K
C4
22nF
L1
126µH
(77120)
6
C6
100nF
D1
STPS
3L60U
VO=3.3V/1.5A
C8
330µF
D97IN748A
May 2005
Rev. 11
1/13
L4971
Figure 2. Block Diagram
VCC
5
THERMAL
SHUTDOWN
VOLTAGES
MONITOR
CBOOT
CHARGE
2
SS_INH
INHIBIT
SOFTSTART
3.3V
INTERNAL
REFERENCE
INTERNAL
SUPPLY
5.1V
7
COMP
6
8
FB
E/A
PWM
R
3.3V
Q
S
CBOOT
CHARGE
AT LIGHT
LOADS
DRIVE
OSCILLATOR
1
3
OSC
BOOT
4
GND
D97IN594
OUT
Figure 3. Pin Connections
N.C.
1
16
N.C.
GND
2
15
N.C.
GND
1
8
FB
SS_INH
3
14
FB
SS_INH
2
7
COMP
OSC
4
13
COMP
OSC
3
6
BOOT
OUT
5
12
BOOT
OUT
4
5
VCC
OUT
6
11
VCC
N.C.
7
10
N.C.
N.C.
8
9
N.C.
D97IN595
D97IN596
DIP8
SO16
Table 2. Pin Description
DIP
SO (*)
Name
Function
1
2
GND
2
3
SS_INH
3
4
OSC
An external resistor connected between the unregulated input voltage and this pin and
a capacitor connected from this pin to ground fix the switching frequency. (Line feed
forward is automatically obtained)
4
5, 6
OUT
Stepdown regulator output
5
11
VCC
Unregulated DC input voltage
6
12
BOOT
A capacitor connected between this pin and OUT allows to drive the internal DMOS
Transistor
7
13
COMP
E/A output to be used for frequency compensation
8
14
FB
Ground
A logic signal (active low) disables the device (sleep mode operation).
A capacitor connected between this pin and ground determines the soft start time.
When this pin is grounded disabled the device (driven by open collector/drain).
Stepdown feedback input. Connecting directly to this pin results in an output voltage of
3.3V. An external resistive divider is required for higher output voltages.
(*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die.
2/13
L4971
Table 3. Absolute Maximum Ratings
Symbol
Minidip
S016
V5
V11
V4
V5,V6
I4
I5,I6
V6-V5
V12-V11
Parameter
Input voltage
Value
Unit
58
V
Output DC voltage
-1
V
Output peak voltage at t = 0.1µs f=200KHz
-5
V
Maximum output current
int. limit.
14
V
V6
V12
Bootstrap voltage
70
V
V7
V13
Analogs input voltage (VCC = 24V
12
V
V2
V3
Analogs input voltage (VCC = 24V)
13
V
V8
V14
(VCC = 20V)
6
-0.3
V
V
DIP8
1
W
SO16
0.8
W
-40 to 150
°C
Ptot
Tj,Tstg
Power dissipation a Tamb ≤60°C
Junction and storage temperature
Table 4. Thermal Data
Symbol
Rth(j-amb)
Parameter
Thermal Resistance Junction to ambient
Max.
DIP8
SO16
Unit
90 (*)
110 (*)
°C/W
(*) Package mounted on board.
3
ELECTRICAL CHARACTERISTCS
Table 5. (Tj = 25°C, Cosc = 2.7nF, Rosc = 20kΩ, VCC = 24V, unless otherwise specified.)
* Specification Refered to Tj from 0 to 125°C
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
55
V
DYNAMIC CHARACTERISTIC
VI
Operating input voltage range
Vo = 3.3 to 50V; Io = 1.5A
Vo
Output voltage
Io = 0.5A
3.33
3.36
3.39
V
Io = 0.2 to 1.5A
3.292
3.36
3.427
V
3.22
3.36
3.5
V
0.44
0.55
V
0.88
V
3
A
Vcc = 8 to 55V
Vd
Dropout voltage
*
*
8
Vcc = 10V; Io = 1.5A
*
Il
fs
SVRR
Maximum limiting current
Efficiency
Vcc = 8 to 55V
*
2
Vo = 3.3V; Io = 1.5A
Switching frequency
2.5
85
*
90
100
%
110
60
KHz
dB
Supply voltage ripple rejection
Vi = Vcc+2VRMS; Vo = Vref;
Io = 1.5A; f ripple = 100Hz
Voltage stability of switching
frequency
Vcc = 8 to 55V
3
Temp. stability of switching
frequency
Tj = 0 to 125°C
4
6
%
%
3/13
L4971
Table 5. (Tj = 25°C, Cosc = 2.7nF, Rosc = 20kΩ, VCC = 24V, unless otherwise specified.)
* Specification Refered to Tj from 0 to 125°C
Soft Start
Soft start charge current
30
40
50
µA
Soft start discharge current
6
10
14
µA
0.9
V
5
15
µA
4
6
mA
Inhibit
VLL
Low level voltage
*
IsLL
Isource Low level
*
DC Characteristics
Iqop
Iq
Iqst-by
Total operating quiescent
current
Quiescent current
Duty Cycle = 0; VFB = 3.8V
2.5
3.5
mA
Total stand-by quiescent
current
Vinh <0.9V
100
200
µA
Vcc = 55V; Vinh<0.9V
150
300
µA
3.36
3.39
V
5
10
mV
Error Amplifier
VFB
Voltage Feedback Input
RL
Line regulation
3.33
Vcc = 8 to 55V
Ref. voltage stability vs
temperature
*
0.4
mV/°C
VoH
High level output voltage
VFB = 2.5V
VoL
Low level output voltage
VFB = 3.8V
Source output current
Vcomp = 6V; VFB = 2.5V
200
300
µA
Io sink
Sink output current
Vcomp = 6V; VFB= 3.8V
200
300
µA
Ib
Source bias current
Io source
SVRR E/A
gm
10.3
V
0.65
2
3
V
µA
Supply voltage ripple rejection
Vcomp = Vfb; Vcc = 8 to 55V
60
80
dB
DC open loop gain
RL = ∞
50
57
dB
Transconductance
Icomp = -0.1 to 0.1mA
Vcomp = 6V
2.5
ms
Oscillator Section
Ramp Valley
Ramp peak
0.78
0.85
0.92
V
Vcc = 8V
2
2.15
2.3
V
Vcc = 55V
9
9.6
10.2
V
95
97
Maximum duty cycle
Maximum Frequency
4/13
Duty Cycle = 0% ;
Rosc = 13kΩ, Cosc = 820pF
%
300
kHz
L4971
Table 6. Typical Performance (Using Evaluation Board) fsw = 100kHz
Output
Voltage
Output
Ripple
Efficiency
Line Regulation
VCC =35V IO = 1.5A
Io = 1.5A VCC = 8 to 55V
Load Regulation
VCC =35V IO = 0.5 to 1.5A
3.3V
10mV
84 (%)
3mV
6mV
5.1V
10mV
86 (%)
3mV
6mV
12V
12mV
93 (%)
3mV (VCC =15 to 55V)
4mV
Figure 4. Test and valuation board circuit.
Vi=8V to 55V
5
8
R1
20K
L4971
3
C1
220µF
63V
C7
220nF
C2
2.7nF
1
7
2
C5
100nF
VO=3.3V/1.5A
4
R2
9.1K
L1
126µH
(77120)
6
C6
100nF
C4
22nF
D1
ST
PS3L60U
R3
C8
330µF
R4
D97IN749A
C1=220µF/63V EKE
C2=2.7nF
C5=100nF
C6=100nF
C7=220nF/63V
C8=330µF/35V CG Sanyo
L1=126µH KoolMu 77120 - 65 Turns - 0.5mm
R1=20K
R2=9.1K
D1=STPS3L60U
L4971
VO(V)
R3(KΩ)
3.3
0
R4(KΩ)
5.1
2.7
4.7
12
12
4.7
15
16
4.7
18
20
4.7
24
30
4.7
Figure 5. PCB and component layout of the figure 4.
5/13
L4971
Figure 6. Quiescent drain current vs. input
voltage.
Iq
(mA)
D97IN724
VO
(V)
D97IN733
3.377
200KHz
R1=22K
C2=1.2nF
5
Figure 9. Line Regulation
Tj=125˚C
3.376
4
100KHz
R1=20K
C2=2.7nF
3
0Hz
3.375
Tj=25˚C
3.374
3.373
3.372
2
3.371
Tamb=25˚C
0% DC
3.370
1
0
Figure 7. Quiescent current vs. junction
temperature
D97IN731
Iq
(mA)
200KHz
R1=22K
C2=1.2nF
5
0
Vcc(V)
5 10 15 20 25 30 35 40 45 50
5 10 15 20 25 30 35 40 45 50 VCC(V)
Figure 10. Line Regulation
VO
(V)
3.378
D97IN734
VCC=35V
3.376
3.374
Tj=25˚C
4
3.372
100KHz
R1=20K
C2=2.7nF
3.370
Tj=125˚C
3.368
3
0Hz
3.366
VCC=35V
0% DC
2
3.364
3.362
3.360
1
-50 -30 -10 10 30 50 70 90 110
Figure 8. Stand-by drain current vs. input
voltage
Ibias
(µA)
D97IN732
Vss=GND
150
0
Tj(˚C)
0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
Figure 11. Switching frquency vs. R1 and C2
fsw
(KHz)
D97IN784
500
Tamb=25˚C
Tj=25˚C
140
0.8
130
200
120
100
2nF
1.2
nF
2.2
nF
110
Tj=125˚C
100
90
50
3.3n
F
4.7n
F
20
5.6n
80
F
10
70
60
6/13
0
5 10 15 20 25 30 35 40 45 50 VCC(V)
5
0
20
40
60
80
R1(KΩ)
L4971
Figure 12. Switching Frequency vs. input
voltage.
fsw
(KHz)
D97IN735
Figure 15. Efficiency vs output voltage.
η
(%)
D97IN737
100KHz
96
107.5
94
105.0
102.5
200KHz
92
Tj=25˚C
90
100.0
VCC=35V
IO=1.5A
88
97.5
86
95.0
84
92.5
82
90.0
0
0
5 10 15 20 25 30 35 40 45 50 VCC(V)
Figure 13. Switching frequency vs. junction
temperature.
fsw
(KHz)
D97IN785
5
10
20
25
VO(V)
Figure 16. Efficiency vs. output current.
η
(%)
D97IN738
VCC=8V
VCC=12V
90
105
15
85
VCC=24V
80
100
VCC=48V
75
fsw=100KHz
VO=5.1V
70
95
65
90
-50
0
50
100
Tj(˚C)
Figure 14. Dropout voltage between pin 5 and 4
∆V
(V)
0.5
D97IN736
Figure 17. Efficiency vs. output current.
η
(%)
D97IN739
VCC=8V
90
Tj=125˚C
85
0.4
VCC=12V
C
5˚
2
j=
T
0.3
0.2
60
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
Tj=-25˚C
VCC=24V
80
VCC=48V
75
70
fsw=100KHz
VO=3.36V
0.1
65
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
60
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
7/13
L4971
Figure 18. Efficiency vs. output current.
D97IN740
η
(%)
VCC=8V
90
Figure 21. Power dissipation vs. Vcc.
Pdiss
(mW)
D97IN743
VO=5.1V
fsw=100KHz
VCC=12V
800
VCC=24V
85
IO=1.5A
600
80
IO=1A
VCC=48V
75
400
70
fsw=200KHz
VO=5.1V
65
60
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
Figure 19. Efficiency vs. output current.
η
(%)
D97IN741
IO=0.5A
200
0
0
10
20
30
50 VCC(V)
Figure 22. Efficiency vs. VO
Pdiss
(mW)
D97IN744
VCC=35V
fsw=100KHz
VCC=8V
90
40
800
85
VCC=12V
80
IO=1.5A
600
VCC=24V
75
IO=1A
400
70
VCC=48V
IO=0.5A
65
fsw=200KHz
VO=3.36V
200
60
55
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A)
0
0
5
10
15
20
25
30 V0(V)
Figure 23. Pulse by pulse limiting current vs.
junction temperature.
Figure 20. Efficiency vs. VCC.
η
(%)
D97IN742
Ilim
(A)
V0 =5
.1V-f
SW =1
V0
85
00KH
z
.1V
W=
20
V0 =
2.8
0K
Hz
2.7
3.36
V-f
SW =
V
0 =3
.36
100
V-
fS
W=
KHz
20
Hz
IO=1.5A
2.6
2.5
0K
75
fsw=100KHz
VCC=35V
2.9
=5
-fS
80
D97IN747
2.4
70
8/13
2.3
0
10
20
30
40
50 VCC(V)
-50 -25
0
25
50
75 100 125 Tj(˚C)
L4971
Figure 24. Load transient.
Figure 27. Soft start capacitor selection vs.
Inductor and Vccmax
L
(µH)
D97IN746
56nF
fsw=200KHz
300
47nF
200
33nF
22nF
100
0
15 20 25 30 35 40 45 50 VCCmax(V)
Figure 25. Line transient.
Figure 28. Open loop frequency and phase of
error amplifier
VCC
(V)
D97IN786
30
GAIN
(dB)
20
50
D97IN787
Phase
GAIN
10
VO
(mV)
1
IO = 1A
fsw = 100KHz
0
0
-50
45
100
90
-100
2
0
-100
Phase
135
-150
1ms/DIV
-200
10
102 103 104 105 106 107 108 f(Hz)
Figure 26. Soft start capacitor selection Vs
inductor and Vccmax.
D97IN745
L
(µH)
680nF
470nF
fsw=100KHz
400
330nF
300
200
100
220nF
100nF
0
15 20 25 30 35 40 45 50 VCCmax(V)
9/13
L4971
Figure 29. DIP8 Mechanical Data & Package Dimensions
mm
inch
DIM.
MIN.
A
TYP.
MIN.
3.32
TYP.
MAX.
0.51
B
1.15
1.65
0.045
0.065
b
0.356
0.55
0.014
0.022
b1
0.204
0.304
0.008
0.012
E
0.020
10.92
7.95
9.75
0.430
0.313
0.384
e
2.54
0.100
e3
7.62
0.300
e4
7.62
0.300
F
6.6
0.260
I
5.08
0.200
L
Z
3.18
OUTLINE AND
MECHANICAL DATA
0.131
a1
D
10/13
MAX.
3.81
1.52
0.125
0.150
0.060
DIP-8
L4971
Figure 30. SO16 Mechanical Data & Package Dimensions
mm
inch
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.10
0.30
0.004
0.012
B
0.33
0.51
0.013
0.200
C
0.23
0.32
0.009
0.013
D (1)
10.10
10.50
0.398
0.413
E
7.40
7.60
0.291
0.299
e
1.27
0.050
H
10.0
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.40
1.27
0.016
0.050
k
ddd
OUTLINE AND
MECHANICAL DATA
0˚ (min.), 8˚ (max.)
0.10
0.004
(1) “D” dimension does not include mold flash, protusions or gate
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
SO16 (Wide)
0016021 C
11/13
L4971
4
REVISION HISTORY
Table 7. Revision History
Date
Revision
October 2004
10
First Issue in EDOCS
May 2005
11
Updated the Layout look & feel.
Changed name of the D1 on the figs. 1 and 4.
12/13
Description of Changes
L4971
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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
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13/13