LM224A-LM324A Low power quad operational amplifiers Features ■ Wide gain bandwidth: 1.3 MHz ■ Input common-mode voltage range includes ground ■ Large voltage gain: 100 dB ■ Very low supply current/amplifier: 375 µA ■ Low input bias current: 20 nA ■ Low input offset voltage: 3 mV max. ■ Low input offset current: 2 nA ■ Wide power supply range: Single supply: +3 V to +30 V Dual supplies: ±1.5 V to ±15 V N DIP14 (Plastic package) D SO-14 (Plastic micropackage) Description These circuits consist of four independent, high gain, internally frequency compensated operational amplifiers. They operate from a single power supply over a wide range of voltages. P TSSOP-14 (Thin shrink small outline package) Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Order codes Part number LM224AN LM224AD/ADT Temperature range -40° C, +105° C LM224APT LM324AN LM324AD/ADT LM324APT September 2006 0° C, +70° C Package Packaging DIP SO TSSOP (Thin shrink outline package) DIP SO TSSOP (Thin shrink outline package) Tube Tube or tape & reel Rev 4 Tape & reel Tube Tube or tape & reel Tape & reel 1/20 www.st.com 20 Contents LM224A-LM324A Contents 1 Pin connections and schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Typical single-supply applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Macromodels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 2/20 6.1 DIP14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.2 SO-14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.3 TSSOP14 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 LM224A-LM324A 1 Pin connections and schematic diagram Pin connections and schematic diagram Figure 1. Pin connections (top view) Output 1 1 14 Output 4 Inverting Input 1 2 - - 13 Inverting Input 4 Non-inverting Input 1 3 + + 12 Non-inverting Input 4 11 VCC - VCC + 4 Non-inverting Input 2 5 + + 10 Non-inverting Input 3 Inverting Input 2 6 - - 9 Inverting Input 3 8 Output 3 Output 2 7 Figure 2. Schematic diagram (1/4 LM124) 3/20 Absolute maximum ratings 2 LM224A-LM324A Absolute maximum ratings Table 1. Absolute maximum ratings Symbol VCC Vi Parameter LM224A Supply voltage Input voltage Vid Differential input voltage Ptot Power dissipation: N suffix D suffix V -0.3 to VCC + 0.3 V 32 V (1) 500 400 500 400 50 Operating free-air temperature range Tstg Storage temperature range mW Infinite Input current (3) Toper Unit ±16 or 32 Output short-circuit duration (2) Iin LM324A -40 to +105 mA 0 to +70 °C -65 to +150 °C Maximum junction temperature 150 °C Rthja Thermal resistance junction to ambient(4): SO14 TSSOP14 DIP14 103 100 83 Rthjc Thermal resistance junction to case: SO14 TSSOP14 DIP14 31 32 33 HBM: human body model(5) 700 Tj ESD MM: machine model (6) CDM: charged device model 150 °C/W °C/W V 1500 1. Neither of the input voltages must exceed the magnitude of VCC+ or VCC-. 2. Short-circuits from the output to VCC can cause excessive heating if VCC > 15 V. The maximum output current is approximately 40 mA independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. 3. This input current only exists when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistor becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also NPN parasitic action on the IC chip. This transistor action can cause the output voltages of the op-amps to go to the VCC voltage level (or to ground for a large overdrive) for the time during which an input is driven negative. This is not destructive and normal output will set up again for input voltage higher than -0.3 V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous shortcircuits on all amplifiers. These are typical values given for a single layer board (except for TSSOP which is a two-layer board). 5. Human body model, 100 pF discharged through a 1.5 kΩ resistor into pin of device. 6. Machine model ESD, a 200 pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (internal resistor < 5Ω), into pin-to-pin of device. 4/20 LM224A-LM324A 3 Electrical characteristics Electrical characteristics Table 2. VCC+ = +5V, VCC-= Ground, Vo = 1.4V, Tamb = +25°C (unless otherwise specified) Symbol Typ. Max. Unit Vio Input offset voltage (1): Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 2 3 5 mV Iio Input offset current: Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 2 20 40 nA 20 100 200 nA Iib Parameter Min. Input bias current (2): Tamb = +25° C Tmin ≤ Tamb ≤ Tmax Avd Large signal voltage gain: VCC+ = +15 V, RL = 2 kΩ, Vo = 1.4 V to 11.4 V Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 50 25 100 SVR Supply voltage rejection ratio (Rs ≤ 10 kΩ): VCC+ = 5 V to 30 V Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 65 65 110 ICC Supply current, all Amp, no load: – Tamb = +25° C VCC = +5V VCC = +30 V – Tmin ≤ Tamb ≤ Tmax VCC = +5 V VCC = +30 V dB 0.7 1.5 1.2 3 0.8 1.5 1.2 3 Vicm Input common mode voltage range: VCC = +30 V (3) Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 0 0 CMR Common mode rejection ratio (Rs ≤10 kΩ): Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 70 60 80 Isource Output current source (Vid = +1 V): VCC = +15 V, Vo = +2 V 20 40 Output sink current (Vid = -1 V): VCC = +15 V, Vo = +2 V VCC = +15 V, Vo = +0.2 V 10 12 20 50 Isink V/mV VCC -1.5 VCC -2 mA V dB 70 mA mA µA 5/20 Electrical characteristics Table 2. Symbol VOH LM224A-LM324A VCC+ = +5V, VCC-= Ground, Vo = 1.4V, Tamb = +25°C (unless otherwise specified) Parameter Min. Typ. High level output voltage VCC = +30 V, RL = 2 kΩ Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 26 26 27 V VCC = +30 V, RL = 10 kΩ Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 27 27 28 V VCC = +5 V, RL = 2 kΩ Tamb = +25° C Tmin ≤ Tamb ≤ Tmax 3.5 3 VOL Low level output voltage (RL = 10kΩ): Tamb = +25°C Tmin ≤Tamb ≤Tmax SR Slew rate: VCC = 15 V, Vi = 0.5 to 3 V, RL = 2 kΩ, CL = 100 pF, unity gain GBP Gain bandwidth product: VCC = 30 V, f =100 kHz, Vin = 10 mV, RL = 2 kΩ, CL = 100pF THD Total harmonic distortion: f = 1kHz, Av = 20dB, RL = 2kΩ, Vo = 2Vpp, CL = 100pF, VCC = 30V Max. Unit V 5 20 20 mV V/µs 0.4 MHz 1.3 % 0.015 Equivalent input noise voltage: f = 1 kHz, Rs = 100 Ω, VCC = 30 V 40 DVio Input offset voltage drift 7 30 μV/°C DIio Input offset current drift 10 200 pA/°C en Vo1/Vo2 Channel separation(4) - 1kHz ≤ f ≤ 20 kHZ nV -----------Hz 120 dB 1. Vo = 1.4 V, Rs = 0 Ω, 5 V < VCC+ < 30 V, 0 < Vic < VCC+ - 1.5 V 2. The direction of the input current is out of the IC. This current is essentially constant, independent of the state of the output so there is no load change on the input lines. 3. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range is VCC+ - 1.5 V, but either or both inputs can go to +32 V without damage. 4. Due to the proximity of external components, ensure that there is no coupling originating from stray capacitance between these external parts. Typically, this can be detected at higher frequencies because this type of capacitance increases. 6/20 LM224A-LM324A Figure 3. Input bias current vs. ambient temperature Electrical characteristics Figure 4. Current limiting INPUT BIAS CURRENT versus AMBIENT TEMPERATURE IB (nA) 24 21 18 15 12 9 6 3 0 -55-35-15 5 25 45 65 85 105 125 AMBIENT TEMPERATURE (°C) Figure 5. Input voltage range Figure 6. Supply current Figure 7. Gain bandwidth product Figure 8. Common mode rejection ratio 7/20 Electrical characteristics Figure 9. Input bias current vs. ambient temperature LM224A-LM324A Figure 10. Current limiting INPUT BIAS CURRENT versus AMBIENT TEMPERATURE IB (nA) 24 21 18 15 12 9 6 3 0 -55-35-15 5 25 45 65 85 105 125 AMBIENT TEMPERATURE (°C) Figure 11. Input voltage range Figure 12. Supply current Figure 13. Gain bandwidth product Figure 14. Common mode rejection ratio 8/20 LM224A-LM324A Electrical characteristics Figure 15. Electrical curves 9/20 Electrical characteristics LM224A-LM324A Figure 16. Input current Figure 17. Large signal voltage gain Figure 18. Power supply & common mode rejection ratio Figure 19. Voltage gain 10/20 LM224A-LM324A 4 Typical single-supply applications Typical single-supply applications Figure 20. AC coupled inverting amplifier Figure 21. High input Z adjustable gain DC instrumentation amplifier if R1 = R5 and R3 = R4 = R6 = R7 2R e0 = 1 + ----------1- (e2 -e1) R 2 As shown e0 = 101 (e2 - e1). Figure 22. AC coupled non inverting amplifier Figure 23. DC summing amplifier e0 = e1 +e2 -e3 -e4 Where (e1 +e2) ≥ (e3 +e4) to keep e0 ≥ 0V Figure 24. Non-inverting DC gain Figure 25. Low drift peak detector 11/20 Typical single-supply applications Figure 26. Active bandpass filter LM224A-LM324A Figure 27. High input Z, DC differential amplifier R R 1 4 For ------- = ------R R 2 3 (CMRR depends on this resistor ratio match) Fo = 1kHz Q = 50 Av = 100 (40dB) Figure 28. Using symmetrical amplifiers to reduce input current (general concept) 12/20 e0 ⎛ 1 + R-------4⎞ ⎝ R3⎠ (e2 - e1) As shown e0 = (e2 - e1) LM224A-LM324A 5 Macromodels Note: Please consider the following before using this macromodel: Macromodels All models are a trade-off between accuracy and complexity (i.e. simulation time). Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. A macromodel emulates the nominal performance of a typical device within specified operating conditions (i.e. temperature, supply voltage, etc.). Thus the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product. Data issued from macromodels that is used outside of the specified conditions (VCC, temperature, etc.) or even worse, outside of the device operating conditions (VCC, Vicm, etc.) is not reliable in any way. ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT LM124 1 3 2 4 5 ******************************************************* .MODEL MDTH D IS=1E-8 KF=3.104131E-15 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 2.600000E+01 RIN 15 16 2.600000E+01 RIS 11 15 2.003862E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0 VOFN 13 14 DC 0 IPOL 13 5 1.000000E-05 CPS 11 15 3.783376E-09 DINN 17 13 MDTH 400E-12 VIN 17 5 0.000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 2.000000E+00 FCP 4 5 VOFP 3.400000E+01 FCN 5 4 VOFN 3.400000E+01 FIBP 2 5 VOFN 2.000000E-03 FIBN 5 1 VOFP 2.000000E-03 * AMPLIFYING STAGE 13/20 Macromodels LM224A-LM324A FIP 5 19 VOFP 3.600000E+02 FIN 5 19 VOFN 3.600000E+02 RG1 19 5 3.652997E+06 RG2 19 4 3.652997E+06 CC 19 5 6.000000E-09 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 7.500000E+03 VIPM 28 4 1.500000E+02 HONM 21 27 VOUT 7.500000E+03 VINM 5 27 1.500000E+02 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 20 COUT 3 5 1.000000E-12 DOP 19 25 MDTH 400E-12 VOP 4 25 2.242230E+00 DON 24 19 MDTH 400E-12 VON 24 5 7.922301E-01 .ENDS The values provided in Table 3 are derived from this macromodel. Table 3. Vcc+ = +15V, Vcc- = 0V, Tamb = 25°C (unless otherwise specified) Symbol Conditions Vio Unit 0 mV Avd RL = 2 kΩ 100 V/mV Icc No load, per amplifier 350 µA 0 to +13.5 V +13.5 V 5 mV Vicm 14/20 Value VOH RL = 2 kΩ (VCC VOL RL = 10 kΩ +=15 V) Ios Vo = +2 V, VCC = +15 V +40 mA GBP RL = 2 kΩ, CL = 100 pF 1.3 MHz SR RL = 2 kΩ, CL = 100 pF 0.4 V/µs LM224A-LM324A 6 Package mechanical data Package mechanical data In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. 15/20 Package mechanical data 6.1 LM224A-LM324A DIP14 package Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 1.39 TYP MAX. MIN. TYP. 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 I Z 0.280 5.1 L 0.201 3.3 1.27 MAX. 0.020 0.130 2.54 0.050 0.100 P001A 16/20 LM224A-LM324A 6.2 Package mechanical data SO-14 package SO-14 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45˚ (typ.) D 8.55 8.75 0.336 E 5.8 6.2 0.228 0.344 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 M S 0.68 0.050 0.026 8 ˚ (max.) PO13G 17/20 Package mechanical data 6.3 LM224A-LM324A TSSOP14 package TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 18/20 LM224A-LM324A 7 Revision history Revision history Table 4. Document revision history Date Revision Changes 1-Mar-2001 1 1-Feb-2005 2 1-Jun-2005 3 ESD protection inserted in Table 1 on page 4. 25-Sep-2006 4 Editorial update. First Release Added explanation of Vid and Vi limits in Table 1 on page 4. Updated macromodel. 19/20 LM224A-LM324A Please Read Carefully: Information in this document is provided solely in connection with ST products. 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