STB20PF75 P-CHANNEL 75V - 0.10 Ω - 20A D²PAK STripFET™ II POWER MOSFET TYPE VDSS RDS(on) ID STB20PF75 75 V < 0.12 Ω 20 A ■ ■ ■ ■ TYPICAL RDS(on) = 0.10 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 3 1 D2PAK TO-263 (Suffix “T4”) ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ MOTOR CONTROL ■ DC-DC & DC-AC CONVERTERS ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 75 V Drain-gate Voltage (RGS = 20 kΩ) 75 V Gate- source Voltage ± 20 V 20 A ID Drain Current (continuous) at TC = 25°C ID Drain Current (continuous) at TC = 100°C 14 A Drain Current (pulsed) 80 A IDM(•) Ptot Total Dissipation at TC = 25°C Derating Factor 80 W 0.53 W/°C dv/dt (1) Peak Diode Recovery voltage slope 10 V/ns EAS (2) Single Pulse Avalanche Energy 350 mJ -55 to 175 °C Tstg Tj Storage Temperature Operating Junction Temperature (•) Pulse width limited by safe operating area (1) ISD ≤20A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting Tj = 25 oC, ID = 10 A, VDD = 30V March 2004 Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed 1/9 STB20PF75 THERMAL DATA Rthj-case Rthj-PCB Tl Thermal Resistance Junction-case Thermal Resistance Junction-PCB Maximum Lead Temperature For Soldering Purpose (1.6 mm from case, for 10 sec) °C/W °C/W °C 1.88 34 300 Max Max Typ (*) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20 V V(BR)DSS Min. Typ. Max. 75 Unit V 1 10 µA µA ±100 nA ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 µA RDS(on) Static Drain-source On Resistance VGS = 10 V ID = 10 A Min. Typ. Max. Unit 2 3 4 V 0.10 0.12 Ω Typ. Max. Unit DYNAMIC Symbol gfs Ciss Coss Crss 2/9 Parameter Test Conditions Forward Transconductance VDS = 15 V Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 10 A Min. 15 S 1150 170 70 pF pF pF STB20PF75 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON (*) Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 37.5 V ID = 10 A VGS = 10 V RG = 4.7 Ω (Resistive Load, Figure 1) 20 51 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=60V ID=20A VGS=10V 38 7 10 52 nC nC nC Typ. Max. Unit (See test circuit, Figure 2) ns ns SWITCHING OFF (*) Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. VDD = 60 V ID = 10 A VGS = 10 V RG = 4.7 Ω (Resistive Load, Figure 1) 40 13 ns ns SOURCE DRAIN DIODE (*) Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 20 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A di/dt = 100A/µs Tj = 150°C VDD = 25 V (see test circuit, Figure 3) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 80 250 6.2 Max. Unit 20 80 A A 1.3 V ns nC A (*) Pulse width [ 300 µs, duty cycle 1.5 %. (•) Pulse width limited by TJMAX Safe Operating Area Thermal Impedance 3/9 STB20PF75 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STB20PF75 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature . . 5/9 STB20PF75 Fig. 1: Switching Times Test Circuits For Resistive Load Fig. 3: Test Circuit For Diode Recovery Behaviour 6/9 Fig. 2: Gate Charge test Circuit STB20PF75 D2PAK MECHANICAL DATA DIM. mm. MIN. TYP. inch. MAX. MIN. TYP. TYP. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.028 0.037 B2 1.14 1.7 0.045 0.067 C 0.45 0.6 0.018 0.024 C2 1.21 1.36 0.048 0.054 D 8.95 9.35 0.352 0.368 10.4 0.394 D1 E 8 10 E1 G 0.315 8.5 0.409 0.334 4.88 5.28 0.192 0.208 L 15 15.85 0.591 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.069 M 2.4 3.2 0.094 0.126 8° 0° R V2 0.4 0° 0.015 8° 7/9 STB20PF75 D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. mm MIN. A B DIM. mm MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 0.161 P0 3.9 4.1 0.153 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0075 0.082 R 50 T 0.25 0.35 .0.0098 0.0137 W 23.7 24.3 0.933 0.956 * on sales type 8/9 inch 1.574 MIN. 330 1.5 C 12.8 D 20.2 G 24.4 N 100 T TAPE MECHANICAL DATA inch MAX. MAX. 12.992 0.059 13.2 0.504 0.520 0.795 26.4 0.960 1.039 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 STB20PF75 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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