TDA9556 7.5 NS TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER PRODUCT PREVIEW FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Triple-channel video amplifier Pinning for easy PCB layout Supports DC coupling (optimum cost saving) and AC coupling applications. Built-in Voltage Gain: 19.3 (Typ.) Rise and Fall Times: 7.5ns (Typ.) Bandwidth: 50MHz (Typ.) Very low stand-by power consumption 80V Output dynamic range Supply voltage: 110V Perfectly matched with the TDA9210 preamplifier CLIPWATT 11 (Plastic Package) ORDER CODE: TDA9556 DESCRIPTION The TDA9556 is a triple-channel video amplifier designed in BCD technology (Bipolar/CMOS/ DMOS) able to drive the 3 cathodes of a CRT monitor. Perfectly matched with the ST Preamplifier TDA9210, it provides a high performance, and very cost effective DC coupling system. PIN CONNECTIONS 11 10 9 8 7 6 5 4 3 2 1 OUT1 OUT2 OUT3 GNDP VDD GNDS GNDA IN3 VCC IN2 IN1 Version 2.0 October 2000 1/16 1 Table of Contents 1 2 3 4 5 6 BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THERMAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 - General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 4 4 5 7 7 6.2 - How to choose the high supply voltage value (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.3 - Amplifier gain and cut-off adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 ARCING PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 VIDEO RESPONSE OPTIMIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.1 Supply decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.2 - Tracks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.3 - Network adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 TYPICAL PERFORMANCE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2 2/16 2 TDA9556 1 BLOCK DIAGRAM OUT1 GNDP 8 11 OUT2 10 OUT3 9 TDA9556 VDD GNDP VDD VDD 7 GNDP VCC 3 VREF 6 GNDS 1 5 IN1 GNDA 2 4 IN2 IN3 2 PIN CONNECTIONS Pin Name Function 1 IN1 Video Input-channel 1 2 IN2 Video Input-channel 2 3 VCC Low Supply Voltage 4 IN3 Video Input-channel 3 5 GNDA Ground Analogic (signal) 6 GNDS Ground Substrate 7 VDD 8 GNDP Ground Power 9 OUT3 Output-channel 3 10 OUT2 Output-channel 2 11 OUT1 Output-channel 1 High Supply Voltage 3/16 3 TDA9556 3 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDD High supply voltage 120 V VCC Low supply voltage 17 V VESD ESD susceptibility Human Body Model (100pF discharged through 1.5KΩ) EIAJ norm (200pF discharged through 0Ω) 2 300 kV V IOD Output source current (pulsed < 50µs) 80 mA I OG Output sink current (pulsed < 50µs) 80 mA VIN Max Maximum Input Voltage 15 V VIN Min Minimum Input Voltage - 0.5 V TJ Junction Temperature 150 °C TSTG Storage Temperature -20 + 150 °C Value Unit 4 THERMAL DATA Symbol 4/16 3 Parameter Rth (j-c) Junction-Case Thermal Resistance (Max.) 3 °C/W R th (j-a) Junction-Ambient Thermal Resistance (Typ.) 35 °C/W TDA9556 5 ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Min. SUPPLY parameters (VCC = 12V, VDD = 110V, Tamb = 25 °C, unless otherwise specified) High supply voltage 20 VDD 10 Typ Max Unit 110 115 V 12 15 V VCC Low supply voltage IDD V DD supply current VOUT = 50V 25 mA IDDS V DD stand-by supply current VCC : switched off (<1.5V) VOUT: low (Note 1) 60 µA ICC V CC supply current VOUT = 50V 60 mA STATIC parameters (VCC = 12V, VDD = 110V, Tamb = 25 °C) dVOUT/dVDD High Voltage supply rejection VOUT = 50V 0.5 % dV OUT/dT Output Voltage drift versus temperature VOUT = 80V 15 mV/°C d∆V OUT/dT Output voltage matching versus temperature (Note 2) VOUT = 80V 5 mV/°C Video Input Resistor VOUT = 50V Output Saturation Voltage to Supply I0 =-60mA (Note 3) R IN V SATH VSATL VG LE VREF Output Saturation Voltage to GND I0 =60mA (Note 3) Video Gain VOUT = 50V Linearity Error 17<V OUT<VDD-15V Internal Voltage Reference 2 kΩ VDD - 6.5 V 11 V 19.3 5 5.5 8 % V Note 1: The TDA 9556 goes into stand-by mode when Vcc is switched off (<1.5V). In stand-by mode, Vout is set to low level. Note 2: Matching measured between each channel. Note 3: Pulsed current width < 50µs 5/16 3 TDA9556 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Conditions Min. Typ Max Unit DYNAMIC parameters (see Figure 1) OS1 Overshoot, White to Black transition 5 % OS2 Overshoot, Black to White transition 1 % ∆VG Low frequency gain matching (Note 4) VDC = 50V, f=1MHz BW Bandwidth at -3dB VDC=50V, ∆V=20V PP 50 MHz 5 % tR Rise time VDC=50V, ∆V=40V PP 7.2 ns tF Fall time VDC=50V, ∆V=40V PP 7.9 ns 2.5% Settling time VDC=50V, ∆V=40V PP 15 ns Low frequency Crosstalk VDC=50V,∆V=20VPP f = 1 MHz 50 dB High frequency Crosstalk VDC=50V,∆V=20VPP f = 20MHz 32 dB tSET CTL CTH Note 4: Matching measured between each channel. Figure 1. AC test circuit 12V VCC 75Ω TDA9556 3 110V 7 VDC VDD OUT 1 IN VREF 8 CL=8pF GND 6/16 3 RP = 200 Ω 11 ∆V TDA9556 6 THEORY OF OPERATION 6.1 - General The TDA9556 is a three-channel video amplifier supplied by a low supply voltage: VCC (typ.12V) and a high supply voltage: VDD (up to 115V). The high values of VDD supplying the amplifier output stage allow direct control of the CRT cathodes (DC coupling mode). In DC coupling mode, the application schematic is very simple and only a few external components are needed to drive the cathodes. In particular, there is no need of the DC-restore circuitry which is used in classical AC coupling applications. The output voltage range is wide enough (Figure 2) to provide simultaneously : – Cut-off adjustment (typ. 25V) – Video contrast (typ. up to 40V), – Brightness (with the remaining voltage range). In normal operation, the output video signal must remain inside the linear region whatever the cutoff / brightness / contrast adjustment is. Figure 2. Output signal, level adjustments V DD (A) Top Non-Lin ear Region 15V (B) Cut-off Adjust. (25V Typ.) Linear region (C) Brightness Adjust. (10V Typ.) Blanking pulse (D) Contrast Adjust. (40V Typ.) Video Signal (E) Bottom Non-Linear Region 17V GND 6.2 - How to choose the high supply voltage value (VDD) The VDD high supply voltage must be chosen carefully. It must be high enough to provide the necessary video adjustment but set to minimum value to avoid unecessary power dissipation. Example: The following example shows how the optimum VDD voltage value is determined: – Cut-off adjustment range (B) : 25V – Max contrast (D) : 40V Case 1: 10V Brightness (C) adjusted by the preamplifier : VDD = A + B + C + D + E VDD = 15V + 25V + 10V + 40V + 17V = 107V Case 2: 10V Brightness (C) adjusted by the G1 anode: VDD = A + B + D + E VDD = 15V + 25V + 40V + 17V = 97V 7/16 3 TDA9556 6.3 - Amplifier gain and cut-off adjustment The output voltage VOUT is given by the following formula: VOUT = (VG+1) x VREF - (VG x VIN) for VG = 19.3 and VREF = 5.5V, we have VOUT = 111.6 - 19.3 x VIN A very simplified schematic of each TDA9556 channel is shown in Figure 3. The feedback net of each channel is integrated with a built-in voltage gain of 19.3 (40k/2k). Figure 3. Simplified schematic of one channel VDD 40k 2k - IN OUT + VREF GND 7 ARCING PROTECTION As the amplifier outputs are connected to the CRT cathodes, special attention must be given to portect them against possible arcing inside the CRT. Protection must be considered when starting the design of the video CRT board. It should always be implemented before starting to adjust the dynamic video response of the system. The arcing network that we recommend (see Figure 4) provides efficient protection without deteriorating the amplifier video performances. The total resistance value between the amplifier and the CRT cathode (R10+R11) should not be less than 300 Ω. Spark gap diodes are strongly recommended for protection against arcing. Figure 4. Arcing protection network (one channel) R19 C12 (*) 100nF/250V VDD 33Ω C24 4.7µF/150V C18 100nF D12 FDH400 R10 TDA9556 High Voltage (90-110V) OUT 150Ω/0.5W L1 0.39µH R11 150Ω/0.5W F1 Spark gap GND R29 10Ω (*): To be connected as close as possible to the device. 8/16 TDA9556 8 VIDEO RESPONSE OPTIMIZATION The dynamic video response is optimized by carefully designing the supply decoupling of the video board (see Section 8.1), the tracks (see Section 8.2), then by adjusting the input/output component network (see Section 8.3). For dynamic measurements such as rise/fall time and bandwidth, a 8pF load is used (total load including the parasitic capacitance of the PC board and CRT Socket). Figure 5. Video response optimization for one channel C11 4.7µF C10(*) C12(*) 100nF 100nF C24 4.7µF VDD VCC CRT R20 TDA9210 15/50Ω R10 + IN OUT 150Ω VREF L1 R11 0.39µH 150Ω TDA9556 GNDS GND (*): To be connected as close as possible to the device 8.1 Supply decoupling The decoupling of VCC and VDD through good quality HF capacitors (respectively C10 and C12) close to the device is necessary to improve the dynamic performance of the video signal. 8.2 - Tracks Careful attention has to be given to the three output channels of the amplifier. – Capacitor: The parasitic capacitive load on the amplifier outputs must be as small as possible. Figure 11 clearly shows the deterioration of the tR/tF when the capacitive load increases. Reducing this capacitive load is achieved moving away the output tracks from the other tracks (especially ground) and by using thin tracks (<0.5mm), see Figure 13. – Cross talk: Output and input tracks must be set apart. The TDA9556 pin-out allows the easy separation of input and output tracks on opposite sides of the amplifier (see Figure 13). – Length: Connection between amplifier output and cathode must be as short and direct as possible. 8.3 - Network adjustment Video response is always a compromise between several parameters. An improvement of the rise/ fall time leads to a deterioration of the overshoot. The recommended way to optimize the video response is: 1 To set R10+R11 for arcing protection (min. 300 Ω) 2. To adjust R20 and R10+R11. Increasing their value increases the tR/tF values and decrease the overshoot 3. To adjust L1 Increasing L1 speeds up the device and increases the overshoot. We recommend our customers to use the schematic shown on Figure 5 as a starting point for the video board and then to apply the optimization they need. 9/16 TDA9556 9 POWER DISSIPATION The total power dissipation is the sum of the static DC and the dynamic dissipation: PSTAT = VDD x IDD + VCC x ICC Example: for VDD = 110V, VCC = 12V, IDD = 25mA, ICC = 60mA, VOUT = 40 VPP, f = 40MHz, CL = 8pF and K = 0.72. The dynamic dissipation is, in the worst case (1 pixel On/ 1 pixel Off pattern): We have: PDYN = 3 VDD x CL x VOUT(PP) x f x K PSTAT = 3.47W, PDYN = 3.04W where f is the video frequency and K the ratio between the active line and the total horizontal line duration. Therefore: PTOT = PSTAT + PDYN. The static DC power dissipation is approximately: PTOT = 6.51W. Note 4: This worst thermal case must only be considered for TJmax calculation. Nevertheless, during the average life of the circuit, the conditions are closer to the white picture conditions. 10/16 TDA9556 10 TYPICAL PERFORMANCE CHARACTERISTICS VDD=110V, VCC=12V, CL=8pF, RP=300Ω, ∆V=40VPP, unless otherwise specified - see Figure 1 Figure 6. TDA9556 pulse response Figure 7. VOUT versus VIN 120 100 Vout (V) 80 60 40 20 0 0 1 2 3 4 5 6 Vin (V) Figure 8. Power dissipation versus frequency Figure 9. Speed versus temperature 12 8.3 8 8.1 7.9 Speed (ns) Total Power Dissipation (W) 8.5 10 6 4 tf 7.7 7.5 7.3 7.1 2 6.9 tr 6.7 0 10 20 30 40 Square Wave Frequency (MHz) 6.5 50 60 (72% Active Time) Figure 10. Speed versus offset 120 Figure 11. Speed versus load capacitance 10 10 9.5 Rp = 100 Ohms 9.5 9 9 8.5 tf 8 Speed (ns) Speed (ns) 70 80 90 100 110 Cas e Temperature (°C) 7.5 7 6.5 tr tf 8.5 8 tr 7.5 7 6 6.5 5.5 6 5 40 45 50 55 60 Offset Voltage (Vdc) 65 70 8 12 16 20 Load Capacitance (MHz) 11/16 TDA9556 Figure 12. TDA9210 - TDA9556 - STV9935 Demonstration Board: Silk Screen and Trace Figure 13. Amplifier and Preamplifier Outputs. Trace Routing (detail) Note that the amplifier outputs are well separated from the ground area while the amplifier inputs are surrounding by the ground 12/16 1 2 3 4 AVdd Filter Ire f C34 C35 R43 100pF A C32 R44 R45 R46 C28 100nF 100pF 1uH R4 1 10 0R R3 5 100R SCL SDA C 33 SCL L5 R10 75 R 75 R R3 100pF C30 Blue Green R ed C31 5V 5V1 D10 1K R42 12 11 10 9 8 7 6 5 4 3 2 1 SDA Hfly Video J1 8 7 6 5 4 3 2 1 Rout Gout Bo ut FBl k AVdd Filter Ire f AGND 1 2 3 4 5 Power J16 9 10 11 12 13 14 15 11 0V 1N 4148 D8 C2 L4 100nF 5V 8V 12V R34 1K R33 1K R32 1K AVdd Filter Ir ef 100nF 15 R C15 47uF C16 47uF C17 47uF 9 8 7 6 5 4 3 2 1 10 100R 100nF 5V R12 C9 R8 15 R R 2 15 R C22 B R1 2R 7 R4 5V 1uH 10 0nF 100nF 10 0 nF R16 2R 7 5V C6 1 N414 8 D6 1N 4148 D5 16 C3 C4 1 N414 8 D4 5V 5V 1N 4148 D3 1N 4148 D1 5V STV9935 OVss NC DVss DVdd Hfly Vsy nc SCL SDA 100pF U3 C29 R5 7 5R Vs Out R 18 100R B 1 2 3 4 5 6 7 Supply J17 FBLK SCL SCA OUT3 GNDP OUT2 VCCP TDA9 210 OSD3 OSD2 OSD1 VCCA G N DA IN3 HS BLK OUT1 U1 R25 100R GNDL IN2 ABL IN1 BLK 11 12 13 14 1 00nF C13 100pF C1 2 C SDA 33R 33 R Hfly 1 2 3 4 1K6 R2 4 Hs Out 1K6 R30 1K6 R29 C7 4 2 1 Ou t 1 In 3 In 2 Ou t 3 Ou t 2 TDA9556 U2 In 1 C21 100n F / 250V 1 10 V I2C J10 Vs Out G1 C8 12V 47uF 100n F STO2 1 2 J9 5V 33 R Heater 5V R17 C25 4.7 n F R13 C24 4.7nF R9 BLK SCL R2 1 2K7 1 00pF 8V C23 4. 7n F 2R7 100pF C1 R11 R1 9 2K7 C5 15 16 17 18 19 20 100pF C26 C J7 G1 GN D _C R T J5 9 10 11 6 G G2 R H2 4.7 nF / 1kV C20 15 0 R 5 1 10 V D C14 7 8 G2 4. 7nF / 2KV C19 J8 100n F 9 BK 180R Heater FDH400 R 23 D9 110V FDH40 0 R1 5 18 0R D7 110V R 7 18 0 R FDH40 0 D2 110V RK F1 BK GK RK E F2 Do cument Number Vers ion 1.4 Sheet 1 E of 1 GK CRT31 with TDA9210 + TDA9535/36 R27 H1 10 R 22 1 80R 180R R6 1 80R R14 G1 11 B 39R 4.7uF / 15 0V C 18 R26 Date: Thursday, S ep tembe r 14, 2 00 0 Size A4 Title 1 GND 12 0.22uH L3 0.22uH L2 0.22uH L1 10nF / 250V C10 D GND R28 10R GNDA 5 Hs Out GNDS 6 A 3 Vcc 7 Vdd GNDP 8 R2 0 1 00R Rev F4 1 2 3 4 TDA9556 Figure 14. TDA9535/9536 - TDA9210 Demonstration Board Schematic 13/16 TDA9556 11 PACKAGE MECHANICAL DATA 11 PIN - CLIPWATT V V1 H3 H2 S A C H1 V1 V2 V1 L3 V1 R2 L2 R L1 L R1 V R3 D R3 R3 M1 M B lead#1 E G F G2 G1 Table 1 Dimensions Millimeters Typ. Max. Min. Typ. Max. A 2.95 3.00 3.05 0.116 0.118 0.120 B 0.95 1.00 1.05 0.037 0.039 0.041 C 0.15 0.006 D 1.30 1.50 1.70 0.051 0.059 0.066 E 0.49 0.515 0.55 0.019 0.020 0.021 F 0.78 0.80 0.88 0.031 0.033 0.034 G 1.60 1.70 1.80 0.063 0.067 0.071 G1 16.90 17.00 17.10 0.665 0.669 0.673 H1 14/16 Inches Min. 12.00 0.472 H2 18.55 18.60 18.65 0.730 0.732 0.734 H3 19.90 20.00 20.10 0.783 0.787 0.791 (5) L 17.70 17.90 18.10 0.696 0.704 0.712 L1 14.35 14.55 14.65 0.564 0.572 0.576 L2 10.90 11.00 11.10 0.429 0.433 0.437(5) L3 5.40 5.50 5.60 0.212 0.216 0.220 M 2.34 2.54 2.74 0.092 0.100 0.107 M1 2.34 2.54 2.74 0.092 0.100 0.107 R 1.45 0.057 TDA9556 Table 1 Dimensions R1 Millimeters Min. 3.20 Inches Typ. Max. Min. 3.30 3.40 0.126 Typ. Max. 0.130 0.134 R2 0.30 0.012 R3 0.50 0.019 S V 0.65 0.70 0.75 10deg. 0.025 0.027 0.029 10deg. V1 5deg. 5deg. V2 75deg. 75deg. Note 5: “H3 and L2” do not include mold flash or protrusions Mold flash or protrusions shall not exceed 0.15mm per side. 15/16 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this public ation are subject to change witho ut notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics. 2000 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philip s I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philip s. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www .st.com 16/16 4